LT1248 Power Factor Controller U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LT®1248 provides active power factor correction for universal off-line power systems. By using fixed high frequency PWM current averaging, without the need for slope compensation, the LT1248 achieves far lower line current distortion with a smaller magnetic element than systems that use either peak-current detection or zero current switching approaches in both continuous and discontinuous modes of operation. High Power Factor Over Wide Load Range with Line Current Averaging International Operation Without Switches Instantaneous Overvoltage Protection Minimal Line Current Dead Zone Typical 250µA Start-Up Supply Current Rejects Line Switching Noise Synchronization Capability Low Quiescent Current: 9mA Fast 1.5A Peak Current Gate Driver The LT1248 uses a multiplier containing a square gain function from the voltage amplifier to reduce the AC gain at light output load and thus maintains low line current distortion and high system stability. The LT1248 also provides filtering capability to reject line switching noise which can cause instability when fed into the multiplier. Line current dead zone is minimized with low bias voltage at the current input to the multiplier. U APPLICATIO S ■ ■ Universal Power Factor Corrected Power Supplies Preregulators Up To 1500W The LT1248 provides many protection features including peak current limiting and overvoltage protection, and can be operated at frequencies as high as 300kHz. , LTC and LT are registered trademarks of Linear Technology Corporation. W BLOCK DIAGRA VCC + 16V TO 10V – 2.6V/ 2.2V – EN/SYNC 10 VAOUT VREF 7 9 4 3 2 GND VCC 1 15 – + RUN 2.2V + 7µA + M1 – 11 – IAC + IA EA 32k 7.5V 6 7.9V I 2I I = A B IB M 200µA2 + – – SS 13 5 7.5V VREF VSENSE OVP 8 CAOUT PKLIM MOUT ISENSE 12µA 5V + IM – CA + R R – + + – 0.7V RUN SYNC ONE SHOT 200ns Q S 16 GTDR OSC 1 6V 14 CSET 12 RSET 1248 BD 1 LT1248 U U RATI GS W W W W AXI U U ABSOLUTE PACKAGE/ORDER I FOR ATIO (Note 1) Supply Voltage ....................................................... 27V GTDR Current Continuous ..................................... 0.5A GTDR Output Energy(Per Cycle) .............................. 5µJ IAC, RSET, PKLIM Input Current ............................. 20mA VSENSE, EN/SYNC, OVP Input Voltage ................... VMAX ISENSE, MOUT Input Current .................................. ± 5mA Operating Junction Temperature Range LT1248C ................................................ 0°C to 100°C LT1248I ........................................... – 40°C to 125°C Thermal Resistance (Junction-to-Ambient) N Package .................................................. 100°C/W S Package ................................................... 120°C/W Storage Temperature Range ..................–65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C ORDER PART NUMBER TOP VIEW GND 1 16 GTDR PKLIM 2 15 VCC CAOUT 3 14 CSET ISENSE 4 13 SS MOUT 5 12 RSET IAC 6 11 VSENSE VAOUT 7 10 EN/SYNC OVP 8 9 LT1248CN LT1248IN LT1248CS LT1248IS VREF N PACKAGE 16-LEAD PDIP S PACKAGE 16-LEAD NARROW PLASTIC SO TJMAX = 125°C, θJA = 100°C/W (N) TJMAX = 125°C, θJA = 120°C/W (S) Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Maximum operating voltage (VMAX) = 25V, VCC = 18V, RSET = 15k to GND, CSET = 1nF to GND, IAC = 100µA, ISENSE = 0V, CAOUT = 3.5V, VAOUT = 5V, OVP = 7.5V, no load on any outputs, unless otherwise noted. PARAMETER Overall Supply Current (VCC in Undervoltage Lockout) Supply Current (Inactive) Supply Current, On VCC Turn-On Threshold (Undervoltage Lockout) VCC Turn-Off Threshold EN/SYNC Threshold, Rising EN/SYNC Threshold Hysteresis EN/SYNC Input Current Voltage Amplifier Voltage Amp Offset Voltage Input Bias Current Voltage Gain Voltage Amp Unity-Gain Bandwidth Voltage Amp Output High (Internally Clamped) Voltage Amp Output Low Voltage Amp Short-Circuit Current SS Current Current Amplifier Current Amp Offset Voltage ISENSE Bias Current Current Amp Voltage Gain Current Amp Unity-Gain Bandwidth Current Amp Output High Current Amp Output Low 2 CONDITIONS VCC = Lockout Voltage – 0.2V EN/SYNC = 0V, VCC ≤ VMAX 11.5V ≤ VCC ≤ VMAX, CAOUT = 1V MIN TYP MAX UNITS 15.5 9.5 2.2 0.25 0.5 8.5 16.5 10.5 2.6 0.40 –1 – 25 0.45 1.5 12.0 17.5 11.5 2.85 mA mA mA V V V V µA µA ● ● ● ● ● ● EN/SYNC = 0V 3V ≤ EN/SYNC ≤ 7V ● –5 – 50 VAOUT = 3.5V VSENSE = 0V to 7V ● –8 ● 70 ● 11.3 ● VAOUT = 0V SS = 2.5V ● ● 5 5 ● ● 80 ● ● 7.2 – 25 100 3 13.3 1.1 14 12 ±1 – 25 110 3 8.5 1.1 5 50 8 – 250 2 30 30 ±4 – 250 2 mV nA dB MHz V V mA µA mV nA dB MHz V V LT1248 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Maximum operating voltage (VMAX) = 25V, VCC = 18V, RSET = 15k to GND, CSET = 1nF to GND, IAC = 100µA, ISENSE = 0V, CAOUT = 3.5V, VAOUT = 5V, OVP = 7.5V, no load on any outputs, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS ● 5 14 30 mA ● – 0.3 1 V 7.60 V Current Amplifier Current Amp Short-Circuit Current CAOUT = 0V Input Range, ISENSE, MOUT (Linear Operation) Reference Reference Output Voltage IREF = 0mA, TA = 25°C 7.39 7.50 – 20 5 VREF Load Regulation – 5mA < IREF < 0mA VREF Line Regulation 11.5V < VCC < VMAX ● 5 mV VREF Short-Circuit Current VREF = 0V ● 12 VREF Worst Case Load, Line, Temperature ● 7.32 ● – 15 15 mV – 50 – 100 µA 20 mV 28 50 mA 7.5 7.68 V Current Limit PKLIM Offset Voltage PKLIM Input Current PKLIM = – 0.1V PKLIM to GTDR Propagation Delay PKLIM Falling from 50mV to – 50mV 400 ns IAC = 100µA, RSET = 15k 35 µA ● Multiplier Multiplier Output Current Multiplier Output Current Offset RAC = 1M from IAC to GND ● Multiplier Maximum Output Current IAC = 450µA, RSET = 15k, VAOUT = 7V, MOUT = 0V ● – 286 Multiplier Gain Constant (Note 2) IAC Input Resistance – 0.05 – 0.5 µA – 260 – 235 µA V –2 0.035 IAC from 50µA to 1mA 15 32 50 kΩ 85 58 100 68 115 78 kHz kHz 4.35 4.7 5.0 V 1.25 1.4 1.55 V 4.5 5.6 6.5 V 1.6 f NOM Oscillator Oscillator Frequency RSET = 15k, CSET = 1000pF RSET = 15k, CSET = 1500pF ● ● CSET Ramp Peak-to-Peak Amplitude CSET Ramp Valley Voltage Synchronization Pulse Threshold on EN/SYNC Pin Synchronization Frequency Range Pulse Low = 3.5V, High = 7V, Width > 200ns RSET = 15k, CSET = 1000pF ● 1.2 ● 1.04 Overvoltage Comparator Comparator Trip Voltage Ratio (VTRIP / VREF) Hysteresis OVP Bias Current 1.05 1.06 0.35 OVP = 7.5V – 50 ● OVP Propagation Delay V – 250 100 nA ns Gate Driver Max GTDR Output Voltage 0mA Load, 18V < VCC ● 12 15 17.5 V GTDR Output High – 200mA Load, 11.5V ≤ VCC ≤ 15V ● VCC – 3.0 GTDR Output Low (Device Unpowered) VCC = 0V, 50mA Load (Sinking) ● 0.9 1.5 V GTDR Output Low (Device Active) 200mA Load (Sinking) 10mA Load ● ● 0.5 0.2 1 0.4 V V V Peak GTDR Current 10nF from GTDR to GND 2 A GTDR Rise and Fall Time 1nF from GTDR to GND 25 ns 96 % GTDR Max Duty Cycle 90 Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired IM Note 2: Multiplier Gain Constant: K = IAC (VAOUT – 2)2 3 LT1248 U W TYPICAL PERFOR A CE CHARACTERISTICS Current Amplifier Open-Loop Gain and Phase Voltage Amplifier Open-Loop Gain and Phase 100 0 80 100 –20 0 80 –20 GAIN 40 –60 20 10 100 1k 10k 100k FREQUENCY (Hz) 1M 60 –40 40 –60 –80 20 –100 0 –120 10M –20 PHASE 0 –20 GAIN (dB) –40 –80 PHASE –100 10 1148 G02 Reference Voltage vs Temperature Multiplier Current 7.536 300 7.524 VAOUT = 5.5V VAOUT = 7V 7.512 VAOUT = 6.5V 7.500 VAOUT = 6V IM (µA) REFERENCE VOLTAGE (V) –120 10M 1M 1k 10k 100k FREQUENCY (Hz) 100 1148 G01 7.488 7.476 VAOUT = 5V 150 VAOUT = 4.5V 7.464 VAOUT = 4V 7.452 VAOUT = 3.5V 7.440 7.428 –75 –50 –25 0 25 50 75 100 125 150 JUNCTION TEMPERATURE (°C) 0 0 VAOUT = 3V VAOUT = 2.5V 500 250 IAC (µA) 1248 G04 1248 G03 Supply Current vs Supply Voltage 8 7 TJ = 125°C GTDR VOLTAGE (V) SUPPLY CURRENT (mA) VCC = 18V TJ = 25°C 6 5 4 0.9 17.0 0.8 16.5 16.0 15.5 14.5 2 14.0 1 13.5 13.0 21 SUPPLY VOLTAGE (V) 32 TJ = 125°C 15.0 3 10 1.0 17.5 GTDR VOLTAGE (V) TJ = –55°C 1248 G05 4 1.1 18.0 10 0 GTDR Sink Current GTDR Source Current 18.5 11 9 PHASE (DEG) 60 PHASE (DEG) GAIN (dB) GAIN TJ = 25°C 0.7 0.6 0.5 TA = –55°C 0.4 0.3 TJ = –55°C 0.2 TA = 25°C 0.1 0 –120 –180 –240 – 60 SOURCE CURRENT (mA) –300 1248 G06 0 TA = 125°C 0 60 120 180 240 SINK CURRENT (mA) 300 1248 G07 LT1248 U W TYPICAL PERFOR A CE CHARACTERISTICS Start-Up Supply Current vs Supply Voltage GTDR Rise and Fall Time SUPPLY CURRENT (µA) TIME (ns) 300 FALL TIME 200 RISE TIME 100 NOTE: GTDR SLEWS BETWEEN 1V AND 16V 0 0 10 20 30 40 LOAD CAPACITANCE (nF) 550 500 500 450 450 400 400 350 300 –55°C 25°C 250 200 125°C 150 250 200 150 50 50 4 2 0 200 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V) 1248 G08 600 1000 1800 1400 CSET CAPACITANCE (pF) Shutdown Mode Supply Current and Reference Voltage 1.1 1.1 0.99 1.0 0.98 0.9 0.9 0.8 0.8 0.7 0.7 0.97 0.96 0.95 0.94 RSET = 10k RSET = 15k RSET = 20k RSET = 30k 0.92 0.91 0.90 200 600 1000 1800 1400 CSET CAPACITANCE (pF) EN/SYNC ≤ 1.8V 1.0 0.6 0.6 SUPPLY CURRENT –55°C ≤ TJ ≤ 25°C TJ = 125°C 0.5 0.4 0.3 0.2 0.2 REFERENCE VOLTAGE TJ ≤ 125°C 0.1 0 2200 0 16 SUPPLY VOLTAGE (V) SHUTDOWN THRESHOLD –32 SS CURRENT (µA) EN/SYNC CURRENT (µA) –36 SYNCHRONIZATION THRESHOLD –28 –24 TJ = – 55°C –20 TJ = 25°C –16 TJ = 125°C –12 1.5 –20 1.0 –18 0.5 –16 TJ = –55°C –14 TJ = 25°C –12 TJ = 125°C –10 –8 –6 0 –1.0 –1.5 –2.0 –2.5 –4 –3.0 –4 –2 –3.5 0 0 1 2 3 4 5 6 7 8 EN/SYNC VOLTAGE (V) 9 10 1248 G13 0 4 SS VOLTAGE (V) 8 1248 G14 TJ = 125°C TJ = 25°C TJ = –55°C –0.5 –8 0 0 32 MOUT Pin Characteristics –22 MOUT CURRENT (mA) –40 0.1 1248 G12 SS Pin Characteristics –44 0.4 0.3 1248 G11 Synchronization and Shutdown Thresholds at EN/SYNC Pin 0.5 REFERENCE VOLTAGE (V) SUPPLY CURRENT (mA) 1.00 0.93 2200 1248 G10 1248 G09 GTDR Maximum Duty Cycle vs RSET and CSET MAXIMUM DUTY CYCLE 300 100 0 RSET = 10k RSET = 15k RSET = 20k RSET = 30k 350 100 0 50 Frequency vs RSET and CSET FREQUENCY (kHz) 400 –4.0 –2.4 1.2 –1.2 0 MOUT VOLTAGE (V) 2.4 1248 G15 5 LT1248 U W TYPICAL PERFOR A CE CHARACTERISTICS RSET Voltage vs Current PKLIM Pin Characteristics 120 –360 TJ = 125°C TJ = 25°C TJ = –55°C 100 –240 60 PKLIM CURRENT (µA) VRSET – VREF (mV) 80 40 20 0 –20 –40 –180 –120 –60 0 60 120 –60 180 –80 240 –100 0 –0.2 –0.8 –0.4 –0.6 RSET CURRENT (mA) TJ = 125°C TJ = 25°C TJ = –55°C –300 –1.0 1248 G16 300 –0.8 0.4 –0.4 0 PKLIM VOLTAGE (V) 0.8 1248 G17 U U U PI FU CTIO S Pin 1 (GND). Pin 2 (PKLIM): The threshold of the peak current limit comparator is GND. To set current limit, a resistor divider can be connected from VREF to current sense resistor. Pin 3 (CAOUT): This is the output of the current amplifier that senses and forces the line current to follow the reference signal that comes from the multiplier by commanding the pulse width modulator. When CAOUT is low, the modulator has zero duty cycle. Pin 4 (ISENSE): This is the inverting input of the current amplifier. This pin is clamped at – 0.6V by an ESD protection diode. Pin 5 (MOUT): This is the multiplier high impedance current output and the noninverting input of the current amplifier. This pin is clamped at – 0.6V and 2V. Pin 6 (IAC): This is the AC line voltage sensing input to the multiplier. It is a current input that is biased at 2V to minimize the crossover dead zone caused by low line voltage. At the pin, a 32k resistor is in series with the current input, so that a lowpass RC can be used to filter out the switching noise from the high impedance lines. 6 Pin 7 (VAOUT): This is the output of the voltage error amplifier. The output is clamped at 13.5V. When the output goes below 2.5V, the multiplier output current is zero. Pin 8 (OVP): This is the input to the overvoltage comparator. The threshold is 1.05 times the reference voltage. When the comparator trips, the multiplier is quickly inhibited and outputs no current. Figure 4 in the Applications Information section shows how to set overvoltage threshold with only one additional resistor. Pin 9 (VREF): This is the 7.5V reference. When either VCC or EN/SYNC goes low, VREF will stay at 0V. VREF biases most of the internal circuity and can source up to 5mA externally. Pin 10 (EN/SYNC): This pin has two functions. When it goes below 2.6V, the chip goes into shutdown mode and draws little current. Pulses at this pin that go below the 5V threshold will synchronize the chip. The synchronizing pulses should have an on-time of at least 200ns for the LT1248 resetting circuit to work. Pin 11 (VSENSE): This is the inverting input to the voltage amplifier. LT1248 U U U PI FU CTIO S Pin 12 (RSET): A resistor from RSET to GND sets the oscillator charging current and the maximum multiplier output current which is used to limit the maximum line current. IM(MAX) = 3.75V/RSET Pin 13 (SS): Soft-Start. When either VCC or EN/SYNC goes low, the SS pin will stay at 0V. With a capacitor from the pin to GND, the 12µA charging current slowly brings up the SS to 8V; below 7.5V SS is the reference input to the voltage amplifier. At supply dropout or EN/SYNC low, the soft start capacitor will be quickly discharged. Pin 15 (VCC): This is the supply for the chip. The LT1248 has a very fast gate driver required to fast charge high power MOSFET gate capacitance. High current spikes occur during charging. For good supply bypass, a 0.1µF ceramic capacitor in parallel with a low ESR electrolytic capacitor, 56µF or higher is required in close proximity to IC GND. Pin 16 (GTDR): The MOSFET gate driver is a 1.5A fast totem pole output. It is clamped at 15V, but capacitive loads like MOSFET gates may cause overshoot. A gate series resistor of at least 5Ω will prevent the overshoot. Pin 14 (CSET): The capacitor from this pin to GND, and RSET, determine oscillator frequency. The oscillator ramp is 5V, and the frequency = 1.5/(RSET • CSET). U W U UO APPLICATI S I FOR ATIO Error Amplifier Multiplier The error amplifier has a 100dB DC gain and 3MHz unitygain frequency. The output is internally clamped at 13.5V. The noninverting input is tied to the 7.5V VREF through a diode and can be pulled down from the SS (soft-start) pin. The multiplier is a current multiplier with high noise immunity in a high power switching environment. The current gain is: IM = (IAC • IEA2)/(200µA)2, with IEA = (VAOUT – 2V)/25k. With a square function, because of the lower gain at light power load, system stability is maintained and line current distortion caused by the line frequency AC The current amplifier has a 110dB DC gain, 3MHz unitygain frequency, and a 2V/µs slew rate. It is internally clamped at 8.5V. Note that in the current averaging operation, high gain at twice the line frequency is necessary to minimize line current distortion. Because CAOUT may need to swing 5V over one line cycle at high line condition, 14mV AC will be needed at the inputs of the current amplifier for a gain of 350 at 120Hz. Especially at light load when the current loop reference signal is small, lower gain will distort the reference signal and line current. If signal gain at switching frequency is too high, the system behaves more like a current mode system and can cause subharmonic oscillation. Therefore, the current amplifier should be compensated to have a gain of less than 15 at the switching frequency, but more than 250 at twice the line frequency. 300 VAOUT = 5.5V VAOUT = 7V VAOUT = 6.5V VAOUT = 6V IM (µA) Current Amplifier VAOUT = 5V 150 VAOUT = 4.5V VAOUT = 4V VAOUT = 3.5V 0 0 250 IAC (µA) VAOUT = 3V VAOUT = 2.5V 500 1248 G04 Figure 1. Multiplier Current IM vs IAC and VAOUT 7 LT1248 U W U UO APPLICATI S I FOR ATIO ripple fed back to the error amplifier is minimized. Note that switching ripple on the high impedance lines could get into the multiplier from the IAC pin and cause instability. The LT1248 provides an internal 25k resistor in series with the low impedance multiplier current input so that only a capacitor from the IAC pin to GND is needed to filter out the noise. The maximum multiplier output current, which limits the system line current, is set by the RSET according to the formula: IM(MAX) = 3.75V/RSET. Oscillator Frequency and Maximum Line Current Settling Oscillator frequency is set by RSET and CSET. Ramp amplitude is 5V and CSET charging current is set by VREF/RSET. Typical discharging time for CSET = 1nF is 250ns. RSET should always be determined first to set the maximum multiplier output current for system line current limit. For a 300W preregulator, with RSET = 15k, IM(MAX) = 3.75V/15k = 250µA. With a 4k resistor RREF from MOUT to the 0.2Ω line current sense resistor RS, the line current limit is: (IM • 4k)/RS. As a general rule, RS is chosen according to: RS = IM(MAX) • RREF • VLINE(MIN) K(1.414)POUT(MAX) R1 10k 7.5V VREF + – RS 0.2Ω IPKLIM ILINE C1 IS TO REJECT NOISE, CURRENT LIMIT DELAY IS ABOUT 2µs. – + 1248 F02 Figure 2 8 PKLIM C1 1nF Always use RSET to set the primary line current limit. The PKLIM comparator is only for secondary protection. The secondary limit should be higher than the primary limit; 6.5A is good (5A for primary limit) for a 300W regulator. When line current reaches the primary limit, VOUT drops to keep the line current constant, and system stability is still maintained by the current loop which is controlled by the current amplifier. When line current reaches the secondary limit, the comparator controls the system and loop hysteresis may occur and can cause audible noise. Synchronization The LT1248 can be synchronized to a frequency that is up to 1.6 times the natural frequency. With a 200ns one-shot timer on-chip, the LT1248 provides flexibility on the synchronizing pulse width. Because the EN/SYNC pin also serves the chip shutdown function, the pulses at the pin should not go below 3V and must go below 5V with widths greater than 200ns. The Figure 3 circuit will synchronize the LT1248. VREF where POUT(MAX) is the maximum power output and K is usually between 1.1 and 1.3 depending on efficiency and resistor tolerance. With RSET selected, CSET can then be determined by: CSET = 1.5/(Frequency • RSET). For 100kHz, CSET = 1.5/(100kHz • 15k) = 1nF. For optional double protection, the LT1248 provides a current limit comparator. When the comparator trips at 0V, the GTDR pin quickly goes low to shut off the MOS switch. A resistor divider from VREF to RS (Figure 2) senses the voltage across the line current sense resistor and the current limit is set by: ILINE = [(7.5V/R1) + 50µA](R2/RS), where 50µA is IPKLIM. R2 1.6k With ILINE and RS chosen, let R1 = 10k, then R2 = (ILINE • RS )/0.8mA. 30k 1N4148 200k VCC EN/SYNC 1N4685 3.6V SYNC PULSE AT LEAST 200ns VN2222 1248 F03 Figure 3 Overvoltage Protection Because of the slow loop response necessary for power factor correction, output overshoot can occur with sudden load removal or reduction. To protect the power components and output load, the LT1248 provides an overvoltage comparator which senses the output voltage and quickly shuts off the current switch. In Figure 4, because there is no DC current going through R3, R1 and R2 set the regulator output DC level: VOUT = VREF[(R1 + R2)/R2], with R1 = 1M, R2 = 20k, VOUT is 382V. LT1248 W U U UO APPLICATI S I FOR ATIO Note that VSENSE is the summing node and it stays at 7.5V. When overshoot occurs on VOUT, the overcurrent from R1 will go through R2 as well as R3. Amplifier feedback will keep VSENSE locked at 7.5V. The equivalent AC resistance, seen by the comparator input pin OVP, is R2 in parallel with R3, which is 10k. Therefore, with the comparator trip level of 1.05VREF and R3 of 20k, the comparator trips when VOUT overshoot exceeds 10%. Overvoltage trip level: R2 + R3 %VOUT = 5% R3 MOUT is a high impedance current output. In the current loop, offset line current is determined by multiplier offset current and input offset voltage of the current amplifier. A – 4mV current amplifier VOS translates into 20mA line current and 5W input power for 250V line if 0.2Ω sense resistor is used. Under no load or when the load power is less than this offset input power, VOUT would slowly charge up to an overvoltage state because the overvoltage comparator can only reduce multiplier output current to zero. This does not guarantee zero output current if the current amplifier has offset. To regulate VOUT under this condition, the amplifier M1 (see Block Diagram), becomes active in the current loop when VAOUT goes down to 2.2V. The M1 can put out up to 7µA to the resistor at the ISENSE pin to cancel any current amplifier negative VOS and keep VOUT error to within 2V. Undervoltage Lockout The LT1248 turns on when VCC is higher than 16V and remains on until VCC falls below 10V, whereupon the chip enters the lockout state. In the lockout state, the LT1248 only draws 250µA, the oscillator is off, and the VREF and the GTDR pins remain low to keep the power MOSFET off. Start-Up and Supply Voltage The LT1248 draws only 250µA before the chip starts at 16V on VCC. To trickle start, a 90k resistor from the power line to VCC supplies the trickle current and C4 holds the VCC up while switching starts. Then the auxiliary winding takes over and supplies the operating current. Note that D3 and the large value C3, in both Figures 5 and 6, are only necessary for systems that have sudden large load variation down to minimum load and/or very light load conditions. Under these conditions, the loop may exhibit a start/ restart mode because switching remains off long enough for C4 to discharge below 10V. The C3 will hold VCC up until switching resumes. For less severe load variations, D3 is replaced with a short and C3 is omitted. The turns ratio between the primary winding and the auxiliary winding determines VCC according to: LINE MAIN INDUCTOR NP NS R1 90k, 1W D1 D3 D2 C1 0.47µF REGULATOR OUTPUT VOUT = 382V R1 1M R3 20k C1 2µF + + C2 2µF 330k C3 390µF + C4 56µF 1248 F05 VSENSE – + Figure 5 VAOUT C2 1000pF ERROR AMP VREF = 7.5V R2 20k VCC + 0.047µF MAIN INDUCTOR LINE LT1248 OVP R1 90k 1W – D2 + 1.05VREF OVERVOLTAGE COMPARATOR D3 + D1 C3 390µF 18V + VCC C4 56µF 1248 F04 1248 F06 Figure 4 Figure 6 9 LT1248 U W U UO APPLICATI S I FOR ATIO VOUT/(VCC – 2V) = NP/NS. For 382V VOUT and 18V VCC, Np/Ns ≈ 19. In Figure 6, a new technique for supply voltage eliminates the need for an extra inductor winding. It uses capacitor charge transfer to generate a constant current source which feeds a Zener diode. Current to the Zener is equal to (VOUT – VZ)(C)(f), where VZ is Zener voltage and f is switching frequency. For VOUT = 382V, VZ = 18V, C = 1000pF, and f = 100kHz, Zener current will be 36mA. This is enough to operate the LT1248, including the FET gate drive. Normally soft-start is not needed because the LT1248 has overcurrent limit and overvoltage protection. If soft-start is used with a 0.01µF capacitor on SS pin, VOUT ramps up slower during start-up. Then C4 has to hold VCC longer, and the circuit may not start. Increasing C4 to 100µF ensures start-up, but start-up time will be extended if the same 90k trickle charge resistor is used. Output Capacitor The peak-to-peak 120Hz output ripple is determined by: VP-P = (2) (ILOAD(DC))(Z) where ILOAD(DC): DC load current. Z: capacitor impedance at 120Hz. For 180µF at 300W load, ILOAD(DC) = 300W/385V = 0.78A, VP-P = 2 • 0.78A • 7.4Ω = 11.5V. If less ripple is desired, higher capacitance should be used. The selection of the output capacitor should also be based on the operating ripple current through the capacitor. The ripple current can be divided into three major components. The first is at 120Hz; it’s RMS value is related to the DC load current as follows: I1RMS ≈ 0.71 • ILOAD(DC) The second component contains the PF switching frequency ripple current and its harmonics. Analysis of the ripple is complicated because it is modulated with a 120Hz signal. However computer numerical integration and Fourier analysis approximate the RMS value reasonably close to the bench measurements. The RMS value is about 0.82A at a typical condition of 120VAC, 200W load. This ripple is line-voltage dependent, and the worst case is at low line. I2RMS = 0.82A at 120VAC, 200W 10 The third component is the switching ripple from the load, if the load is a switching regulator. I3RMS ≈ ILOAD(DC) For the United Chemicon KMH 400V capacitor series, ripple current multiplier for currents at 100kHz is 1.43. The equivalent 120Hz ripple current can be then found: IRMS = √(I1RMS)2 + (I2RMS/1.43)2 + (I3RMS/1.43)2 For a typical system that runs at an average load of 200W and 385V output: ILOAD(DC) = 0.52A I1RMS ≈ 0.71 • 0.52A = 0.37A I2RMS ≈ 0.82A at 120VAC I3RMS ≈ ILOAD(DC) = 0.52A IRMS = √(0.37A)2 +(0.82A/1.43)2 +(0.52A/1.43)2 = 0.77A The 120Hz ripple current rating at 105°C ambient is 0.95A for the 180µF KMH 400V capacitor. The expected life of the output capacitor may be calculated from the thermal stress analysis: (105°C+∆TK) – (TA+∆TO) L = LO • 2 10 where: L: expected life time LO: hours of load life at rated ripple current and rated ambient temperature. ∆TK: Capacitor internal temperature rise at rated condition. ∆TK = (I2R)/(KA). Where I is the rated current, R is capacitor ESR, and KA is a volume constant. TA: Operating ambient temperature. ∆TO: Capacitor internal temperature rise at operating condition. In our example LO = 2000 hours and ∆TK = 10°C at rated 0.95A. ∆TO can then be calculated from: ∆TK = (IRMS/0.95A)2 • ∆TK = (0.77A/0.95A)2 • 10°C = 6.6°C Assuming the operating ambient temperature is 60°C, the approximate life time is: LO ≈ 2000 • 2 (105°C +10°C) – (60°+ 6.6°C) 10 ≈ 57,000 hours For longer life, a capacitor with a higher ripple current rating or parallel capacitors should be used. LT1248 UO TYPICAL APPLICATI 300W, 382V Preregulator 90V TO 270V MURH860 750µH* T + VOUT EMI FILTER 6A – 0.47µF 20k RREF 4k 330k 4k 100pF VCC = 18V** 1nF 0.1µF VAOUT VCC + 16V TO 10V – 10 11 1M 2.2V 7.5V OVP + 13 GND 15 VCC – 7µA I 2I I = A B IB M 200µA2 – + CA + R R – 32k – 5V IM + Q GTDR 16 10Ω S RUN + – 12µA SS 1 + 0.7V– 4.7nF 50k PKLIM 2 3 CAOUT + IA – + 7.9V 8 ISENSE M1 EA 6 4 – VSENSE IAC 5 56µF 35V RUN + EN/SYNC MOUT + 20k 7.5V VREF – 2.6V/2.2V VREF 9 7 180µF 20k 1% RS 0.2Ω 0.047µF + 1M 1% IRF840 † OSC ONE SHOT 200ns 16V SYNC 1N5819 0.01µF CSET * 1. COILTRONICS CTX02-12236-1 (TYPE 52 CORE) AIR MOVEMENT NEEDED AT POWER LEVEL GREATER THAN 250W. 2. COILTRONICS CTX02-12295 (MAGNETICS Kool Mµ® 77930 CORE) ** SEE START-UP AND SUPPLY VOLTAGE SECTION FOR VCC GENERATOR. † THIS SCHOTTKY DIODE IS TO CLAMP GTDR WHEN MOS SWITCH TURNS OFF. PARASITIC INDUCTANCE AND GATE CAPACITANCE MAY TURN ON CHIP SUBSTRATE DIODE AND CAUSE ERRATIC OPERATIONS IF GTDR IS NOT CLAMPED. 1000pF 14 12 RSET 15k 1248 TA01 Kool Mµ is a registered trademark of Magnetics, Inc. Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LT1248 U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. N Package 16-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) 0.130 ± 0.005 (3.302 ± 0.127) 0.300 – 0.325 (7.620 – 8.255) 0.009 – 0.015 (0.229 – 0.381) ( +0.889 8.255 –0.381 0.045 – 0.065 (1.143 – 1.651) 0.020 (0.508) MIN +0.035 0.325 –0.015 ) 0.770* (19.558) MAX 0.065 (1.651) TYP 0.125 (3.175) MIN 15 14 13 12 11 10 1 2 3 4 5 6 7 9 0.255 ± 0.015* (6.477 ± 0.381) 0.018 ± 0.003 (0.457 ± 0.076) 0.100 (2.54) BSC 16 8 N16 1098 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) S Package 16-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.386 – 0.394* (9.804 – 10.008) 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0.053 – 0.069 (1.346 – 1.752) 0.004 – 0.010 (0.101 – 0.254) 16 15 14 13 12 11 10 9 0° – 8° TYP 0.016 – 0.050 (0.406 – 1.270) 0.014 – 0.019 (0.355 – 0.483) TYP 0.050 (1.270) BSC 0.150 – 0.157** (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE S16 1098 1 2 3 4 5 6 7 8 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1103 Off-Line Switching Regulator Universal Off-Line Inputs with Outputs to 100W LT1249 PFC in SO-8 Simplified PFC Design with Minimal Part Count LT1508 Power Factor and PWM Controller Voltage Mode PWM, Simplified PFC Design LT1509 Power Factor and PWM Controller Complete Solution for Universal Off-Line Switching Power Supplies 12 Linear Technology Corporation 1248fd LT/GP 0799 2K REV D • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com LINEAR TECHNOLOGY CORPORATION 1993