Diodes DLD101 Linear mode current sink led driver Datasheet

DLD101
LINEAR MODE CURRENT SINK LED DRIVER
Features
Mechanical Data
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NEW PRODUCT
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Primarily Designed for Driving LED/s for Illumination, Signage
and Backlighting Applications
Ideally Suited for Linear Mode Constant Current Applications
VBE Referenced Current Sink Circuit
Includes:
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N-Channel Enhancement Mode MOSFET (Q1)
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Base Accessible Pre-Biased Transistor (Q2)
High Voltage Capable (50V)
Small Form Factor Surface Mount Package
High Dissipation Capability
Low Thermal Resistance
Lead Free By Design/RoHS Compliant (Note 1)
"Green" Device (Note 2)
Qualified to AEC-Q101 Standards for High Reliability
Case: DFN3030D-8
Case Material: Molded Plastic, "Green" Molding Compound.
UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020
Terminals: Finish — NiPdAu over Copper leadframe. Solderable
per MIL-STD-202, Method 208
Marking Information: See Page 6
Ordering Information: See Page 6
Weight: 0.0172 grams (approximate)
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VCC Supply
LED String
RC
4
S2
B1
B1’
7
8
G
5
R2
Q1
1
2
D
C
6
R1
3
E1
S2
B1
B1’
E1
8
7
6
5
VDS
B
Q2
R2
Q1
E
Q2
5
R1
6
Option 3:
S
7
8
ILED ≈
Option 3
VBE
RS
Options 1 & 2:
Option 2
Option 1
1
2
3
4
1
2
3
4
D2
G2
NC
C1
D2
G2
NC
C1
Top View
Package Pin-Out Configuration
Top View
Internal Schematic
Maximum Ratings: (Q1)
1.1 VBE
RS
Option 2:
Capacitor is across R2 for
better noise performance.
Typical Application Circuit for Linear
Mode Current Sink LED Driver
@TA = 25°C unless otherwise specified
Characteristic
Drain Source Voltage
Gate-Source Voltage
Drain Current (Note 3)
Drain Current (Note 3)
Body-Diode Continuous Current (Note 3)
Maximum Ratings: (Q2)
RS
ILED ≈
Symbol
VDSS
VGSS
TA = 25°C
TA = 70°C
Pulsed
ID
IDM
IS
Value
100
±20
1.0
0.8
3.0
1.0
Unit
V
V
Value
50
-5 to +30
100
Unit
V
V
mA
Value
0.7
178
30
-55 to +150
Unit
W
°C/W
°C/W
°C
A
A
A
@TA = 25°C unless otherwise specified
Characteristic
Symbol
VCC
VIN
IO
Supply Voltage
Input Voltage
Output Current (DC)
Thermal Characteristics – Total Device
Characteristic
Power Dissipation (Note 3) @TA = 25°C
Thermal Resistance Junction to Ambient Air (Note 3) @TA = 25°C
Thermal Resistance Junction to Case Air (Note 3) @TA = 25°C
Operating and Storage Temperature Range
Notes:
Symbol
PD
RθJA
RθJC
TJ, TSTG
1. No purposefully added lead.
2. Diodes Inc.'s "Green" policy can be found on our website at http://www.diodes.com/products/lead_free/index.php.
3. Part mounted on FR-4 substrate PC board, with minimum recommended pad layout (see page 6).
DLD101
Document number: DS32007 Rev. 6 - 2
1 of 7
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February 2010
© Diodes Incorporated
DLD101
NEW PRODUCT
Electrical Characteristics: (Q1)
@TA = 25°C unless otherwise specified
Characteristic
OFF CHARACTERISTICS (Note 4)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Source Leakage
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Symbol
Min
Typ
Max
Unit
BVDSS
IDSS
IGSS
100
⎯
⎯
⎯
⎯
⎯
⎯
1
±100
V
μA
nA
VGS = 0V, ID = 250μA
VDS = 60V, VGS = 0V
VGS = ±20V, VDS = 0V
VGS(th)
2.0
RDS (ON)
⎯
4.1
0.85
0.99
V
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
gfs
VSD
⎯
⎯
⎯
⎯
⎯
0.9
0.89
⎯
1.1
S
V
VDS = VGS, ID = 250μA
VGS = 10V, ID = 1.5A
VGS = 6V, ID = 1A
VDS = 15V, ID = 1A
VGS = 0V, IS = 1.5A
Ciss
Coss
Crss
⎯
⎯
⎯
129
14
8
⎯
⎯
⎯
pF
pF
pF
VDS = 50V, VGS = 0V
f = 1.0MHz
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
⎯
⎯
⎯
⎯
⎯
⎯
⎯
3.4
0.9
1
7.9
11.4
14.3
9.6
⎯
⎯
⎯
⎯
⎯
⎯
⎯
nC
VDS = 50V, VGS = 10V, ID = 1A
ns
VGS = 50V, VDS = 10V,
ID = 1A, RG ≈ 6Ω
Electrical Characteristics: (Q2)
Characteristic
Input Voltage
Output Voltage
Output Current
DC Current Gain
Input Resistance
Resistance Ratio
Transition Frequency
Notes:
Ω
Test Condition
@TA = 25°C unless otherwise specified
Symbol
VI(off)
VI(on)
VO(on)
IO(off)
G1
R1
R2/R1
Min
0.4
80
3.2
8
Typ
0.05
4.7
10
Max
1.5
0.3
0.5
6.2
12
Unit
V
V
V
μA
kΩ
-
fT
-
260
-
MHz
Test Condition
VCC = 5V, IO = 100μA
VCC = 0.3V, IO = 5mA
IO/II = 5mA/0.25mA
VCC = 50V, VI = 0V
VO = 5V, IO = 10mA
VCE = 10V, IE = 5mA,
f = 100MHz
4. Short duration pulse test used to minimize self-heating effect.
DLD101
Document number: DS32007 Rev. 6 - 2
2 of 7
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February 2010
© Diodes Incorporated
DLD101
Q1 Typical Performance Curves
RDS(ON), DRAIN-SOURCE ON-RESISTANCE (Ω)
10
VDS = VGS
9
ID, DRAIN CURRENT (A)
7
6
TA = 150°C
5
TA = 125°C
4
3
TA = 85°C
2
T A = 25°C
1
T A = -55°C
2
2.5
3
3.5
4
VGS, GATE-SOURCE VOLTAGE (V)
Fig. 1 Typical Transfer Characteristic
1
VGS = 6V
VGS = 10V
0.1
0
4.5
0.4
0.8
1.2
ID, DRAIN CURRENT (A)
Fig. 2 Typical On-Resistance
vs. Drain Current and Gate Voltage
1.6
3.0
1.6
VGS = 10V
1.4
RDSON, DRAIN-SOURCE
ON-RESISTANCE (NORMALIZED)
RDS(ON), DRAIN-SOURCE ON-RESISTANCE (Ω)
0
1.5
1.2
TA = 150°C
1.0
T A = 125°C
0.8
T A = 85°C
0.6
TA = 25°C
0.4
T A = -55°C
0.2
2.5
2.0
0.4
0.8
1.2
ID, DRAIN CURRENT (A)
Fig. 3 Typical On-Resistance
vs. Drain Current and Temperature
VGS = 10V
ID = 1.5A
1.5
VGS = 6V
ID = 1A
1.0
0.5
0
0
0
-50
0
25
50
75 100 125 150
TA, AMBIENT TEMPERATURE (°C)
Fig. 4 On-Resistance Variation with Temperature
1.6
1.5
-25
VGS(TH), GATE THRESHOLD VOLTAGE (V)
4.0
1.2
RDSON, DRAIN-SOURCE
ON-RESISTANCE (Ω)
NEW PRODUCT
8
10
0.9
VGS = 6V
ID = 1A
0.6
VGS = 10V
ID = 1.5A
0.3
0
-50
-25
0
25
50
75 100 125 150
TA, AMBIENT TEMPERATURE (°C)
Fig. 5 On-Resistance Variation with Temperature
DLD101
Document number: DS32007 Rev. 6 - 2
3 of 7
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3.8
3.6
3.4
3.2
ID = 1mA
3.0
2.8
ID = 250µA
2.6
2.4
2.2
2.0
-50 -25
0
25
50
75 100 125 150
TA, AMBIENT TEMPERATURE (°C)
Fig. 6 Gate Threshold Variation vs. Ambient Temperature
February 2010
© Diodes Incorporated
DLD101
Q1 Typical Performance Curves - continued
1,000
1.6
IDSS, LEAKAGE CURRENT (nA)
IS, SOURCE CURRENT (A)
1.2
1.0
TA = 25°C
0.8
0.6
0.4
TA = 150°C
100
TA = 125°C
10
TA = 85°C
TA = -55°C
0.2
TA = 25°C
1
0
0.6
0
0.7
0.8
0.9
1
VSD, SOURCE-DRAIN VOLTAGE (V)
Fig. 7 Source-Drain Diode Forward Voltage vs. Current
10
20
30
40
50
VDS, DRAIN-SOURCE VOLTAGE (V)
60
Fig. 8 Typical Leakage Current vs. Drain-Source Voltage
Q2 Typical Performance Curves
1,000
25
IB = 5mA
20
hFE, DC CURRENT GAIN
IC, COLLECTOR CURRENT (mA)
NEW PRODUCT
1.4
IB = 4mA
15
IB = 3mA
10
T A = 150°C
100
T A = 125°C
TA = 85°C
TA = 25°C
TA = -55°C
10
IB = 2mA
5
IB = 1mA
0
0
1
1
2
3
4
5
VCE, COLLECTOR-EMITTER VOLTAGE (V)
Fig. 9 Typical Collector Current
vs. Collector-Emitter Voltage
DLD101
Document number: DS32007 Rev. 6 - 2
4 of 7
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50
1
10
IC, COLLECTOR CURRENT (mA)
Fig. 10 Typical DC Current Gain vs. Collector Current
0.1
February 2010
© Diodes Incorporated
DLD101
Q2 Typical Performance Curves - continued
NEW PRODUCT
VCE(SAT), COLLECTOR-EMITTER
SATURATION VOLTAGE (V)
0.7
IC/IB = 10
0.6
0.5
0.4
0.3
0.2
TA = 125°C
T A = 150°C
0.1
TA = 85°C
TA = -55°C
0
T A = 25°C
1
10
100 200
IC, COLLECTOR CURRENT (mA)
Fig. 11 Typical Collector-Emitter Saturation Voltage
vs. Collector Current
Typical Application Circuit
VCC Supply
The DLD101 has been designed primarily for solid state lighting
applications, to be used as a current sink circuit solution for LEDs. It
features a N-channel MOSFET capable of 1A drive current and a prebiased NPN transistor (which allows direct connection to the base, or
via a series base resistor).
LED String
RC
4
3
1
2
G
Figure 12 shows a typical application circuit diagram for driving an
LED or string of LEDs. Note that the pre-biased transistor (Q2) has
the option of bypassing the series base resistor by connecting directly
to pin 7. The N-MOSFET (Q1) is configured as a VBE referenced
current sink and is biased on by RC. The current passed through the
LED string, MOSFET and source resistor, develops a voltage across
RS that provides a bias to the NPN transistor. Consideration of the
expected linear mode power dissipation must be factored into the
design, with respect to the DLD101's thermal resistance.
D
C
VDS
B
Q2
R2
Q1
E
5
R1
6
Option 3:
S
7
8
ILED ≈
Option 3
VBE
RS
VDS = VCC – VF LED String – VRS
PQ1 = VDS * ILED String
Options 1 & 2:
Option 2
Option 1
RS
ILED ≈
1.1 VBE
RS
Option 2:
Capacitor is across R2 for
better noise performance.
PWM dimming functionality can be effected by either driving the NPN
base via an additional resistor (thereby overriding the feedback from
RS) or by pulling the gate of the MOSFET down by direct connection.
The PWM control pulse stream can be provided by a micro-controller
or simple 555 based circuitry.
Fig. 12 Typical Application Circuit for
Linear Mode Current Sink LED Driver
DLD101
Document number: DS32007 Rev. 6 - 2
5 of 7
www.diodes.com
February 2010
© Diodes Incorporated
DLD101
Ordering Information (Note 5)
Part Number
DLD101-7
Packaging
3000/Tape & Reel
5. For packaging details, go to our website at http://www.diodes.com/datasheets/ap02007.pdf.
Marking Information
DFN3030D-8
YYWW
NEW PRODUCT
Notes:
Case
DFN3030D-8
L101 = Product marking code
YYWW = Date code marking
YY = Last digit of year (ex: 09 for 2009)
WW = Week code 01 to 52
L101
Package Outline Dimensions
A
A3 SEATING PLANE
A1
Dim
A
A1
A3
b
D
D1
D2
D3
D
D3
b
E3
D1
E
E1
D2
E2
Min
0.570
0
0.290
2.950
2.175
0.980
0.105
DFN3030D-8
Max
Typ Dim Min
0.630 0.600
e
0.050 0.020
E 2.950
0.150 E1 1.800
0.390 0.340 E2 0.290
3.075 3.000 E3 0.175
2.375 2.275
L 0.300
1.180 1.080
Z
0.305 0.205
All Dimensions in mm
Max
3.075
2.000
0.490
0.375
0.40
-
Typ
0.650
3.000
1.900
0.390
0.275
0.350
0.355
L
Z
e
BOTTOM VIEW
Suggested Pad Layout
C
X
G6
C
G
G1
G2
G3
G4
G5
G6
X
X1
G
Y5
Y2
X4
G3
G2
G1
Y
Dimensions
X3
Y3
Y1
G4
Y4
G5
X5
X1
DLD101
Document number: DS32007 Rev. 6 - 2
X2
Value
Value
Dimensions
(in mm)
(in mm)
0.650
X2
0.220
0.150
X3
0.375
0.950
X4
1.080
0.270
X5
0.150
0.135
Y
2.600
1.350
Y1
1.900
0.925
Y2
0.150
1.350
Y3
0.390
0.440
Y4
0.815
0.210
Y5
0.550
X3
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February 2010
© Diodes Incorporated
DLD101
IMPORTANT NOTICE
NEW PRODUCT
DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).
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without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the
application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or
trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume
all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated
website, harmless against all damages.
Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.
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Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express
written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
A. Life support devices or systems are devices or systems which:
1. are intended to implant into the body, or
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labeling can be reasonably expected to result in significant injury to the user.
B.
A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
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Copyright © 2009, Diodes Incorporated
www.diodes.com
DLD101
Document number: DS32007 Rev. 6 - 2
7 of 7
www.diodes.com
February 2010
© Diodes Incorporated
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