LINER LT3585-0 Photofl ash chargers with adjustable input current and igbt driver Datasheet

LT3585-0/LT3585-1
LT3585-2/LT3585-3
Photoflash Chargers with
Adjustable Input Current
and IGBT Drivers
DESCRIPTIO
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FEATURES
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The LT®3585 series are highly integrated ICs designed to
charge photoflash capacitors in digital and film cameras.
A new control technique allows for the use of extremely
small transformers. Each part contains an on-chip high
voltage NPN power switch. Output voltage detection is
completely contained within the part, eliminating the need
for any discrete zener diodes or resistors. The output voltage can be adjusted by simply changing the turns ratio
of the transformer.
Adjustable Input Current
Integrated IGBT Driver
No Output Voltage Divider Needed
Uses Small Transformers: 5.8mm × 5.8mm × 3mm
Fast Photoflash Charge Times
Charges Any Size Photoflash Capacitor
Supports Operation from Single Li-Ion Cell, Two AA
Cells or any Supply from 1.5V Up to 16V
Small 10-Lead (3mm × 2mm) DFN Package
Fast Charge Time
NORMAL MODE
INPUT
CHARGE TIME
VERSION
CURRENT (mA)
(Sec)
LT3585-3
800/400
3.3
LT3585-0
550/275
4.6
LT3585-2
400/200
5.8
LT3585-1*
250/115
5.0
100µF capacitor, 320V, VIN = VBAT = 3.6V
*50µF capacitor, 320V, VIN = VBAT = 3.6V
The CHRG/IADJ pin gives full control of the part to the
user. Driving CHRG/IADJ low puts the part in low power
shutdown. The CHRG/IADJ pin can also be used to reduce
the input current of the charger, useful in extending battery
life. The DONE pin indicates when the part has completed
charging.
REDUCED MODE
CHARGE TIME
(Sec)
6.6
9.2
12.6
14.6
The LT3585 series of parts are housed in tiny 3mm ×
2mm DFN packages.
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APPLICATIO S
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, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Digital/Film Camera Flash
PDA/Cell Phone Flash
Emergency Strobe
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TYPICAL APPLICATIO
LT3585-1 Photoflash Charger Uses High Efficiency
2mm Tall Transformers with Tunable IGBT Gate Drive
LT3585-1 Charging Waveform
Normal Input Current Mode
DANGER HIGH VOLTAGE! OPERATION BY HIGH VOLTAGE TRAINED PERSONNEL ONLY
VBAT
2 AA OR
1 TO 2 Li-Ion
1:10:2
1
4.7µF
2
VBAT
320V
4
•
•5
1M
+
50µF
PHOTOFLASH
CAPACITOR
SW
DONE
0.22µF
A
TRIGGER T
GND
1
2
FLASHLAMP
C
IIN
500mA/DIV
IGBTPWR
IGBTIN
VOUT
50V/DIV
3
CHRG/IADJ
LT3585-1
VIN
VIN
5V
2.2µF
600V
IGBTPU
TO GATE OF IGBT
IGBTPD
20Ω TO
160Ω
VBAT = 3.6V
COUT = 50µF
3585 TA01a
1sec/DIV
3585 TA01b
3585f
1
LT3585-0/LT3585-1
LT3585-2/LT3585-3
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ABSOLUTE
AXI U RATI GS
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PACKAGE/ORDER I FOR ATIO
(Note 1)
VIN Voltage ................................................................16V
VBATT Voltage ............................................................16V
SW Voltage ...............................................................60V
SW Pin Negative Current...........................................–1A
CHRG/IADJ Voltage...................................................10V
IGBTPWR Voltage .....................................................10V
IGBTIN Voltage .........................................................10V
IGBTPU Voltage ........................................................10V
IGBTPD Voltage ........................................................10V
DONE Voltage ...........................................................10V
Current Into DONE Pin ............................... 0.2mA/–1mA
Maximum Junction Temperature .......................... 125°C
Operating Temperature Range (Note 2) ... –40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
TOP VIEW
IGBTIN 1
10 IGBTPU
IGBTPWR 2
9
IGBTPD
8
SW
VIN 4
7
CHRG/IADJ
VBAT 5
6
DONE
GND 3
11
DDB PACKAGE
10-LEAD (3mm × 2mm) PLASTIC DFN
TJMAX = 125°C, θJA = 76°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER
DDB PART MARKING
LT3585EDDB-0
LT3585EDDB-1
LT3585EDDB-2
LT3585EDDB-3
LCLK
LCLJ
LCLH
LCFX
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = VBAT = VCHRG = 3V unless otherwise noted (Note 2). Specifications
are for the LT3585-0, LT3585-1, LT3585-2, LT3585-3 unless otherwise noted.
PARAMETER
CONDITIONS
Quiescent Current
VCHRG = 3V, Not Switching
VCHRG = 0V, In Shutdown
●
VIN Voltage Range
●
VBAT Voltage Range
Switch Current Limit
LT3585-3 (Note 3)
LT3585-0 (Note 3)
LT3585-2 (Note 3)
LT3585-1 (Note 3)
Switch VCESAT
LT3585-3, ISW = 1.4A
LT3585-0, ISW = 1A
LT3585-2, ISW = 700mA
LT3585-1, ISW = 400mA
VOUT Comparator Trip Voltage
Measured as VSW – VBAT
VOUT Comparator Overdrive
300ns Pulse Width
DCM Comparator Trip Voltage
Measured as VSW – VBAT
CHRG/IADJ Pin Current
VCHRG = 3V
VCHRG = 0V
Switch Leakage Current
VBAT = VSW = 5V, In Shutdown
CHRG/IADJ Minimum Enable Voltage
MIN
TYP
MAX
5
0
8
1
mA
µA
16
V
2.5
1.5
1.55
1.1
0.75
0.45
1.7
1.2
0.85
0.55
16
V
1.85
1.3
0.95
0.65
A
A
A
A
485
330
230
140
●
31
30.5
80
●
●
1.1
UNITS
mV
mV
mV
mV
31.5
31.5
32
32.5
V
V
200
400
mV
130
180
mV
45
0
70
0.1
µA
µA
0.01
1
µA
V
3585f
2
LT3585-0/LT3585-1
LT3585-2/LT3585-3
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = VBAT = VCHRG = 3V unless otherwise noted (Note 2). Specifications
are for the LT3585-0, LT3585-1, LT3585-2, LT3585-3 unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
CHRG/IADJ Three-State Voltage for Reduced Input
Current
CHRG/IADJ > 1.1V then Float
1.1
1.28
1.4
V
10
V
0.3
V
CHRG/IADJ Voltage Range for Normal Input Current
●
CHRG/IADJ Low Voltage
●
Delay Time for Reduced Input Current Mode
1.6
UNITS
CHRG/IADJ Pin Three Stated:
VBAT = 4.2V, Fresh Li-Ion Cell
VBAT = 2.8V, Dead Li-Ion Cell
VBAT = 3V, Fresh 2 AA Cells
VBAT = 2V, Dead 2 AA Cells
5.2
7.2
6.8
9.5
µs
µs
µs
µs
Minimum CHRG/IADJ Pin Low Time
High→Low→High
20
µs
DONE Output Signal High
100kΩ from VIN to DONE
3
V
DONE Output Signal Low
33µA into DONE Pin
DONE Leakage Current
VDONE = 3V, DONE NPN Off
IGBTPWR Voltage Range
●
2.5
IGBT Input High Level
●
1.5
IGBT Input Low Level
●
120
200
mV
1
100
nA
10
V
V
0.5
V
IGBT Output Rise Time
IGBTPU Pin, COUT = 4000pF,
IGBTPWR = 5V, IGBTIN = 0V→1.5V, 10%→90%
0.4
µs
IGBT Output Fall Time
IGBTPD Pin, COUT = 4000pF,
IGBTPWR = 5V, IGBTIN = 1.5V→0V, 90%→10%
0.13
µs
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime. Ratings are for DC levels only.
Note 2: The LT3585 series is guaranteed to meet performance
specifications from 0°C to 85°C. Specifications over the – 40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3: Current limit is guaranteed by design and/or correlation to static
test.
3585f
3
LT3585-0/LT3585-1
LT3585-2/LT3585-3
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TYPICAL PERFOR A CE CHARACTERISTICS
LT3585-0 curves use Figure 11, LT3585-1 curves
use Figure 12, LT3585-2 curves use Figure 13 and LT3585-3 curves use Figure 14 unless otherwise noted.
LT3585-0 Charging Waveform
Normal Input Current Mode
LT3585-1 Charging Waveform
Normal Input Current Mode
VOUT
50V/DIV
LT3585-2 Charging Waveform
Normal Input Current Mode
VOUT
50V/DIV
VOUT
50V/DIV
AVERAGE
INPUT
CURRENT
1A/DIV VBAT = 3.6V
COUT = 50µF
0.5s/DIV
3585 G01
AVERAGE
INPUT
CURRENT
500mA/DIV VBAT = 3.6V
COUT = 50µF
LT3585-3 Charging Waveform
Normal Input Current Mode
2s/DIV
3585 G02
LT3585-0 Charging Waveform
Reduced Input Current Mode
VOUT
50V/DIV
0.5s/DIV
3585 G04
VOUT
50V/DIV
AVERAGE
INPUT
CURRENT
1A/DIV VBAT = 3.6V
COUT = 50µF
LT3585-2 Charging Waveform
Reduced Input Current Mode
3585 G03
1s/DIV
LT3585-1 Charging Waveform
Reduced Input Current Mode
VOUT
50V/DIV
AVERAGE
INPUT
CURRENT
1A/DIV VBAT = 3.6V
COUT = 50µF
AVERAGE
INPUT
CURRENT
1A/DIV VBAT = 3.6V
COUT = 50µF
0.5s/DIV
3585 G05
AVERAGE
INPUT
CURRENT
500mA/DIV VBAT = 3.6V
COUT = 50µF
LT3585-3 Charging Waveform
Reduced Input Current Mode
3585 G06
2s/DIV
Charge Time*
Normal Input Current Mode
8
LT3585-0
LT3585-1
LT3585-2
LT3585-3
VOUT
50V/DIV
AVERAGE
INPUT
CURRENT
1A/DIV VBAT = 3.6V
COUT = 50mF
CHARGE TIME (SECONDS)
7
VOUT
50V/DIV
1s/DIV
3585 G07
AVERAGE
INPUT
CURRENT
1A/DIV VBAT = 3.6V
COUT = 50µF
0.5s/DIV
6
5
4
3
2
3585 G08
1
0
2
3
4
5
6
VBAT (V)
7
8
10
9
3585 G09
*USING RUBYCON 330V, 50µF PHOTOFLASH
OUTPUT CAPACITOR (FW SERIES)
3585f
4
LT3585-0/LT3585-1
LT3585-2/LT3585-3
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TYPICAL PERFOR A CE CHARACTERISTICS
LT3585-0 curves use Figure 11, LT3585-1 curves
use Figure 12, LT3585-2 curves use Figure 13 and LT3585-3 curves use Figure 14 unless otherwise noted.
Charge Time*
Reduced Input Current Mode
20
15
10
5
700
300
600
250
INPUT CURRENT (mA)
LT3585-0
LT3585-1
LT3585-2
LT3585-3
INPUT CURRENT (mA)
CHARGE TIME (SECONDS)
25
500
400
300
200
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
100
2
3
5
4
6
7
8
100
800
350
700
250
200
150
100
200
300
3585 G12
LT3585-0 Input Current
Reduced Input Current Mode
350
300
600
500
400
300
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
100
0
200
0
VOUT (V)
200
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
100
300
INPUT CURRENT (mA)
900
INPUT CURRENT (mA)
450
400
0
200
LT3585-3 Input Current
Normal Input Current Mode
300
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
3585 G11
LT3585-2 Input Current
Normal Input Current Mode
50
100
VOUT (V)
3585 G10
VBAT (V)
*USING RUBYCON 330V, 50µF PHOTOFLASH
OUTPUT CAPACITOR (FW SERIES)
100
150
0
0
10
9
200
50
0
0
INPUT CURRENT (mA)
LT3585-1 Input Current
Normal Input Current Mode
LT3585-0 Input Current
Normal Input Current Mode
0
100
VOUT (V)
200
200
150
100
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
50
0
300
250
0
300
0
100
VOUT (V)
200
300
VOUT (V)
3585 G13
3585 G14
LT3585-1 Input Current
Reduced Input Current Mode
3585 G15
LT3585-2 Input Current
Reduced Input Current Mode
120
LT3585-3 Input Current
Reduced Input Current Mode
250
500
200
400
INPUT CURRENT (mA)
INPUT CURRENT (mA)
80
60
40
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
20
0
INPUT CURRENT (mA)
450
100
150
100
50
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
0
0
100
200
300
VOUT (V)
0
100
200
300
VOUT (V)
3585 G16
350
300
250
200
150
100
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
50
0
0
100
200
300
VOUT (V)
3585 G17
3585 G18
3585f
5
LT3585-0/LT3585-1
LT3585-2/LT3585-3
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TYPICAL PERFOR A CE CHARACTERISTICS
LT3585-0 curves use Figure 11, LT3585-1 curves
use Figure 12, LT3585-2 curves use Figure 13 and LT3585-3 curves use Figure 14 unless otherwise noted.
LT3585-0 Efficiency
Normal Input Current Mode
90
USING KIJIMA SBL-5.6-1 TRANSFORMER
70
60
80
70
60
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
50
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
50
50
100
150
200
VOUT (V)
300
250
50
50
100
150
200
VOUT (V)
300
250
3585 G19
50
USING KIJIMA SBL-5.6S-1 TRANSFORMER
80
EFFICIENCY (%)
EFFICIENCY (%)
80
80
70
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
50
50
50
50
300
250
100
150
200
VOUT (V)
250
50
300
LT3585-2 Efficiency
Reduced Input Current Mode
90
90
USING KIJIMA SBL-5.6-1 TRANSFORMER
80
LT3585-0 Output Voltage
USING TDK LDT565630T-041
TRANSFORMER
328
VOUT (V)
EFFICIENCY (%)
70
100
150
200
VOUT (V)
250
300
3585 G25
326
324
60
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
50
300
250
330
80
60
150
200
VOUT (V)
3585 G24
LT3585-3 Efficiency
Reduced Input Current Mode
70
100
3585 G23
3585 G22
50
70
60
60
60
300
90
USING KIJIMA SBL-5.6-1 TRANSFORMER
USING TDK LDT565630T-041
TRANSFORMER
150
200
VOUT (V)
250
LT3585-1 Efficiency
Reduced Input Current Mode
90
90
100
150
200
VOUT (V)
3585 G21
LT3585-0 Efficiency
Reduced Input Current Mode
70
100
3585 G19
LT3585-3 Efficiency
Normal Input Current Mode
50
70
60
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
EFFICIENCY (%)
USING KIJIMA SBL-5.6-1 TRANSFORMER
80
EFFICIENCY (%)
EFFICIENCY (%)
90
USING KIJIMA SBL-5.6S-1 TRANSFORMER
80
EFFICIENCY (%)
LT3585-2 Efficiency
Normal Input Current Mode
EFFICIENCY (%)
90
LT3585-1 Efficiency
Normal Input Current Mode
VBAT = 4.2V
VBAT = 3.6V
VBAT = 2.5V
TA = –40°C
TA = 25°C
TA = 85°C
322
50
50
100
150
200
VOUT (V)
250
300
3585 G26
2
3
4
5
VBAT (V)
6
7
8
3585 G27
3585f
6
LT3585-0/LT3585-1
LT3585-2/LT3585-3
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TYPICAL PERFOR A CE CHARACTERISTICS
LT3585-0 curves use Figure 11, LT3585-1 curves
use Figure 12, LT3585-2 curves use Figure 13 and LT3585-3 curves use Figure 14 unless otherwise noted.
LT3585-1 Output Voltage
LT3585-2 Output Voltage
324
318
322
316
TA = –40°C
TA = 25°C
TA = 85°C
314
330
330
TA = –40°C
TA = 25°C
TA = 85°C
318
312
3
4
5
6
7
VBAT (V)
314
8
326
324
322
316
2
TA = –40°C
TA = 25°C
TA = 85°C
328
VOUT (V)
320
310
LT3585-3 Output Voltage
326
VOUT (V)
VOUT (V)
322
2
3
4
5
6
7
320
8
2
3
VBAT (V)
3585 G28
4
5
VBAT (V)
6
7
3585 G29
LT3585-0 Switch Waveform
Normal Input Current Mode
VSW
10V/DIV
IPRI
1A/DIV
IPRI
1A/DIV
VBAT = 3.6V
VOUT = 100V
2µs/DIV
3585 G30
LT3585-0 Switch Waveform
Reduced Input Current Mode
VSW
10V/DIV
3585 G31
LT3585-0 Switch Waveform
Normal Input Current Mode
VSW
10V/DIV
IPRI
1A/DIV
VBAT = 3.6V
VOUT = 100V
LT3585-0 Switch Waveform
Reduced Input Current Mode
2µs/DIV
3585 G32
VBAT = 3.6V
VOUT = 300V
1.8
10
1.5
2µs/DIV
3585 G34
SWITCH CURRENT (mA)
CURRENT LIMIT (A)
VBAT = 3.6V
VOUT = 300V
8
LT3585-0
1.2
0.9
LT3585-2
0.6
LT3585-1
3585 G33
SW PIN IS RESISTIVE UNTIL BREAKDOWN
VOLTAGE DUE TO INTEGRATED RESISTORS.
THIS DOES NOT INCREASE QUIESCENT
CURRENT OF THE PART
TA = –40°C
TA = 25°C
TA = 85°C
9
LT3585-3
IPRI
1A/DIV
2µs/DIV
LT3585-0/LT3585-1/LT3585-2/
LT3585-3 Switch Breakdown
Voltage
Switch DC Current Limit*
VSW
10V/DIV
8
7
6
5
4
3
2
0.3
1
0
–50 –30 –10 10 20 30 40 60
TEMPERATURE (°C)
*DYNAMIC CURRENT LIMIT IS HIGHER
THAN DC CURRENT LIMIT
80
3585 G35
0
0
10 20 30 40 50 60 70 80 90 100
SWITCH VOLTAGE (V)
3585 G36
3585f
7
LT3585-0/LT3585-1
LT3585-2/LT3585-3
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PI FU CTIO S
IGBTIN (Pin 1): Logic Input for the IGBT Driver. When this
pin is driven higher than 1.5V, the output goes high. When
the pin is below 0.5V, the output will go low.
IGBTPWR (Pin 2): Supply Pin for the IGBT Driver. Must be
locally bypassed with a good quality ceramic capacitor. The
minimum operating voltage for the IGBT driver is 2.5V.
GND (Pin 3): Ground. Tie directly to local ground plane.
VIN (Pin 4): Input Supply Pin. Must be locally bypassed
with a good quality ceramic capacitor. The minimum
operating voltage for VIN is 2.5V.
VBAT (Pin 5): Battery Supply Pin. Must be locally bypassed
with a good quality ceramic capacitor. The minimum
operating voltage for VBAT is 1.5V.
DONE (Pin 6): Open NPN Collector Indication Pin. When
target output voltage is reached, NPN turns on. This pin
needs a proper pull-up resistor or current source.
CHRG/IADJ (Pin 7): Charge and Input Current Adjust Pin.
A low (<0.3V) to high (>1.1V) transition on this pin puts
the part into power delivery mode. Once the target output
voltage is reached, the part will stop charging the output.
Toggle this pin to start charging again. Ground to shut
down. To enter into the input current reduction mode, the
voltage on this pin should be driven high ( >1.1V ) and
then floated. (For more information refer to the Operation
section of this data sheet.) To enter normal mode, the
voltage should be driven higher than 1.6V.
SW (Pin 8): Switch Pin. This is the collector of the internal
NPN Power switch. Minimize the metal trace area connected
to this pin to minimize EMI. Tie one side of the primary
of the transformer to this pin. The target output voltage
is set by the turns ratio of the transformer.
Choose turns ratio N by the following equation:
N=
VOUT + 2
31.5
where VOUT is the desired output voltage.
IGBTPD (Pin 9): Pull-down Output for IGBT Gate. Connect
this pin to the IGBT Gate. Add a series resistor to increase
the turn-off time to protect the IGBT.
IGBTPU (Pin 10): Pull-up Output for IGBT Gate. Connect
this pin to the gate of the IGBT.
Exposed Pad (Pin 11): Ground. Tie directly to local ground
plane.
3585f
8
LT3585-0/LT3585-1
LT3585-2/LT3585-3
W
W
SI PLIFIED BLOCK DIAGRA
D1
T1
PRIMARY
C1
VIN
C2
6
4
5
VIN
CHIP
POWER
8
SW
VBAT
R2
60k
1.5V
MAX
2.5V
MAX
–
+
–
+
A5
•
DCM
COMPARATOR
A4
UVLO
+
A3
COUT
+
Q3
+
–
Q2
130mV
Q1
ENABLE
MASTER
LATCH
Q
S
Q
R
R1
2.5k
UVLO
+
VOUT
COMPARATOR
CHRG/IADJ
VARIABLE
DELAY
DRIVER
A2
–
1.25V
REFERENCE
S
R SWITCH Q
LATCH
Q1
+
RESET
DOMINANT
ONE SHOT
7
A1
2
20mV
–
IGBTPWR
+–
RM
GND
IGBTPU
1
IGBTIN
VOUT
–
DONE
•
SECONDARY
TO BATTERY
IGBT DRIVE
CIRCUITRY
IGBTPD
3
10
9
3585 F01
LT3585-3, RM = 12mΩ
LT3585-0, RM = 17mΩ
LT3585-2, RM = 24mΩ
LT3585-1, RM = 36mΩ
Figure 1
3585f
9
LT3585-0/LT3585-1
LT3585-2/LT3585-3
U
OPERATIO
The LT3585 series of parts operate on the edge of discontinuous conduction mode. When CHRG/IADJ is driven
higher than 1.1V, the master latch is set. This enables the
part to deliver power to the photoflash capacitor. When
the power switch, Q1, is turned on, current builds up in
the primary of the transformer. When the desired current
level is reached, the output of comparator A1 goes high,
resetting the switch latch that controls the state of Q1, and
the output of the DCM comparator goes low. Q1 now turns
off and the flyback waveform on the SW node quickly rises
to a level proportional to VOUT. The secondary current flows
through high voltage diode(s), D1, and into the photoflash
capacitor. When the secondary current decays to zero,
the voltage on the SW node collapses. When this voltage
reaches 130mV higher than VBAT, the output of A3 goes
high. This sets the switch latch and the power switch, Q1,
turns back on. This cycle repeats until the target VOUT level
is reached. When the target VOUT is reached, the master
latch resets and the DONE pin goes low.
The input current of an LT3585 series circuit can be
reduced by changing the voltage of the CHRG/IADJ pin.
When this pin is between 1.1V and 1.4V, a time delay is
Normal Operation
CHRG/IADJ ≥ 1.6V
IPRI
TIME
added between when A3 goes high and the switch latch
is set, see Figure 2. If the part is enabled, and the CHRG/
IADJ pin is floated, internal circuitry drives the voltage on
the pin to 1.28V. This allows a single I/O port pin, which
can be three-stated, to enable or disable the part as well
as place the part into the input current reduction mode.
This feature effectively reduces the average input current
into the flyback transformer. The magnitude of the delay
decreases with increasing VBAT. This causes the reduced
average input current to remain relatively flat with changes
in VBAT. When CHRG/IADJ is brought higher than 1.6V,
no delay is added. The CHRG/IADJ pin functionality is
shown in Figure 3.
Both VBAT and VIN have undervoltage lockout (UVLO). When
one of these pins goes below its UVLO voltage, the DONE
pin goes low. With an insufficient bypass capacitor on VBAT
or VIN, the ripple on the pin is likely to activate UVLO and
terminate the charge. The applications circuits in the data
sheet suggest values adequate for most applications.
The LT3585 series also includes an integrated IGBT driver.
There are two output pins, IGBTPU and IGBTPD. The
IGBTPU pin is used to pull the gate of the IGBT up. This
should be done quickly to guarantee proper Xenon lamp
ignition. Tie this pin directly to the gate of the IGBT. The
IGBTPD pin is pinned out separately to allow for greater
flexibility in choosing a series resistor between the pin and
the gate of the IGBT. This resistor can be used to slow
down the turn off of the IGBT.
VSW
VOUT
100V/DIV
TIME
Reduced Input Current
DONE
2V/DIV
CHRG/IADJ Three Stated
IPRI
CHRG/IADJ
2V/DIV
TIME
LT3585-1
VBAT = 3.6V
COUT = 50µF
Extra Delay Added
(~5.2µs at VBAT = 4.2V)
VSW
<0.3V
3585 F02
TIME
Figure 2. Normal and Reduced Input Current Waveforms
THREE
STATE*
1sec/DIV
CHRG/IADJ PIN STATE
3V
<0.3V
3V
*MUST TAKE CHRG/IADJ PIN ABOVE 1.1V, THEN FLOAT
<0.3V
3585 F03
Figure 3. Basic Operation
3585f
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LT3585-0/LT3585-1
LT3585-2/LT3585-3
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Choosing the Right Device
(LT3585-0/LT3585-1/LT3585-2/LT3585-3)
The only difference between the four versions of the
LT3585 series is the peak current level. For the fastest
possible charge time, use the LT3585-3. The LT3585-1
has the lowest peak current capability, and is designed
for applications that need a more limited drain on the
batteries. Due to the lower peak current, the LT3585-1
can use a physically smaller transformer. The LT3585-0
and LT3585-2 have a current limit in between that of the
LT3585-1 and the LT3585-3.
Transformer Design
The flyback transformer is a key element for any LT3585-0/
LT3585-1/LT3585-2/LT3585-3 design. It must be designed
carefully and checked that it does not cause excessive current or voltage on any pin of the part. The main parameters
that need to be designed are shown in Table 1. The first
transformer parameter that needs to be set is the turns
ratio, N. The LT3585-0/LT3585-1/LT3585-2/LT3585-3
accomplish output voltage detection by monitoring the
flyback waveform on the SW pin. When the SW voltage
reaches 31.5V higher than the VBAT voltage, the part halts
power delivery. Thus, the choice of N sets the target output
voltage and changes the amplitude gain of the reflected
voltage from the output to the SW pin. Choose N according
to the following equation:
N=
VOUT + 2
31.5
drop across the output diode(s). Thus, for a 320V output,
N should be 322/31.5 or 10.2. For a 300V output, choose
N equal to 302/31.5 or 9.6. The next parameter that needs
to be set is the primary inductance, LPRI. Choose LPRI
according to the following formula:
VOUT • 200 • 10 – 9
LPRI ≥
N • IPK
where VOUT is the desired output voltage. N is the transformer turns ratio. IPK is 1.4 (LT3585-0), 0.7 (LT3585-1),
1 (LT3585-2) and 2 (LT3585-3). LPRI needs to be equal
or larger than this value to ensure that the LT3585 series
has adequate time to respond to the flyback waveform.
All other parameters need to meet or exceed the recommended limits as shown in Table 1. A particularly important
parameter is the leakage inductance, LLEAK. When the
power switch of the LT3585 series turns off, the leakage
inductance on the primary of the transformer causes a
voltage spike to occur on the SW pin. The height of this
spike must not exceed 50V, even though the absolute
maximum rating of the SW pin is 60V. The 60V absolute
maximum rating is a DC blocking voltage specification,
which assumes that the current in the power NPN is zero.
Figure 4 shows the SW voltage waveform for the circuit
of Figure 8 (LT3585-0). Note that the absolute maximum
rating of the SW pin is not exceeded. Make sure to check
the SW voltage waveform with VOUT near the target output
voltage, as this is the worst-case condition for SW voltage. Figure 5 shows the various limits on the SW voltage
during switch turn off.
where VOUT is the desired output voltage. The number 2
in the numerator is used to include the forward voltage
Table 1. Recommended Transformer Parameters
PARAMETER
NAME
LPRI
Primary Inductance
LLEAK
Primary Leakage Inductance
N
VISO
TYPICAL RANGE
LT3585-0
TYPICAL RANGE
LT3585-1
TYPICAL RANGE
LT3585-2
TYPICAL RANGE
LT3585-3
UNITS
>5
>10
>7
>3.5
µH
100 to 300
200 to 500
200 to 500
100 to 300
nH
Secondary/Primary Turns Ratio
8 to 12
8 to 12
8 to 12
8 to 12
Secondary to Primary Isolation
Voltage
>500
>500
>500
>500
V
ISAT
Primary Saturation Current
>1.6
>0.8
>1.0
>2
RPRI
Primary Winding Resistance
<300
<500
<400
<200
mΩ
A
RSEC
Secondary Winding Resistance
<40
<80
<60
<30
Ω
3585f
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LT3585-2/LT3585-3
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Output Diode Selection
The rectifying diode(s) should be low capacitance type
with sufficient reverse voltage and forward current ratings. The peak reverse voltage that the diode(s) will see
is approximately:
VSW
10V/DIV
VPK(R) = VOUT + (N • VBAT)
The peak current of the diode is simply:
VBAT = 3.6V
VOUT = 320V
3585 F04
100ns/DIV
IPK(SEC) =
2
(LT3585-3)
N
IPK(SEC) =
1.4
(LT3585-0)
N
IPK(SEC) =
1
(LT3585-2)
N
IPK(SEC) =
0.7
(LT3585-1)
N
Figure 4. LT3585 SW Voltage Waveform
B
MUST BE
LESS THAN 60V
MUST BE
LESS THAN 50V
A
VSW
0V
3585 F05
Figure 5. New Transformer Design Check
It is important not to minimize the leakage inductance to
a very low level. Although this would result in a very low
leakage spike on the SW pin, the parasitic capacitance of the
transformer would become large. This will adversely affect
the charge time of the photoflash circuit. Linear Technology
has worked with several leading magnetic component manufacturers to produce predesigned flyback transformers
for use with the LT3585-0 /LT3585-1/LT3585-2/LT3585-3.
Table 2 shows the details of several of these transformers.
For the circuit of Figure 8 with VBAT of 5V, VPK(R) is 371V
and IPK(SEC) is 137mA. The GSD2004S dual silicon diode
is recommended for most applications. Table 3 shows
the various diodes and relevant specifications. Use the
appropriate number of diodes to achieve the necessary
reverse breakdown voltage.
Capacitor Selection
For the input bypass capacitors, high quality X5R or X7R
types should be used. Make sure the voltage capability of
the part is adequate.
Table 2. Predesigned Transformers—Typical Specifications Unless Otherwise Noted
FOR USE
WITH
TRANSFORMER
DESIGNATION
SIZE
(W × L × H) (mm)
LPRI
(µH)
LPRI LEAKAGE
(nH )
N
RPRI
(mΩ)
RSEC
(Ω)
LT3585-1
LT3585-0/
LT3585-2
SBL-5.6S-1
SBL-5.6-1
5.6 × 8.5 × 3.0
5.6 × 8.5 × 4.0
24
10
400 Max
200 Max
10.2
10.2
305
103
55
26
LT3585-1
LT3585-0
LT3585-1
LT3585-2
LT3585-3
LDT565620ST-203
LDT565630T-001
LDT565630T-002
LDT565630T-003
LDT565630T-041
5.8 × 5.8 × 2.0
5.8 × 5.8 × 3.0
5.8 × 5.8 × 3.0
5.8 × 5.8 × 3.0
5.8 × 5.8 × 3.0
8.2
6
14.5
10.5
4.7
390 Max
200 Max
500 Max
550 Max
150 Max
10.2
10.4
10.2
10.2
10.4
370 Max
100 Max
240 Max
210 Max
90 Max
11.2 Max
10 Max
16.5 Max
14 Max
6.4 Max
LT3585-0
LT3585-1
LT3585-2
LT3585-3
TTRN-0530-000-T
TTRN-0530-012-T
TTRN-0530-021-T
TTRN-0530-022-T
5.0 × 5.0 × 3.0
5.0 × 5.0 × 3.0
5.0 × 5.0 × 3.0
5.0 × 5.0 × 3.0
6.6
16.0
11.8
4.0
200 Max
400 Max
300 Max
300 Max
10.3
10.3
10.3
10.3
128 Max
515 Max
256 Max
102 Max
28 Max
32 Max
37 Max
16 Max
VENDOR
Kijima Musen
Hong Kong Office
852-2489-8266
TDK
Chicago Sales Office
(847) 803-6100
www.components.tdk.com
Tokyo Coil Engineering
Japan Office
0426-56-6262
3585f
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LT3585-0/LT3585-1
LT3585-2/LT3585-3
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2.0
1.8
1.6
1.4
FALL TIME (µs)
IGBTIN
1V/DIV
IGBTOUT
2V/DIV
1.2
1.0
0.8
0.6
0.4
0.2
IGBTPWR = 5V
COUT = 4000pF
RPD = 50Ω
3585 F06
500ns/DIV
0
0
50
100
RPD (Ω)
200
150
3585 F07
Figure 6. IGBT Driver Output with 4000pF Load
Figure 7. IGBT Turn-Off Delay vs RPD
Table 3. Recommended Output Diodes
MAX REVERSE
VOLTAGE (V)
MAX CONTINUOUS
FORWARD CURRENT (mA)
CAPACITANCE (pF)
GSD2004S
(DUAL DIODE)
2 × 300
225
5
Vishay
(402) 563-6866
www.vishay.com
CMSD2004S
(DUAL DIODE)
2 × 300
225
5
Central Semiconductor
(631) 435-1110
www.centralsemi.con
MMBD3004S
(DUAL DIODE)
2 × 350
225
5
Diodes, Inc
(816) 251-8800
www.diodes.com
PART
IGBT Drive
The IGBT is a high current switch for the 100A+ current
through the photoflash lamp. To create a redeye effect or
to adjust the light output, the lamp current needs to be
stopped or quenched with an IGBT before discharging
the photoflash capacitor fully. The IGBT device also controls the 4kV trigger pulse required to ionize the Xenon
gas in the photoflash lamp. Figure 8 is a schematic of a
fully functional photoflash application with the LT3585-0
serving as the IGBT driver. An IGBT driver charges the
gate capacitance to start the flash. The IGBT driver does
not need to pull up the gate significantly fast because of
the inherently slow nature of the IGBT. A rise time of 2µs
is sufficient to charge the gate of the IGBT and create a
trigger pulse. With slower rise times, the trigger circuitry
will not have a fast enough edge to create the required
4kV pulse. The fall time of the IGBT driver is critical to the
VENDOR
safe operation of the IGBT. The IGBT gate is a network of
resistors and capacitors, as shown in Figure 9. When the
gate terminal is pulled low, the capacitance closest to the
terminal goes low but the capacitance further from the
terminal remains high. This causes a smaller portion of
the device to handle a larger portion of the current, which
can damage the device. The pull-down circuitry needs to
pull down slower than the internal RC time constant in
the gate of the IGBT. This is easily accomplished with a
resistor placed in series with the IGBTPD pin.
The LT3585 series integrated IGBT drive circuit is independent of the charging function and draws its power from
the IGBTPWR pin. The drive pulls high to within 200mV
of IGBTPWR and pulls down to 100mV. The circuit’s
switching waveform is shown in Figure 6. The rise and fall
times are measured using a 4000pF output capacitor. The
typical 10% to 90% rise time is 320ns when IGBTPWR
3585f
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LT3585-0/LT3585-1
LT3585-2/LT3585-3
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APPLICATIO S I FOR ATIO
to drop to approximately 0.1µA during idle conditions.
The pull-down circuit will clamp the output below 0.8V for
currents not exceeding 10mA in its idle state. The pull-up
network is always active when the IGBTIN is greater than
1.5V. Table 4 is a list of recommended IGBT devices for
strobe applications. These devices are all packaged in
8-lead TSSOP packages unless otherwise noted.
is 5V and IGBTIN is driven by a 5V signal. The typical
90% to 10% fall time is 125ns but varies with RPD given
by Figure 7. The IGBT driver pulls a peak of 50mA when
driving an IGBT with minimal quiescent current. In the
low state, an active pull-down network is used during the
initial transition but is deactivated after an internal time
constant. This allows the IGBT driver’s quiescent current
Table 4. Recommended IGBTs
PART
DRIVE VOLTAGE (V)
BREAKDOWN VOLTAGE (V)
COLLECTOR CURRENT
(PULSED) (A)
2.5
4
2.5
4
400
400
400
400
150
150
150
150
Renesas
(408) 382-7500
www.renesas.com
4
400
150
Toshiba Semiconductor
(949) 623-2900
www.semicon.toshiba.co.jp/eng
CY25CAH-8F*
CY25CAJ-8F*
CY25BAH-8F
CY25BAJ-8F
GT8G133
VENDOR
*Packaged in 8-lead VSON-8 pacakge.
DANGER HIGH VOLTAGE! OPERATION BY HIGH VOLTAGE TRAINED PERSONNEL ONLY
VBAT
2 AA OR
1 TO 2 Li-Ion
T1
1:10:2
1
C1
4.7mF
2
VBAT
C3
0.22mF
320V
4
•5
SW
DONE
VIN
5V
•
D1
R1
1M
+
C2
50mF
PHOTOFLASH
CAPACITOR
C4
2.2mF
600V
A
TRIGGER T
GND
1
FLASHLAMP
3
CHRG/IADJ
LT3585-0
VIN
2
C
IGBTPWR
IGBTIN
IGBTPU
TO GATE OF IGBT
IGBTPD
RPD
20W TO 160W
3585 F08
Figure 8. Complete Xenon Circuit
GATE
3585 F09
EMITTER
Figure 9. IGBT Gate
3585f
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LT3585-0/LT3585-1
LT3585-2/LT3585-3
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Board Layout
The high voltage operation of these parts demand careful attention to board layout. You will not get advertised
performance with careless layout. Figure 10 shows the
recommended component placement. Keep the area for the
high voltage end of the secondary as small as possible. Also
note the larger than minimum spacing for all high voltage
nodes in order to meet breakdown voltage requirements for
the circuit board. It is imperative to keep the electrical path
formed by C1, the primary of T1, and the LT3585 series IC
as short as possible. If this path is haphazardly made long,
IGBTIN
TO GATE OF IGBT VBAT
C1
10
IGBTPWR
2
9
GND
3
VIN
4
7
5
6
11
R2
T1
D1 (DUAL DIODE)
•
1
•
THERMAL
VIAS
it will effectively increase the leakage inductance of T1,
which may result in an overvoltage condition on the SW
pin. The CHRG/IADJ pin trace should be kept as short as
possible while minimizing the adjacent edge with the SW
pin trace. This will eliminate false toggling of the CHRG/IADJ
pin during sharp transitions on the SW pin. Thermal vias
should be added underneath the Exposed Pad, Pin 11, to
enhance the LT3585’s thermal performance. These vias
should go directly to a large area of ground plane. Acting
as a heat sink, the thermal vias/ground plane will lower
the device’s operating temperature.
8
VOUT
PHOTOFLASH
CAPACITOR
VBAT
R1
C2
3585 F10
GND
DONE CHRG
Figure 10. LT3585 Suggested Layout
3585f
15
LT3585-0/LT3585-1
LT3585-2/LT3585-3
U
TYPICAL APPLICATIO S
VBAT
1.5V TO 8V
T1
1:10.4
C1
4.7µF
D1
320V
•
+
•
R1
100k
CHARGE
VIN
2.5V TO 8V
VBAT
SW
DONE
DONE
COUT
PHOTOFLASH
CAPACITOR
GND
CHRG/IADJ
LT3585-0
VIN
C2
0.22µF
IGBTPWR
IGBTIN
IGBTPU
IGBTPD
TO GATE OF IGBT
R2
20Ω TO 160Ω
3585 F11
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
COUT: RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: TDK LDT565630T-001, LPRI = 6µH, N = 10.4
Figure 11. LT3585-0 Photoflash Charger Uses High Efficiency 3mm Tall Transformer
VBAT
1.5V TO 8V
T1
1:10.2
C1
4.7µF
CHARGE
VIN
2.5V TO 8V
VBAT
C2
0.22µF
+
COUT
PHOTOFLASH
CAPACITOR
SW
DONE
DONE
320V
•
•
R1
100k
D1
GND
CHRG/IADJ
LT3585-1
VIN
IGBTPWR
IGBTIN
IGBTPU
IGBTPD
TO GATE OF IGBT
R2
20Ω TO 160Ω
3585 F12
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
COUT: RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: LTD565620ST-203, LPRI = 8.2µH, N = 10.2
Figure 12. LT3585-1 Photoflash Charger Uses High Efficiency 2mm Tall Transformer
3585f
16
LT3585-0/LT3585-1
LT3585-2/LT3585-3
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TYPICAL APPLICATIO S
VBAT
1.5V TO 8V
T1
1:10.2
C1
4.7µF
D1
320V
•
+
•
R1
100k
CHARGE
VIN
2.5V TO 8V
VBAT
SW
DONE
DONE
C2
0.22µF
COUT
PHOTOFLASH
CAPACITOR
GND
CHRG/IADJ
LT3585-2
VIN
IGBTPWR
IGBTIN
IGBTPU
IGBTPD
TO GATE OF IGBT
R2
20Ω TO 160Ω
3585 F13
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: TDK LDT565630T-003, LPRI = 10.5µH, N = 10.2
Figure 13. LT3585-2 Uses High Efficiency 3mm Tall Transformers
VBAT
1.5V TO 8V
T1
1:10.4
C1
4.7µF
CHARGE
VIN
2.5V TO 8V
VBAT
C2
0.22µF
+
COUT
PHOTOFLASH
CAPACITOR
SW
DONE
DONE
320V
•
•
R1
100k
D1
GND
CHRG/IADJ
LT3585-3
VIN
IGBTPWR
IGBTIN
IGBTPU
IGBTPD
TO GATE OF IGBT
R2
20Ω TO 160Ω
3585 F14
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: TDK LDT565630T-041, LPRI = 4.7µH, N = 10.4
Figure 14. LT3585-3 Uses High Efficiency 3mm Tall Transformers
3585f
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LT3585-0/LT3585-1
LT3585-2/LT3585-3
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TYPICAL APPLICATIO S
The LT3585 series can be auto-refreshed using the additional circuitry shown in Figure 15 with its basic operation
shown in Figure 16. The ENABLE pin is used to enable
or disable the auto-refresh charging mode. Without an
auto-refresh circuit, the output voltage will droop due to
output capacitor and output diode leakage currents. The
circuit in Figure 15 uses the DONE and CHRG/IADJ pins
to form an open-loop control scheme. The output voltage
target is sensed through the DONE pin with the PFET of
U1, Panasonic UP04979 composite transistor. When the
R1
5k
1/10W
0402
ENABLE
TO
CHRG/IADJ
VIN
6
R3
100k
1/10W
0402
4
U1
TO
DONE
5
1
2
3
RT
100k
CT
0.1mF
3585 F15
U1: PANASONIC UP04979 COMPOSITE TRANSISTORS
Figure 15. Auto Refresh Application
VOUT
100V/DIV
DONE pin goes low during the VOUT trip condition, the
PFET charges the auto-refresh timing node comprised
of RT and CT, and in turn, pulls the CHRG/IADJ pin low
through a NFET and disables the LT3585 series part. The
DONE pin immediately goes high in shutdown, releasing
the timing node and allowing the voltage at Pins 2 and 3
to decay. After approximately a RTCT time constant, the
CHRG/IADJ pin is released and the LT3585 series part is
enabled. This cycle is repeated to maintain a constant DC
output voltage. The open-loop control method places a
constraint on the control loop dominant time constant,
RT • CT, given by:
R TC T >
2 • IPK 2 • LPRI
ILK • VBAT
where ILK is the known leakage current, IPK is the transformer peak primary current, and LPRI is the transformer
primary inductance. If this condition is not met, a runaway
condition could occur. The LT3585 series part would
continue to charge the output voltage past the internal
output trip voltage. Figure 17 shows the AC ripple of a
typical auto-refresh circuit with the proper selection of
RT and CT.
VOUT
2V/DIV
AC RIPPLE
CHRG/IADJ
2V/DIV
CHRG/IADJ
2V/DIV
ENABLE
2V/DIV
LT3585-1
COUT = 50µF
LT3585-1
COUT = 50µF
2sec/DIV
ENABLE > 1.1V AUTO ENABLE ENABLE
NORMAL OP. REFRESH <0.3V >1.1V
ENABLE < 0.3V
200ms/DIV
3585 F17
Figure 17. VOUT AC Ripple in Auto Refresh Mode
ENABLE < 0.3V
3585 F16
AUTO
REFRESH
Figure 16. Auto Refresh Basic Operation
3585f
18
LT3585-0/LT3585-1
LT3585-2/LT3585-3
U
PACKAGE DESCRIPTIO
DDB Package
10-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1722 Rev Ø)
0.64 ±0.05
(2 SIDES)
0.70 ±0.05
2.55 ±0.05
1.15 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
2.39 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(2 SIDES)
R = 0.05
TYP
R = 0.115
TYP
6
0.40 ± 0.10
10
2.00 ±0.10
(2 SIDES)
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0.75 ±0.05
0.64 ± 0.05
(2 SIDES)
5
0.25 ± 0.05
0 – 0.05
PIN 1
R = 0.20 OR
0.25 × 45°
CHAMFER
1
(DDB10) DFN 0905 REV Ø
0.50 BSC
2.39 ±0.05
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
3585f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT3585-0/LT3585-1
LT3585-2/LT3585-3
U
TYPICAL APPLICATIO
VBAT
1.5V TO 8V
T1
1:10.3
C1
4.7µF
D1
•
R1
100k
CHARGE
VIN
2.5V TO 8V
VBAT
C2
0.22µF
+
COUT
PHOTOFLASH
CAPACITOR
SW
DONE
DONE
320V
•
GND
CHRG/IADJ
LT3585-3
VIN
IGBTPWR
IGBTIN
IGBTPU
IGBTPD
TO GATE OF IGBT
R2
20Ω TO 160Ω
3585 F18
C1: 4.7µF, 10V, X5R OR X7R
C2: 0.22µF, 10V, X5R OR X7R
COUT: RUBYCON 330V, 50µF PHOTOFLASH OUTPUT CAPACITOR (FW SERIES)
D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES
R1: PULL-UP RESISTOR NEEDED IF DONE PIN USED
T1: TOKYO COIL TTRN-0530-022-T, LPRI = 4µH, N = 10.3
Figure 18. LT3585-3 Typical Application
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC®3407
Dual 600mA (IOUT), 1.5MHz, Synchronous Step-Down
DC/DC Converter
96% Efficiency, VIN: 2.5V to 5.5V, VOUT: 0.6V to 5V, IQ = 40µA,
Converter ISD <1µA, 10-Lead MSE/10-Lead DFN Packages
LT3420/LT3420-1
1.4A/1A, Photoflash Capacitor Chargers with Charges
Automatic Top-Off
Charges 220µF to 320V in 3.7 Seconds from 5V, Automatic Top-Off
VIN: 2.2V to 16V, IQ = 90µA, ISD < 1µA, 10-Lead MS/10-Lead DFN
Packages
LTC3425
3A (IOUT), 8MHz, 4-Phase Synchronous Step-Up
DC/DC Converter
95% Efficiency, VIN: 0.5V to 4.5V, VOUT: 2.4V to 5.25V, IQ = 12µA,
ISD < 1µA, 32-Lead 5mm × 5mm QFN Package
LTC3440
600mA (IOUT), Synchronous Buck-Boost DC/DC
Converter
95% Efficiency, VIN: 2.5V to 5.5V, VOUT: 2.5V to 5.5V,
Converter IQ = 25µA, ISD < 1µA, 10-Lead MS/10-Lead DFN Packages
LT3463/LT3463A
Dual Boost (250mA)/Inverting (250mA/400mA) DC/DC
Converter for CCD Bias
Integrated Schottkys, VIN: 2.4V to 15V, VOUT(MAX) = ±40V, DC/DC
Converter for CCD Bias, IQ = 40µA, ISD < 1µA, 10-LeadDFN Package
LT3468
Photoflash Capacitor Charger in ThinSOTTM Package
Charges 100µF to 320V in 4.6 Seconds from 3.6V, VIN: 2.5V to 16V,
IQ = 5mA, ISD < 1µA, 5-Lead TSOT-23 Package
LT3472
Dual ±34V, 1.2MHz Boost (350mA)/Inverting (400mA)
DC/DC Converter for CCD Bias
Integrated Schottkys, VIN: 2.2V to 16V, VOUT(MAX) = ±34V, DC/DC
Converter for CCD Bias IQ = 2.8mA, ISD < 1µA, 10-Lead DFN Package
LT3484-0/LT3484-1
LT3484-2
Photoflash Capacitor Chargers
Charges 100µF to 320V in 4.6 Seconds from 3.6V,
LT3484-0 VIN: 2.5V to 16V, VBAT: 1.8V to 16V, IQ = 5mA, ISD < 1µA,
6-lead 2mm × 3mm DFN Package
LT3485-0/LT3485-1
LT3485-2/LT3485-3
Photoflash Capacitor Charger with Output Voltage
Monitor and Integrated IGBT Drive
Charges 100µF Capacitor to 320V in 2.5 Seconds from 3.6V.
VIN: 1.8V to 10V, IQ = 5mA, ISD < 1µA, 10-Lead 3mm × 3mm DFN
Package
ThinSOT is a trademark of Linear Technology Corporation.
3585f
20 Linear Technology Corporation
LT 0706 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006
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