Intersil ISL43121 Low-voltage, single supply, dual spst analog switch Datasheet

ISL43120, ISL43121, ISL43122
®
Data Sheet
October 18, 2007
Low-Voltage, Single Supply, Dual SPST
Analog Switches
The Intersil ISL43120, ISL43121 and ISL43122 devices are
precision, bidirectional, dual analog SPST switches designed
to operate from a single +2.7V to +12V supply. Targeted
applications include battery powered equipment that benefit
from the devices’ low power consumption (5µW), low leakage
currents (100pA max) and fast switching speeds (tON = 28ns,
tOFF = 20ns). Cell phones, for example, often face ASIC
functionality limitations. The number of analog input or GPIO
pins may be limited and digital geometries are not well suited
to analog switch performance. This family of parts may be
used to “mux-in” additional functionality while reducing ASIC
design risk. Some of the smallest packages are available,
alleviating board space limitations, and making Intersil’s
newest line of low-voltage switches an ideal solution.
The ISL43120, ISL43121, ISL43122 are dual
single-pole/single-throw (SPST) devices. The ISL43120 has
two normally open (NO) switches; the ISL43121 has two
normally closed (NC) switches; the ISL43122 has one NO
and one NC switch and can be used as an SPDT.
TABLE 1. FEATURES AT A GLANCE
ISL43121
ISL43122
SW 1/SW 2
NO/NO
NC/NC
NO/NC
3.3V rON
32Ω
32Ω
32Ω
3.3V tON/tOFF
40ns/20ns
40ns/20ns
40ns/20ns
5V rON
19Ω
19Ω
19Ω
5V tON/tOFF
28ns/20ns
28ns/20ns
28ns/20ns
12V rON
11Ω
11Ω
11Ω
12V tON/tOFF
25ns/17ns
25ns/17ns
25ns/17ns
8 Ld SOT-23
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
1
Features
• Fully specified at 12V, 5V, and 3.3V supplies for 10%
tolerances
• ON-resistance (rON) . . . . . . . . . . . . . . . . . . . . . . . . . . 19Ω
• rON matching between channels . . . . . . . . . . . . . . . . . . . <1Ω
• Low charge injection . . . . . . . . . . . . . . . . . . . . . . . 5pC (Max)
• Single supply operation . . . . . . . . . . . . . . . . . +2.7V to +12V
• Low power consumption (PD) . . . . . . . . . . . . . . . . . . . .<5μW
• Low leakage current. . . . . . . . . . . . . . . . . . . . . . . . . 10nA
• Fast switching action
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns
• Guaranteed break-before-make (ISL43122 only)
• Minimum 2000V ESD protection per method 3015.7
• TTL, CMOS compatible
• Available in SOT-23 packaging
• Pb-Free Available (RoHS Compliant)
Applications
ISL43120
Packages
FN6033.5
• Battery-powered, handheld and portable equipment
- Cellular/mobile phones
- Pagers
- Laptops, notebooks, palmtops
• Communications systems
- Radios, ADSL Modems
- PBX, PABX
• Test and measurement equipment
- Ultrasound
- Computerized Tomography (CT) Scanner
- Magnetic Resonance Image (MRI)
- Position Emission Tomography (PET) Scanner
- Electrocardiograph
• Heads-up displays
• Audio and video switching
• Various circuits
- +3V/+5V DACs and ADCs
- Sample and hold circuits
- Digital filters
- Operational amplifier gain switching networks
- High frequency analog switching
- High speed multiplexing
- Integrator reset circuits
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003, 2004, 2005, 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL43120, ISL43121, ISL43122
Pinouts
(Note 1)
ISL43121
(8 LD SOT-23)
TOP VIEW
ISL43120
(8 LD SOT-23)
TOP VIEW
8 COM1
NO1 1
V+ 2
7 IN1
IN2 3
COM2 4
8 COM1
NC1 1
V+ 2
7 IN1
6 GND
IN2 3
6 GND
5 NO2
COM2 4
5 NC2
ISL43122
(8 LD SOT-23)
TOP VIEW
NO1 1
8 COM1
V+ 2
7 IN1
IN2 3
6 GND
COM2 4
5 NC2
NOTE:
1. Switches Shown for Logic “0” Input.
Truth Table
Ordering Information
ISL43120
ISL43121
ISL43122
IN1
IN2
NO1
NO2
NC1
NC2
NO1
NC2
0
0
OFF
OFF
ON
ON
OFF
ON
0
1
OFF
ON
ON
OFF
OFF
OFF
1
0
ON
OFF
OFF
ON
ON
ON
1
1
ON
ON
OFF
OFF
ON
OFF
NOTE:
Logic “0” ≤0.8V. Logic “1” ≥2.4V.
Pin Descriptions
PIN
V+
FUNCTION
System Power Supply Input (+2.7V to +12V)
GND
Ground Connection
IN
Digital Control Input
COM
Analog Switch Common Pin
NO
Analog Switch Normally Open Pin
NC
Analog Switch Normally Closed Pin
2
TEMP.
RANGE
PACKAGE
PKG.
PART
(°C)
(TAPE AND REEL) DWG. #
PART NUMBER MARKING
ISL43120IH-T*
120I
-40 to +85 8 Ld SOT-23
P8.064
ISL43120IHZ-T* 120Z
(Note)
-40 to +85 8 Ld SOT-23
(Pb-free)
P8.064
ISL43121IH-T*
-40 to +85 8 Ld SOT-23
P8.064
ISL43121IHZ-T* 121Z
(Note)
-40 to +85 8 Ld SOT-23
(Pb-free)
P8.064
ISL43122IH-T*
-40 to +85 8 Ld SOT-23
P8.064
-40 to +85 8 Ld SOT-23
(Pb-free)
P8.064
121I
122I
ISL43122IHZ-T* 122Z
(Note)
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach materials
and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which
is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at Pbfree peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
FN6033.5
October 18, 2007
ISL43120, ISL43121, ISL43122
Absolute Maximum Ratings
Thermal Information
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 15V
Input Voltages
IN (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to ((V+) + 0.3V)
NO, NC (Note 2) . . . . . . . . . . . . . . . . . . . . . -0.3V to ((V+) + 0.3V)
Output Voltages
COM (Note 2) . . . . . . . . . . . . . . . . . . . . . . . -0.3V to ((V+) + 0.3V)
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA
Peak Current NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . 40mA
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015) . . . . .>2kV
Thermal Resistance (Typical, Note 3)
θJA (°C/W)
8 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . .
215
Maximum Junction Temperature (Plastic Package). . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range
ISL43XXXIH-T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
2. Signals on NC, NO, COM, or IN exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings.
3. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications - 5V Supply
PARAMETER
Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified.
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 5, 6)
TYP
MAX
(Notes 5, 6) UNITS
Full
0
-
V+
V
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
V+ = 4.5V, ICOM = 1.0mA, VNO or VNC = 3.5V
(See Figure 5)
ON-Resistance, rON
25
-
19
30
Ω
Full
-
23
40
Ω
25
-
0.8
2
Ω
Full
-
1
4
Ω
rON Matching Between Channels,
ΔrON
V+ = 5V, ICOM = 1.0mA, VNO or VNC = 3.5V
rON Flatness, rFLAT(ON)
V+ = 5V, ICOM = 1.0mA, VNO or VNC = 1V, 2V, 3V
Full
-
7
8
Ω
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V
25
-0.1
0.01
0.1
nA
COM OFF Leakage Current,
ICOM(OFF)
V+ = 5.5V, VCOM = 4.5V, 1V, VNO or VNC = 1V, 4.5V
COM ON Leakage Current,
ICOM(ON)
V+ = 5.5V, VCOM = 1V, 4.5V, or VNO or VNC = 1V, 4.5V,
or Floating
VNO or VNC = 3V, RL =1kΩ, CL = 35pF, VIN = 0V to 3V
(See Figure 1, Note 7)
VNO or VNC = 3V, RL =1kΩ, CL = 35pF, VIN = 0V to 3V
(See Figure 1, Note 7)
RL = 300Ω, CL = 35pF, VNO = VNC = 3V, VIN = 0V to 3V
(See Figure 3, Note 7)
Full
-5
-
5
nA
25
-0.1
-
0.1
nA
Full
-5
-
5
nA
25
-0.2
-
0.2
nA
Full
-10
-
10
nA
25
-
28
75
ns
Full
-
40
150
ns
25
-
20
50
ns
Full
-
30
100
ns
Full
3
10
-
ns
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
Turn-OFF Time, tOFF
Break-Before-Make Time Delay
(ISL43122 only), tD
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω (See Figure 2, Note 7)
25
-
3
5
pC
OFF Isolation
RL = 50Ω, CL = 5pF, f = 1MHz (See Figure 4)
25
-
76
-
dB
Crosstalk (Channel-to-Channel)
RL = 50Ω, CL = 5pF, f = 1MHz (See Figure 6)
25
-
-105
-
dB
Power Supply Rejection Ratio
RL = 50Ω, CL = 5pF, f = 1MHz
25
-
60
-
dB
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
-
8
-
pF
f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
-
8
-
pF
COM OFF Capacitance,
CCOM(OFF)
3
FN6033.5
October 18, 2007
ISL43120, ISL43121, ISL43122
Electrical Specifications - 5V Supply
PARAMETER
Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified. (Continued)
TEST CONDITIONS
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
TEMP
(°C)
MIN
(Notes 5, 6)
TYP
MAX
(Notes 5, 6) UNITS
25
-
21
-
Full
2.7
-
12
V
Full
-1
0.0001
1
µA
Full
-
-
0.8
V
Full
2.4
-
-
V
Full
-1
-
1
µA
pF
POWER SUPPLY CHARACTERISTICS
Power Supply Range
V+ = 5.5V, VIN = 0V or V+, all channels on or off
Positive Supply Current, I+
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINL
Input Voltage High, VINH
Input Current, IINH, IINL
V+ = 5.5V, VIN = 0V or V+
Electrical Specifications - 3.3V Supply
PARAMETER
Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 5, 6)
TYP
Full
0
-
MAX
(Notes 5, 6) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
V+ = 3V, ICOM = 1.0mA, VNO or VNC = 1.5V
ON-Resistance, rON
rON Matching Between Channels,
ΔrON
V+ = 3.3V, ICOM = 1.0mA, VNO or VNC = 1.5V
rON Flatness, rFLAT(ON)
V+ = 3.3V, ICOM = 1.0mA, VNO or VNC = 0.5V, 1V, 1.5V
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 3.6V, VCOM = 1V, 3V, VNO or VNC = 3V, 1V
COM OFF Leakage Current,
ICOM(OFF)
V+ = 3.6V, VCOM = 3V, 1V, VNO or VNC = 1V, 3V
COM ON Leakage Current,
ICOM(ON)
V+ = 3.6V, VCOM = 1V, 3V, or VNO or VNC = 1V, 3V, or
floating
V+
V
25
-
32
50
Ω
Full
-
40
60
Ω
25
-
0.8
2
Ω
Full
-
1
4
Ω
25
-
6
8
Ω
Full
-
7
12
Ω
25
-0.1
0.01
0.1
nA
Full
-5
-
5
nA
25
-0.1
0.01
0.1
nA
Full
-5
-
5
nA
25
-0.2
-
0.2
nA
Full
-10
-
10
nA
25
-
40
120
ns
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
VNO or VNC = 1.5V, RL = 1kΩ, CL = 35pF,
VIN = 0V to 3V (Note 7)
Turn-OFF Time, tOFF
VNO or VNC = 1.5V, RL = 1kΩ, CL = 35pF,
VIN = 0V to 3V (Note 7)
Full
Break-Before-Make Time Delay
(ISL43122 only), tD
RL = 300Ω, CL = 35pF, VNO or VNC = 1.5V,
VIN = 0V to 3V (Note 7)
Full
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω (Note 7)
25
-
Full
-
60
200
ns
25
-
20
50
ns
-
30
120
ns
3
20
-
ns
1
5
pC
OFF Isolation
RL = 50Ω, CL = 5pF, f = 1MHz
25
-
76
-
dB
Crosstalk (Channel-to-Channel)
RL = 50Ω, CL = 5pF, f = 1MHz
25
-
-105
-
dB
Power Supply Rejection Ratio
RL = 50Ω, CL = 5pF, f = 1MHz
25
-
56
-
dB
25
-
8
-
pF
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V
COM OFF Capacitance, CCOM(OFF) f = 1MHz, VNO or VNC = VCOM = 0V
f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
COM ON Capacitance, CCOM(ON)
25
-
8
-
pF
25
-
21
-
pF
Full
-1
-
1
µA
POWER SUPPLY CHARACTERISTICS
V+ = 3.6V, VIN = 0V or V+, all channels on or off
Positive Supply Current, I+
4
FN6033.5
October 18, 2007
ISL43120, ISL43121, ISL43122
Electrical Specifications - 3.3V Supply
PARAMETER
Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified (Continued)
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 5, 6)
TYP
MAX
(Notes 5, 6) UNITS
Full
-
-
Full
2.4
-
-
V
Full
-1
-
1
µA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINL
Input Voltage High, VINH
Input Current, IINH, IINL
V+ = 3.6V, VIN = 0V or V+
Electrical Specifications - 12V Supply
PARAMETER
0.8
V
Test Conditions: V+ = +10.8V to +13V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 5, 6)
TYP
Full
0
-
MAX
(Notes 5, 6) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
V+ = 10.8V, ICOM = 1.0mA, VNO or VNC = 10V
ON-Resistance, rON
rON Matching Between Channels,
ΔrON
V+ = 12V, ICOM = 1.0mA, VNO or VNC = 10V
rON Flatness, rFLAT(ON)
V+ = 12V, ICOM = 1.0mA, VNO or VNC = 3V, 6V, 9V
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 13V, VCOM = 1V, 12V, VNO or VNC = 12V, 1V
COM OFF Leakage Current,
ICOM(OFF)
V+ = 13V, VCOM = 12V, 1V, VNO or VNC = 1V, 12V
COM ON Leakage Current,
ICOM(ON)
V+ = 13V, VCOM = 1V, 12V, or VNO or VNC = 1V, 12V,
or floating
V+
V
25
-
11
20
Ω
Full
-
15
25
Ω
25
-
0.8
2
Ω
Full
-
1
4
Ω
25
-
1
4
Ω
Full
-
-
6
Ω
25
-0.1
0.01
0.1
nA
Full
-5
-
5
nA
25
-0.1
0.01
0.1
nA
Full
-5
-
5
nA
25
-0.2
-
0.2
nA
Full
-10
-
10
nA
25
-
25
35
ns
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
VNO or VNC = 10V, RL = 1kΩ, CL = 35pF, VIN = 0V to 4V
(Note 7)
Turn-OFF Time, tOFF
VNO or VNC = 10V, RL = 1kΩ, CL = 35pF, VIN = 0V to 4V
(Note 7)
Break-Before-Make Time Delay
(ISL43122 only), tD
RL = 300Ω, CL = 35pF, VNO or VNC = 10V,
VIN = 0 to 4V
Charge Injection, Q
Full
-
35
55
ns
25
-
17
30
ns
Full
-
26
50
ns
Full
0
2
CL = 1.0nF, VG = 0V, RG = 0Ω (Note 7)
25
-
5
15
pC
OFF Isolation
RL = 50Ω, CL = 5pF, f = 1MHz
25
-
76
-
dB
Crosstalk (Channel-to-Channel)
RL = 50Ω, CL = 5pF, f = 1MHz
25
-
-105
-
dB
Power Supply Rejection Ratio
RL = 50Ω, CL = 5pF, f = 1MHz
ns
25
-
63
-
dB
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V
25
-
8
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V
25
-
8
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
-
21
-
pF
Full
-1
-
1
µA
POWER SUPPLY CHARACTERISTICS
V+ = 13V, VIN = 0V or V+, all channels on or off
Positive Supply Current, I+
5
FN6033.5
October 18, 2007
ISL43120, ISL43121, ISL43122
Electrical Specifications - 12V Supply
Test Conditions: V+ = +10.8V to +13V, GND = 0V, VINH = 4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 5, 6)
TYP
MAX
(Notes 5, 6) UNITS
Full
-
-
Full
4
-
-
V
Full
-1
-
1
µA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINL
Input Voltage High, VINH
Input Current, IINH, IINL
V+ = 13V, VIN = 0V or V+
0.8
V
NOTES:
4. VIN = input voltage to perform proper function.
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Parts are 100% tested at +25°C Over-temperature limits established by characterization and are not production tested.
7. Limits established by characterization and are not production tested.
Test Circuits and Waveforms
V+
tr < 20ns
tf < 20ns
3V OR 4V
LOGIC
INPUT
50%
0V
tOFF
SWITCH
INPUT VNO
SWITCH
INPUT
VOUT
VOUT
NO OR NC
COM
IN
90%
SWITCH
OUTPUT
C
90%
0V
LOGIC
INPUT
CL
35pF
RL
1kΩ
GND
tON
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for all switches. CL includes fixture and stray
capacitance.
RL
V OUT = V (NO or NC) -----------------------R L + r ON
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
SWITCH
OUTPUT
VOUT
RG
ΔVOUT
V+
LOGIC
INPUT
ON
ON
OFF
VG
NO OR NC
GND
C
VOUT
COM
IN
CL
0V
LOGIC
INPUT
Q = ΔVOUT x CL
FIGURE 2B. TEST CIRCUIT
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2. CHARGE INJECTION
6
FN6033.5
October 18, 2007
ISL43120, ISL43121, ISL43122
Test Circuits and Waveforms (Continued)
V+
3V OR 4V
LOGIC
INPUT
0V
C
VOUT1
NO1
VNX
COM1
VOUT2 RL1
300Ω
NC2
90%
SWITCH
OUTPUT
VOUT1
COM2
IN1
0V
RL2
300Ω
IN2
90%
SWITCH
OUTPUT
VOUT2
0V
LOGIC
INPUT
CL1
35pF
CL2
35pF
GND
tD
tD
CL includes fixture and stray capacitance.
FIGURE 3A. MEASUREMENT POINTS (ISL43122 ONLY)
FIGURE 3B. TEST CIRCUIT (ISL43122 ONLY)
FIGURE 3.
V+
V+
C
C
rON = V1/1mA
SIGNAL
GENERATOR
NO OR NC
NO OR NC
VNX
INX
0V OR VINH
1mA
0.8V OR VINH
COM
COM
ANALYZER
IN
V1
GND
GND
RL
FIGURE 5. rON TEST CIRCUIT
FIGURE 4. OFF ISOLATION TEST CIRCUIT
V+
C
V+
C
SIGNAL
GENERATOR
NO1 OR NC1
COM1
50Ω
NO OR NC
IN1
COM2
ANALYZER
INX
IN2 0V OR VINH
0V OR 2.4V
NO2 OR NC2
GND
RL
FIGURE 6. CROSSTALK TEST CIRCUIT
7
0V OR VINH
IMPEDANCE
ANALYZER
NC
COM
GND
FIGURE 7. CAPACITANCE TEST CIRCUIT
FN6033.5
October 18, 2007
ISL43120, ISL43121, ISL43122
Detailed Description
Power-Supply Considerations
The ISL43120, ISL43121, ISL43122 bidirectional dual SPST
analog switches offer precise switching capability from a
single 2.7V to 12V supply with low ON-resistance (19Ω) and
high speed operation (tON = 28ns, tOFF = 20ns). The devices
are especially well suited to portable battery-powered
equipment thanks to the low operating supply voltage (2.7V),
low power consumption (5µW), low leakage currents (100pA
max), and the tiny SOT-23 packaging. High frequency
applications also benefit from the wide bandwidth, and the
very high off isolation and crosstalk rejection.
The ISL43120, ISL43121, ISL43122 construction is typical of
most CMOS analog switches, except that they have only two
supply pins: V+ and GND. V+ and GND drive the internal
CMOS switches and set their analog voltage limits. Unlike
switches with a 13V maximum supply voltage, the ISL43120,
ISL43121, ISL43122 15V maximum supply voltage provides
plenty of room for the 10% tolerance of 12V supplies, as well
as room for overshoot and noise spikes.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents,
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and GND
(see Figure 8). To prevent forward biasing these diodes, V+
must be applied before any input signals, and input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (see Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
Adding a series resistor to the switch input defeats the
purpose of using a low rON switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 8). These
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
unaffected by this approach, but the switch resistance may
increase, especially at low supply voltages.
OPTIONAL PROTECTION
DIODE
V+
OPTIONAL
PROTECTION
RESISTOR
INX
VNO OR NC
VCOM
GND
OPTIONAL PROTECTION
DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
8
The minimum recommended supply voltage is 2.7V. It is
important to note that the input signal range, switching times,
and ON-resistance degrade at lower supply voltages. Refer
to the “Electrical Specifications” tables starting on page 3
and “Typical Performance Curves” (starting on page 9) for
details.
V+ and GND also power the internal logic and level shifter.
The level shifter convert the input logic levels to switched V+
and GND signals to drive the analog switch gate terminals.
This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes
negative in this configuration.
Logic-Level Thresholds
This switch family is TTL compatible (0.8V and 2.4V) over a
supply range of 3V to 11V (see Figure 15). At 12V the VIH
level is about 2.5V. This is still below the TTL guaranteed
high output minimum level of 2.8V, but noise margin is
reduced. For best results with a 12V supply, use a logic
family the provides a VOH greater than 3V.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat even past
300MHz (see Figure 16). Figure 16 also illustrates that the
frequency response is very consistent over a wide V+ range,
and for varying analog signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off isolation is
the resistance to this feedthrough, while crosstalk indicates
the amount of feedthrough from one switch to another.
Figure 17 details the high off isolation and crosstalk rejection
provided by this family. At 10MHz, off isolation is about 50dB
in 50Ω systems, decreasing approximately 20dB per decade
as frequency increases. Higher load impedances decrease
off isolation and crosstalk rejection due to the voltage divider
action of the switch OFF impedance and the load
impedance.
FN6033.5
October 18, 2007
ISL43120, ISL43121, ISL43122
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced, they
are reverse biased differently. Each is biased by either V+ or
GND and the analog signal. This means their leakages will vary
as the signal varies. The difference in the two diode leakages to
the V+ and GND pins constitutes the analog-signal-path
leakage current. All analog leakage current flows between each
pin and one of the supply terminals, not to the other switch
terminal. This is why both sides of a given switch can show
leakage currents of the same or opposite polarity. There is no
connection between the analog signal paths and V+ or GND.
Typical Performance Curves TA = +25°C, Unless Otherwise Specified
40
45
40
35
35
V+ = 3.3V
30
30
+85°C
20
25
rON (Ω)
rON (Ω)
+85°C
+25°C
25
20
+25°C
15
-40°C
10
-40°C
15
30
25
20
15
10
20
15
V+ = 5V
+85°C
+25°C
-40°C
+85°C
V+ = 12V
+25°C
10
5 -40°C
0
5
3
4
5
6
7
8
V+ (V)
9
10
11
12
13
FIGURE 9. ON-RESISTANCE vs SUPPLY VOLTAGE
0.50
0.40
0.30
2
4
6
VCOM (V)
8
10
12
FIGURE 10. ON-RESISTANCE vs SWITCH VOLTAGE
60
V+ = 3.3V
+25°C
50
+85°C
0.10
0
0.25
0.20
0.15
30
V+ = 5V
+25°C
0.10
+85°C
+85°C
0.05
0
0.15
-40°C
V+ = 12V
+85°C
2
4
V+ = 12V
0
-10
+25°C
-40°C
0
V+ = 5V
V+ = 3.3V
+25°C
0.05
20
10
-40°C
0.10
0
40
-40°C
Q (pC)
ΔrON (Ω)
0.20
6
VCOM (V)
8
10
FIGURE 11. rON MATCH vs SWITCH VOLTAGE
9
12
-20
0
2
4
6
8
10
12
VCOM (V)
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
FN6033.5
October 18, 2007
ISL43120, ISL43121, ISL43122
Typical Performance Curves TA = +25°C, Unless Otherwise Specified (Continued)
35
100
90
30
80
+85°C
tOFF (ns)
tON (ns)
70
60
+85°C
25
50
-40°C
-40°C
40
20
-40°C
+25°C
30
20
25°C
2
3
4
15
5
6
7
V+ (V)
8
9
10
11
12
3.0
2.5
2.0
+85°C
5
6
7
V+ (V)
8
9
10
11
12
V+ = 3.3V TO 12V
0
GAIN
-3
-6
0
PHASE
20
+25°C
1.5
+85°C
40
-40°C
60
+25°C
1.0
RL = 50Ω
VIN = 0.2VP-P TO 2.5VP-P (V+ = 3.3V)
VIN = 0.2VP-P TO 4VP-P (V+ = 5V)
VIN = 0.2VP-P TO 5VP-P (V+ = 12V)
VINL
+85°C
0.5
2
3
4
5
6
7
8
V+ (V)
9
10
11
12
1M
13
FIGURE 15. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
-10
10
20
0
-30
30
10
-40
40
20
-50
50
70
-80
80
-90
CROSSTALK
-100
-110
1k
10k
100k
1M
10M
±PSRR (dB)
-70
V+ = 12V, SWITCH OFF
40
V+ = 12V, SWITCH ON
50
60
70
100
80
0.3k
V+ = 3.3V, SWITCH ON
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 17. CROSSTALK AND OFF ISOLATION
FIGURE 18. ±PSRR vs FREQUENCY
10
600M
30
90
110
100M 500M
10M
100M
FREQUENCY (Hz)
V+ = 3.3V, SWITCH OFF
OFF ISOLATION (dB)
60
ISOLATION
100
RL = 50Ω
-20
-60
80
FIGURE 16. FREQUENCY RESPONSE
V+ = 3V TO 13V
CROSSTALK (dB)
4
PHASE (°)
VINH AND VINL (V)
VINH
-40°C
3
FIGURE 14. TURN-OFF TIME vs SUPPLY VOLTAGE
NORMALIZED GAIN (dB)
FIGURE 13. TURN-ON TIME vs SUPPLY VOLTAGE
2
1G
FN6033.5
October 18, 2007
ISL43120, ISL43121, ISL43122
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
ISL43120: 66
ISL43121: 66
ISL43122: 66
PROCESS:
Si Gate CMOS
11
FN6033.5
October 18, 2007
ISL43120, ISL43121, ISL43122
Small Outline Transistor Plastic Packages (SOT23-8)
0.20 (0.008) M
CL
P8.064
C
VIEW C
8 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
e
b
INCHES
SYMBOL
8
6
7
5
CL
CL
E
1
2
3
E1
C
D
CL
A
A2
A1
SEATING
PLANE
-C-
MIN
MAX
0.036
0.057
0.90
1.45
-
0.000
0.0059
0.00
0.15
-
A2
0.036
0.051
0.90
1.30
-
b
0.009
0.015
0.22
0.38
-
b1
0.009
0.013
0.22
0.33
c
0.003
0.009
0.08
0.22
6
c1
0.003
0.008
0.08
0.20
6
D
0.111
0.118
2.80
3.00
3
E
0.103
0.118
2.60
3.00
-
E1
0.060
0.067
1.50
1.70
3
e
0.0256 Ref
0.65 Ref
-
e1
0.0768 Ref
1.95 Ref
-
0.014
0.022
0.35
0.55
L1
0.024 Ref.
0.60 Ref.
L2
0.010 Ref.
0.25 Ref.
N
8
8
WITH
R
0.004
-
0.10
-
PLATING
b1
R1
0.004
0.010
0.10
0.25
α
0o
8o
0o
8o
c1
4
5
b
c
NOTES
A
L
0.10 (0.004) C
MILLIMETERS
MAX
A1
4
e1
MIN
Rev. 2 9/03
NOTES:
BASE METAL
1. Dimensioning and tolerance per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC-74 and JEDEC MO178BA.
4X θ1
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
4. Footlength L measured at reference to gauge plane.
R1
5. “N” is the number of terminal positions.
R
GAUGE PLANE
SEATING
PLANE
L
C
L1
α
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only
L2
4X θ1
VIEW C
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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12
FN6033.5
October 18, 2007
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