Infineon IKCS12F60EA Control integrated power system Datasheet

Target Data Sheet, August 2009
Control integrated Power
System (CIPOS™)
IKCS12F60EA
http://www.infineon.com/cipos
Power Management & Drives
N e v e r
s t o p
t h i n k i n g .
CIPOS™ IKCS12F60EA
Revision History:
Previous Version:
Page
1, 17
2009-08
0.1
Subjects (major changes since last revision)
revised types
Rev. 0.2
Authors: W. Frank
Edition 2008-09
Published by
Infineon Technologies AG
85579 Neubiberg, Germany
© Infineon Technologies AG 8/3/09.
All Rights Reserved.
Attention please!
The information given in this data sheet shall in no event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical
values stated herein and/or any information regarding the application of the device, Infineon Technologies
hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of
non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office or representatives (http://www.infineon.com).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types
in question please contact your nearest Infineon Technologies Office or representatives.
Infineon Technologies Components may only be used in life-support devices or systems with the express
written approval of Infineon Technologies, if a failure of such components can reasonably be expected to
cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or
system. Life support devices or systems are intended to be implanted in the human body, or to support
and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health
of the user or other persons may be endangered.
TrenchStop® is a registered trademark of Infineon Technologies AG.
CIPOS™, CoolMOS™, CoolSET™, DuoPack™ and thinQ!™ are trademarks of Infineon Technologies AG.
Target Data Sheet
2/17
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
Table of Contents
CIPOS™ Control integrated Power System..................................................................................................4
Features........................................................................................................................................................4
Target Applications .....................................................................................................................................4
Description...................................................................................................................................................4
System Configuration .................................................................................................................................4
Internal Electrical Schematic...........................................................................................................................5
Pin Assignment.................................................................................................................................................6
Pin Description ............................................................................................................................................6
/HIN1,2,3 and /LIN1,2,3 (Low side and high side control pins, Pin 15 - 20) .............................................. 6
ITRIP (Over-current detection function, Pin 21) ......................................................................................... 7
VDD, VSS (control side supply and reference, Pin 22, 23)........................................................................ 7
VB1,2,3 and VS1,2,3 (High side supplies, Pin 1, 2, 4, 5, 7, 8)................................................................... 7
VRU, VRV, VRW (low side emitter, Pin 12,13,14) ..................................................................................... 7
V+ (positive bus input voltage, Pin 10)....................................................................................................... 7
Absolute Maximum Ratings ............................................................................................................................8
Module Section ............................................................................................................................................8
IGBT and Diode Section .............................................................................................................................8
Control Section............................................................................................................................................9
Recommended Operation Conditions............................................................................................................9
Static Parameters ...........................................................................................................................................10
Dynamic Parameters ......................................................................................................................................11
Integrated Components .................................................................................................................................12
Circuit of a Typical Application.....................................................................................................................12
Characteristics................................................................................................................................................13
Test Circuits and Parameter Definition ........................................................................................................15
Package Outline IKCS12F60EA.....................................................................................................................17
Package Outline IKCS12F60EC....................................................................Fehler! Textmarke nicht definiert.
Target Data Sheet
3/17
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
CIPOS™
Control integrated Power System
Single In-Line Intelligent Power Module
3Φ-bridge 600V / 12A @ 25°C
Features
•
•
•
•
•
•
•
•
•
•
•
•
Fully isolated Single In-Line molded module
TrenchStop® IGBTs with lowest VCE(sat)
Optimal adapted diodes for low EMI
Integrated bootstrap diode and capacitor
Rugged SOI gate driver technology with
stability against transient and negative voltage
Overcurrent shutdown
Undervoltage lockout at all channels
Matched propagation delay for all channels
Low side emitter pins accessible for all phase
current monitoring (open emitter)
Cross-conduction prevention
Lead-free terminal plating; RoHS compliant
Qualified according to JEDEC1 (high
temperature stress tests for 500h) for target
applications
The CIPOS™ module family offers the chance for
integrating various power and control components
to increase reliability, optimize PCB size and
system costs.
This SIL-IPM is designed to control AC motors in
variable speed drives for applications like air
conditioning,
compressors
and
washing
machines. The package concept is specially
adapted to power applications, which need
extremely good thermal conduction and electrical
isolation, but also EMI-save control and overload
protection. The features of Infineon TrenchStop®
IGBTs and EmCon™ diodes are combined with a
new optimized Infineon SOI gate driver for
excellent electrical performance.
System Configuration
• 3 halfbridges with TrenchStop® IGBT &
freewheeling diodes
• 3Φ SOI gate driver
• Bootstrap diodes for high side supply
• Integrated 100nF bootstrap capacitance
Target Applications
• passive components for adaptions
• Washing machines
• Isolated heatsink
• Consumer Fans and Consumer Compressors
• Creepage distance typ. 3.2mm
Certification
UL 1577 (UL file E314539)
Description
1
J-STD-020 and JESD-022
Target Data Sheet
4/17
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
Internal Electrical Schematic
V+ (10)
Tr1, U-HS
D1
Tr3, V-HS
D3
Tr5, W-HS
D5
Tr2, U-LS
D2
Tr4, V-LS
D4
Tr6, W-LS
D6
VRU (12)
VRV (13)
VRW (14)
U, VS1 (8)
V, VS2 (5)
W, VS3 (2)
RH1
RL1
RH2
RL2
RH3
RL3
VB3 (1)
VB2 (4)
VB1 (7)
CbsH1
CbsH2
CbsH3
Dbs1Dbs3
Rbs
VDD (22)
VCC
/HIN1 (15)
/HIN2 (16)
/HIN3 (17)
/HIN1
/HIN2
/HIN3
/LIN1 (18)
/LIN2 (19)
/LIN3 (20)
/LIN1
/LIN2
/LIN3
ITRIP (21)
Driver-IC
For integrated
components see
Table
R
C1
C2
VSS (23)
Figure 1: Internal Schematic
Target Data Sheet
5/17
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
Pin Assignment
Pin Number
Pin Name
Pin Description
1
VB3
high side floating IC supply voltage
2
W,VS3
motor output W, high side floating IC supply offset voltage
3
n.a.
None
4
VB2
high side floating IC supply voltage
5
V,VS2
motor output V, high side floating IC supply offset voltage
6
n.a.
None
7
VB1
high side floating IC supply voltage
8
U,VS1
motor output U, high side floating IC supply offset voltage
9
n.a.
None
10
V+
positive bus input voltage
11
n.a.
None
12
VRU
low side emitter
13
VRV
low side emitter
14
VRW
low side emitter
15
/HIN1
input gate driver high side 1/U
16
/HIN2
input gate driver high side 2/V
17
/HIN3
input gate driver high side 3/W
18
/LIN1
input gate driver low side 1/U
19
/LIN2
input gate driver low side 2/V
20
/LIN3
input gate driver low side 3/W
21
ITRIP
input overcurrent shutdown
22
VDD
module control supply
23
VSS
module negative supply
Pin Description
/HIN1,2,3 and /LIN1,2,3 (Low side and high
side control pins, Pin 15 - 20)
These pins are active low and they are
responsible for the control of the integrated IGBT
The Schmitt-trigger input threshold of them are
down to 3.3V controller outputs. Pull-up resistor of
about 75 kOhm is internally provided to pre-bias
inputs during supply start-up and a zener clamp is
provided for pin protection purposes. Input
schmitt-trigger and noise filter provide beneficial
noise rejection to short input pulses.
It is recommended for proper work of CiPoS™ not
to provide input pulse-width lower than 1us.
The integrated gate drive provides additionally a
shoot through prevention capability which avoids
the simultaneous on-state of two gate drivers of
the same leg (i.e. HO1 and LO1, HO2 and LO2,
HO3 and LO3).
A minimum deadtime insertion of typ 380ns is also
provided, in order to reduce cross-conduction of
the external power switches.
Figure 2: Input pin structure
such to guarantee LSTTL and CMOS compatibility
Target Data Sheet
6/17
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
ITRIP (Over-current detection function, Pin 21)
CiPoS™ provides an over-current detection
function by connecting the ITRIP input with the
motor current feedback. The ITRIP comparator
threshold (typ 0.46V) is referenced to VSS
ground. A input noise filter prevents the driver to
detect false over-current events.
Over-current detection generates a hard shut
down of all outputs of the gate driver after the
shutdown propagation delay of typically 900ns.
The fault-clear time is set to typically to 4.7 ms.
VDD, VSS (control side supply and reference,
Pin 22, 23)
VDD is the low side supply and it provides power
both to input logic and to low side output power
stage. Input logic is referenced to VSS ground as
well as the under-voltage detection circuit.
circuit connected to VDD. This includes also
integrated bootstrap capacitors of 100 nF at each
floating supply, which are located very close to the
gate drive circuit.
The under-voltage detection operates with a rising
supply threshold of typical VBSUV+ = 12.1 V and a
falling threshold of VDDUV- = 10.4 V according to
Figure 3.
VS1,2,3 provide a high robustness against
negative voltage in respect of VSS of -50 V. This
ensures very stable designs even under rough
conditions.
VRU,
VRV,
VRW
(low
side
emitter,
Pin
The under-voltage circuit enables the device to
operate at power on when a supply voltage of at
least a typical voltage of VDDUV+ = 12.1 V is at
least present.
The IC shuts down all the gate drivers power
outputs, when the VCC supply voltage is below
VDDUV- = 10.4 V. This prevents the external power
switches from critically low gate voltage levels
during on-state and therefore from excessive
power dissipation.
VB1,2,3 and VS1,2,3 (High side supplies, Pin 1,
2, 4, 5, 7, 8)
VB to VS is the high side supply voltage. The high
side circuit can float with respect to VSS following
the
external
high
side
power
device
emitter/source voltage.
Figure 3: Input filter timing diagram
12,13,14)
The low side emitters are available for current
measurements of each phase leg. It is
recommended to keep the connection to pin VSS
as short as possible in order to avoid unnecessary
inductive voltage drops.
V+ (positive bus input voltage, Pin 10)
The high side IGBT are connected to the bus
voltage. It is recommended, that the bus voltage
does not exceed 500 V.
Due to the low power consumption, the floating
driver stage is supplied by an integrated bootstrap
Target Data Sheet
7/17
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
Absolute Maximum Ratings
(Tc = 25°C, VDD = 15V, if not stated otherwise)
Module Section
Description
Condition
Symbol
Value
Unit
Min
max
Storage temperature range
Tstg
-40
125
°C
Operating temperature control PCB
TPCB
-
125
°C
-
260
°C
2500
-
V
Solder temperature
Wave soldering,
1.6mm (0.063in.)
from case for 10s
Tsol
Insulation test voltage
RMS, f=50Hz,
t =1min
VISOL
Mounting torque
M3 screw and washer MS
-
0.6
Nm
Mounting pressure on surface
Package flat on
mounting surface
-
150
N/mm²
3.1
-
mm
19
µF
Creepage distance
External bootstrap capacitor
NMC
dS
single capacitor
charging, VDD = 15V
Cbs,ext
IGBT and Diode Section
Description
Max. blocking voltage
DC output current
1
Condition
VIN=5V, IC=0.25mA
Tc = 25°C,TvJ < 150°C
Tc = 80°C,TvJ < 150°C
Symbol
Value
Unit
min
max
VCES
600
-
V
Iu, Iv, Iw
-12
-6
12
6
A
-18
18
A
-
5
µs
Repetitive peak collector current
tp limited by TvJmax
Iu, Iv, Iw
Short circuit withstand time1
(SCSOA)
VDC≤ 400V,
TvJ ≤ 150°C
tsc
IGBT reverse bias safe operating
area (RBSOA)
VDC≤ 500V,
TvJ = 150°C, IC = 6A
VCEmax = 600V
Power dissipation per IGBT
Tc = 25°C
Ptot
-
35
W
Operating junction temperature
range
IGBT
Diode
TvjI
TvjD
-40
-40
150
150
°C
Full Square
Allowed number of short circuits: <1000; time between short circuits: >1s.
Target Data Sheet
8/17
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
Description
Condition
Symbol
Unit
Value
min
typ
max
Single IGBT thermal resistance,
junction-case
RthJC
-
-
3.0
Single diode thermal resistance,
junction-case
RthJCD
-
-
4.2
K/W
Control Section
Description
Condition
Value
Symbol
Unit
min
max
Module supply voltage
VDD
-1
20
V
High side floating supply voltage
(VB vs. VS)
VBS
-1
20
V
VDD-VBS-6
VDD-VBS-50
600
V
Vin
-1
10
V
Operating junction temperature1
TJ,IC
-
125
°C
Max. switching frequency
fPWM
-
20
kHz
High side floating IC supply offset
voltage
tp < 500ns
Input voltage
LIN, HIN, ITRIP
VS1,2,3
Recommended Operation Conditions
All voltages are absolute voltages referenced to VSS -Potential unless otherwise specified.
Description
Symbol
Unit
Value
min
max
High side floating supply offset voltage
VS
-3
500
High side floating supply voltage (VB vs. VS)
VBS
12.5
17.5
Low side power supply
VDD
12.5
17.5
Logic input voltages LIN, HIN, ITRIP
VIN
0
5
1
V
Monitored by pin 24
Target Data Sheet
9/17
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
Static Parameters
(Tc = 25°C, VDD = 15V, if not stated otherwise)
Description
Condition
Symbol
Collector-Emitter blocking voltage
VIN = 5V, IC = 0.25mA
V(BR)CES
Collector-Emitter saturation voltage
Iout = +/- 6A
TvJ = 25°C
TvJ = 150°C
VCE(sat)
VIN =5V, Iout = +/- 6A
TvJ = 25°C
TvJ = 150°C
VF
VCE = 600V, VIN = 5V
TvJ = 25°C
TvJ = 150°C
tSC ≤ 5µs
VDC = 400V, TvJ = 150°C
ICES
Diode forward voltage
Zero gate voltage collector current
of IGBT
Short circuit collector current1
IC(SC) 2
Unit
Value
min
typ
max
600
-
-
-
1.6
1.9
2.1
-
-
1.65
1.6
2.05
-
-
-
40
1000
-
40
-
A
V
µA
Logic "0" input voltage (LIN,HIN)
VIH
1.7
2.1
2.4
V
Logic "1" input voltage (LIN,HIN)
VIL
0.7
0.9
1.1
V
ITRIP positive going threshold
VIT,TH+
360
460
540
mV
ITRIP input hysteresis
VIT,HYS
45
75
-
mV
VDD and VBS supply undervoltage
positive going threshold
VDDUV+
VBSUV+2
11.0
12.1
12.8
V
VDD and VBS supply undervoltage
negative going threshold
VDDUVVBSUV-2
9.5
10.4
11.0
V
VCC and VBS supply undervoltage
lockout hysteresis
VDDUVH
VBSUVH2
1.2
1.7
-
V
9.0
10.1
13.0
V
Input clamp voltage
(/HIN, /LIN, ITRIP)
IIN = 4 mA
VINCLAMP
Quiescent VBx supply current (VBx
only)
VHIN = low
IQB
-
360
550
µA
Quiescent VDD supply current
(VDD only)
VIN = float
IQDD
-
2.0
3.0
mA
Input bias current
VIN = 5V
IIN+
-
55
100
µA
Input bias current
VIN = 0V
IIN-
-
220
400
µA
ITRIP Input bias current
VITRIP = 5V
IITRIP+
-
75
120
µA
Tj,IC = 125°C, VS = 600V
ILVS2
-
30
-
µA
Leakage current of high side
1
Allowed number of short circuits: <1000; time between short circuits: >1s.
2
Test is not subject of product test, verified by characterisation
Target Data Sheet
10/17
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
Dynamic Parameters
(Tc = 25°C, VDD = 15V, if not stated otherwise)
Description
Condition
Symbol
Unit
Value
min
typ
max
Turn-on propagation delay
High side or low side
Iout = 6A, VLIN,HIN = 0V;
VDC = 300V
td(on)
-
617
-
ns
Turn-on rise time
High side or low side
Iout = 6A, VDC = 300V
VLIN,HIN = 5V
tr
-
21
-
ns
Turn-off propagation delay
High side or low side
Iout = 6A, VLIN,HIN = 5V;
VDC = 300V
td(off)
-
832
-
ns
Turn-off fall time
High side or low side
Iout = 6A, VDC = 300V
VLIN,HIN = 0V
tf
-
29
-
ns
Shutdown propagation delay ITRIP
VITRIP = 1V, Iu, Iv, Iw = 6A
tITRIP
-
900
-
ns
Input filter time ITRIP
VITRIP = 1V
tITRIPmin
155
210
380
ns
Input filter time at LIN for turn on
and off and input filter time at HIN
for turn on only
VLIN,HIN = 0 V & 5V
tFILIN
120
270
-
ns
Input filter time at HIN for turn off
VHIN = 5V
tFILIN1
-
220
-
ns
Input filter time at HIN for turn off
VHIN = 5 V
tFILIN2
-
400
-
ns
Fault clear time after ITRIP-fault
VLIN,HIN = 0 V & 5V
VITRIP = 0 V
tFLTCLR
-
4.7
-
ms
Min. deadtime between low side
and high side
DTPWM
-
1
-
µs
Deadtime of gate drive circuit
DTIC
-
380
-
ns
-
145
195
-
-
122
160
-
-
31
81
-
IGBT Turn-on Energy (includes
reverse recovery of diode)
Iout = 6A, VDC = 300V
TvJ = 25°C
TvJ = 150°C
Eon
IGBT Turn-off Energy
Iout = 6A, VDC = 300V
TvJ = 25°C
TvJ = 150°C
Eoff
Iout = 6A, VDC = 300V
TvJ = 25°C
TvJ = 150°C
Erec
Diode recovery Energy
Target Data Sheet
11/17
µJ
µJ
µJ
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
Integrated Components
Description
Condition
Symbol1
Value
Unit
min
typ
max
Rbs
-
10
-
Ω
VFDbs
-
1.9
2.05
V
Capacitor
C1
-
100
-
nF
Capacitor
C2
-
2.2
-
Bootstrap Capacitor
CbsHx
-
100
-
Resistor (0.25 W)
Bootstrap diode forward voltage
IFDbs = 100mA
Circuit of a Typical Application
1
Symbols according to Figure 1
Target Data Sheet
12/17
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
Characteristics
(Tc = 25°C, VDD = 15V, if not stated otherwise)
td(off)
1000ns
td(off)
1000ns
td(on)
t, SWITCHING TIMES
t, SWITCHING TIMES
td(on)
tr
100ns
tf
100ns
tf
10ns
tr
0A
5A
10A
10ns
25°C
15A
IC, COLLECTOR CURRENT
Figure 4. Typical switching times as a
function of collector current
(inductive load, TvJ=150°C,VCE =
300V
Dynamic test circuit in Figure A)
50°C
75°C
100°C
125°C
TvJ, JUNCTION TEMPERATURE
Figure 5. Typical switching times as a
function of junction temperature
(inductive load, VCE = 300V, IC = 6A
Dynamic test circuit in Figure A)
Eon
E, SWITCHING ENERGY LOSSES
E, SWITCHING ENERGY LOSSES
Eon
1.25mJ
1.00mJ
0.75mJ
0.50mJ
Eoff
0.25mJ
0.00mJ
0.15mJ
Eoff
0.10mJ
Erec
0.05mJ
Erec
0A
5A
10A
0.00mJ
25°C
15A
IC, COLLECTOR CURRENT
Figure 6. Typical switching energy losses
as a function of collector current
(inductive load, TJ = 150°C,
VCE = 300V
Dynamic test circuit in Figure A)
Target Data Sheet
13/17
50°C
75°C
100°C
125°C
TvJ, JUNCTION TEMPERATURE
Figure 7. Typical switching energy losses
as a function of junction
temperature
(inductive load, VCE = 300V, IC = 6A
Dynamic test circuit in Figure A)
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
VGE=25°C
15A
125°C
150°C
IF, forward CURRENT
IC, COLLECTOR CURRENT
15A
12A
9A
6A
3A
9A
6A
VGE=25°C
125°C
3A
0A
150°C
0A
0V
1V
2V
3V
0V
Single Pulse
IGBT
Diode
0
10 K/W
-1
10 K/W
2V
100µF
10µF
1µF
-2
10 K/W
1V
VF, forward VOLTAGE
Figure 9. Typical diode forward current as a
function of forward voltage
C, MAXIMUM EXT. BOOTSTRAP CAPACITOR
VCE, COLLECTOR EMITTER VOLTAGE
Figure 8. Typical output characteristic of
IGBT as a function of collector
emitter voltage
ZthJC, TRANSIENT THERMAL RESISTANCE
12A
1µs
10µs
100µs
1ms
10ms 100ms
1s
tP, PULSE WIDTH
Figure 10. Transient thermal impedance as
a function of pulse width
(D=tP/T)
Target Data Sheet
14/17
10V
12V
14V
16V
18V
VDD, SUPPLY VOLTAGE
Figure 11. Maximum ext. bootstrap capacitor
as a function of supply voltage VDD
(single capacitor charging)
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
Test Circuits and Parameter Definition
t Erec
Erec = ∫ vD ⋅i F dt
0
Figure A: Dynamic test circuit
Leakage inductance Lσ =180nH
Stray capacitance C σ =39pF
Figure B: Definition of diodes switching characteristics
Figure C: Definition of ITIRP propagation delay
LIN1,2,3
HIN1,2,3
2.1V
0.9V
td(off)
td(on)
tf
iCU, iCV, iCW
90%
vCEU, vCEV, vCEW
10%
90%
10%
2%
tEoff
t Eoff
Eoff =
tr
∫ vCEx ⋅i Cx dt
0
10%
2%
tEon
t Eon
Eon = ∫ vCEx ⋅i Cx dt
0
Figure D: Switching times definition and switching energy definition
Target Data Sheet
15/17
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
tFILIN
tFILIN
LIN
HIN
LIN
on
off
on
off
high
HO
LO
LO
a)
tFILIN1
low
tFILIN2
toff,HINx
HIN
toff,HINx < tFILIN1
high
HO
b)
HIN
toff,HINx
toFILIN1 < toff,HINx < tFILIN2
HO
c)
HIN
toff,HINx
toff,HINx > tFILIN2
HO
Figure E: Short Pulse suppression
Target Data Sheet
16/17
Rev. 0.2, Aug. 2009
CIPOS™ IKCS12F60EA
Package Outline IKCS12F60EA
Description
Condition
Weight
Value
Symbol
mP
Unit
min
typ
max
-
17
-
g
Note: There may occur discolourations on the copper surface without any effect of the thermal properties.
Target Data Sheet
17/17
Rev. 0.2, Aug. 2009
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