Maxim MAX1452CAE+ Low-cost precision sensor signal conditioner Datasheet

19-1829; Rev 2; 4/09
KIT
ATION
EVALU
E
L
B
AVAILA
Low-Cost Precision Sensor
Signal Conditioner
Features
The MAX1452 is a highly integrated analog-sensor signal processor optimized for industrial and process control applications utilizing resistive element sensors. The
MAX1452 provides amplification, calibration, and temperature compensation that enables an overall performance approaching the inherent repeatability of the
sensor. The fully analog signal path introduces no quantization noise in the output signal while enabling digitally
controlled trimming with the integrated 16-bit DACs.
Offset and span are calibrated using 16-bit DACs,
allowing sensor products to be truly interchangeable.
The MAX1452 architecture includes a programmable
sensor excitation, a 16-step programmable-gain amplifier (PGA), a 768-byte (6144 bits) internal EEPROM,
four 16-bit DACs, an uncommitted op amp, and an onchip temperature sensor. In addition to offset and span
compensation, the MAX1452 provides a unique temperature compensation strategy for offset TC and
FSOTC that was developed to provide a remarkable
degree of flexibility while minimizing testing costs.
o Provides Amplification, Calibration, and
Temperature Compensation
The MAX1452 is packaged for the commercial, industrial, and automotive temperature ranges in 16-pin SSOP/
TSSOP and 24-pin TQFN packages.
o Low 2mA Current Consumption
o Accommodates Sensor Output Sensitivities
from 4mV/V to 60mV/V
o Single Pin Digital Programming
o No External Trim Components Required
o 16-Bit Offset and Span Calibration Resolution
o Fully Analog Signal Path
o On-Chip Lookup Table Supports Multipoint
Calibration Temperature Correction
o Supports Both Current and Voltage Bridge
Excitation
o Fast 150µs Step Response
o On-Chip Uncommitted Op Amp
o Secure-Lock™ Prevents Data Corruption
Customization
Maxim can customize the MAX1452 for high-volume
dedicated applications. Using our dedicated cell library
of more than 2000 sensor-specific functional blocks,
Maxim can quickly provide a modified MAX1452 solution. Contact Maxim for further information.
Applications
Pressure Sensors
Transducers and Transmitters
Strain Gauges
Pressure Calibrators and Controllers
Resistive Elements Sensors
Accelerometers
Humidity Sensors
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX1452CAE+
0°C to +70°C
16 SSOP
MAX1452EAE+
-40°C to +85°C
16 SSOP
MAX1452AAE+
-40°C to +125°C
16 SSOP
MAX1452AUE+
-40°C to +125°C
16 TSSOP
MAX1452ATG+
-40°C to +125°C
24 TQFN-EP*
MAX1452C/D
0°C to +70°C
Dice**
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
**Dice are tested at TA = +25°C, DC parameters only.
Detailed Block Diagram and Pin Configurations appear at
the end of data sheet.
Outputs Supported
4–20mA
0 to +5V (rail-to-rail)
+0.5V to +4.5V Ratiometric
+2.5V to ±2.5V
Secure-Lock is a trademark of Maxim Integrated Products.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX1452
General Description
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD to VSS.........................................-0.3V, +6V
Supply Voltage, VDD to VDDF ................................-0.5V to +0.5V
All Other Pins ...................................(VSS - 0.3V) to (VDD + 0.3V)
Short-Circuit Duration, FSOTC, OUT, BDR,
AMPOUT ................................................................Continuous
Continuous Power Dissipation (TA = +70°C)
16-Pin SSOP/TSSOP (derate 8.00mW/°C above +70°C) ..640mW
24-Pin TQFN (derate 20.8mW/°C above +70°C) ...........1.67W
Operating Temperature:
MAX1452CAE+/MAX1452C/D ............................0°C to +70°C
MAX1452EAE+ ................................................-40°C to +85°C
MAX1452AAE+ ..............................................-40°C to +125°C
MAX1452ATG+..............................................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................ +300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = VDDF = +5V, VSS = 0V, TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
4.5
5.0
5.5
V
4.5
5.0
5.5
V
2.0
2.5
mA
GENERAL CHARACTERISTICS
Supply Voltage
VDD
EEPROM Supply Voltage
VDDF
Supply Current
IDD
(Note 1)
Maximum EEPROM Erase/Write
Current
IDDFW
30
mA
Maximum EEPROM Read
Current
IDDFR
12
mA
Oscillator Frequency
fOSC
0.85
1
1.15
MHz
ANALOG INPUT
Input Impedance
RIN
1
MΩ
±1
µV/°C
Input Referred Offset Tempco
(Notes 2, 3)
Input Referred Adjustable
Offset Range
Offset TC = 0 at minimum gain (Note 4)
±150
mV
Amplifier Gain Nonlinearity
Percent of +4V span, VOUT = +0.5V to 4.5V
0.01
%
Common-Mode Rejection Ratio
Specified for common-mode voltages
between VSS and VDD (Note 2)
90
dB
4 to 60
mV/V
Input Referred Adjustable
FSO Range
CMRR
(Note 5)
ANALOG OUTPUT
Differential Signal-Gain Range
Differential Signal Gain
Maximum Output-Voltage Swing
2
Selectable in 16 steps
39 to 234
V/V
Configuration [5:2] 0000bin
34
39
46
Configuration [5:2] 0001bin
47
52
59
Configuration [5:2] 0010bin
58
65
74
Configuration [5:2] 0100bin
82
91
102
Configuration [5:2] 1000bin
133
143
157
No load from each supply
0.02
_______________________________________________________________________________________
V/V
V
Low-Cost Precision Sensor
Signal Conditioner
MAX1452
ELECTRICAL CHARACTERISTICS (continued)
(VDD = VDDF = +5V, VSS = 0V, TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
Output-Voltage Low
IOUT = 1mA sinking, TA = TMIN to TMAX
Output-Voltage High
IOUT = 1mA sourcing, TA = TMIN to TMAX
MIN
4.75
Output Impedance at DC
Output Offset Ratio
Output Offset TC Ratio
TYP
MAX
UNITS
0.100
0.20
V
4.87
V
0.1
Ω
ΔVOUT/
ΔOffset
0.90
1.05
1.20
V/V
ΔVOUT/
ΔOffset TC
0.9
1
1.2
V/V
Step Response and IC
(63% Final Value)
Maximum Capacitive Load
DC to 1kHz (gain = minimum, source
impedance = 5kΩ VDDF filter)
Output Noise
150
µs
1
µF
0.5
mVRMS
BRIDGE DRIVE
Bridge Current
IBDR
Current Mirror Ratio
AA
VSPAN Range (Span Code)
RL = 1.7kΩ
RISOURCE = internal
TA = TMIN to TMAX
0.1
0.5
10
12
4000
2
mA
14
A/A
C000
hex
DIGITAL-TO-ANALOG CONVERTERS
DAC Resolution
16
Bits
DAC reference = VDD = +5.0V
76
µV/bit
ΔVOUT/
ΔCode
DAC reference = VBDR = +2.5V
38
µV/bit
FSODAC Bit Weight
ΔVOUT/
ΔCode
DAC reference = VDD = +5.0V
76
µV/bit
FSOTCDAC Bit Weight
ΔVOUT/
ΔCode
DAC reference = VBDR = +2.5V
38
µV/bit
Including sign
4
Bits
Input referred, DAC reference =
VDD = +5.0V (Note 6)
9
mV/bit
ODAC Bit Weight
ΔVOUT/
ΔCode
OTCDAC Bit Weight
COARSE OFFSET DAC
IRODAC Resolution
IRODAC Bit Weight
ΔVOUT/
ΔCode
FSOTC BUFFER
Minimum Output-Voltage Swing
No load
Maximum Output-Voltage Swing
No load
Current Drive
VFSOTC = +2.5V
VSS +
0.1
VDD - 1.0
V
V
-40
+40
µA
INTERNAL RESISTORS
Current-Source Reference
Resistor
RISRC
75
kΩ
_______________________________________________________________________________________
3
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
ELECTRICAL CHARACTERISTICS (continued)
(VDD = VDDF = +5V, VSS = 0V, TA = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
Current-Source Reference
Resistor Temperature Coefficient
ΔRISRC
1300
ppm/°C
RFTC
75
kΩ
ΔRFTC
1300
ppm/°C
FSOTC Resistor
FSOTC Resistor Temperature
Coefficient
CONDITIONS
MIN
TYP
MAX
UNITS
TEMPERATURE-TO-DIGITAL CONVERTER
Temperature ADC Resolution
8
Bits
Offset
±3
LSB
Gain
1.45
°C/bit
Nonlinearity
±0.5
LSB
Lowest Digital Output
00
hex
Highest Digital Output
AF
hex
90
dB
UNCOMMITTED OP AMP
Open-Loop Gain
RL = 100kΩ
Input Common-Mode Range
Output Swing
No load, TA = TMIN to TMAX
Output-Voltage High
1mA source, TA = TMIN to TMAX
Output-Voltage Low
1mA sink, TA = TMIN to TMAX
Offset
VIN+ = +2.5V, unity gain buffer
Unity Gain Bandwidth
VSS
VDD
V
VSS +
0.02
VDD 0.02
V
0.15
V
4.85
4.90
0.05
-20
V
+20
mV
2
MHz
EEPROM
Maximum Erase/Write Cycles
(Note 7)
10k
Cycles
Minimum Erase Time
(Note 8)
6
ms
100
µs
Minimum Write Time
Excludes sensor or load current.
All electronics temperature errors are compensated together with sensors errors.
The sensor and the MAX1452 must be at the same temperature during calibration and use.
This is the maximum allowable sensor offset.
This is the sensor's sensitivity normalized to its drive voltage, assuming a desired full span output of +4V and a bridge voltage range of +1.7V to +4.25V.
Note 6: Bit weight is ratiometric to VDD.
Note 7: Programming of the EEPROM at room temperature is recommended.
Note 8: Allow a minimum of 6ms elapsed time before sending any command.
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
4
_______________________________________________________________________________________
Low-Cost Precision Sensor
Signal Conditioner
OFFSET DAC DNL
AMPLIFIER GAIN NONLINEARITY
OUTPUT ERROR FROM STRAIGHT LINE (mV)
DNL (mV)
2.5
0
-2.5
2.5
MAX1452 toc02
5.0
MAX1452 toc01
5.0
ODAC = 6250hex
OTCDAC = 0
FSODAC = 4000hex
FSOTCDAC = 8000hex
PGA INDEX = 0
IRO = 2
0
-2.5
-5.0
-5.0
-50 -40 -30 -20 -10
0
10k
20k
30k
40k
50k
60k
70k
0
10 20 30
40
50
INPUT VOLTAGE [INP - INM] (mV)
DAC CODE
MAX1452 toc03
OUTPUT NOISE
OUT
10mV/div
400μs/div
C = 4.7μF, RLOAD = 1kΩ
Pin Description
PIN
NAME
FUNCTION
SSOP/TSSOP
TQFN-EP
1
1
ISRC
Bridge Drive Current Mode Setting
2
2
OUT
High ESD and Scan Path Output Signal. May need a 0.1µF capacitor, in
noisy environments. OUT may be parallel connected to DIO.
3
3
VSS
Negative Supply Voltage
4
4
INM
Bridge Negative Input. Can be swapped to INP by configuration register.
5
5
BDR
Bridge Drive
6
6
INP
Bridge Positive Input. Can be swapped to INM by configuration register.
7
7
VDD
Positive Supply Voltage. Connect a 0.1µF capacitor from VDD to VSS.
—
8, 9, 13, 16, 20, 22,
23, 24
N.C.
No Connection. Not internally connected; leave unconnected (TQFN
package only).
8
10
TEST
Internally Connected. Connect to VSS.
_______________________________________________________________________________________
5
MAX1452
Typical Operating Characteristics
(VDD = +5V, TA = +25°C, unless otherwise noted.)
Low-Cost Precision Sensor
Signal Conditioner
MAX1452
Pin Description (continued)
PIN
NAME
FUNCTION
SSOP/TSSOP
TQFN-EP
9
11
VDDF
10
12
UNLOCK
11
14
DIO
12
15
CLK1M
13
17
AMPOUT
14
18
AMP-
Uncommitted Amplifier Negative Input
15
19
AMP+
Uncommitted Amplifier Positive Input
16
21
FSOTC
—
—
EP
Positive Supply Voltage for EEPROM. Connect a 1µF capacitor from
VDDF to VSS. Connect VDDF to VDD or for improved noise performance
connect a 30Ω resistor to VDD.
Secure-Lock Disable. Allows communication to the device.
Digital Input Output. DIO allows communication with the device.
1MHz Clock Output. The output can be controlled by a configuration bit.
Uncommitted Amplifier Output
Full Span TC Buffered Output
Exposed Pad (TQFN Only). Internally connected; connect to VSS.
Detailed Description
The MAX1452 provides amplification, calibration, and
temperature compensation to enable an overall performance approaching the inherent repeatability of the
sensor. The fully analog signal-path introduces no
quantization noise in the output signal while enabling
digitally controlled trimming with the integrated 16-bit
DACs. Offset and span can be calibrated to within
±0.02% of span.
The MAX1452 architecture includes a programmable
sensor excitation, a 16-step programmable-gain amplifier (PGA), a 768-byte (6144 bits) internal EEPROM, four
16-bit DACs, an uncommitted op amp, and an on-chip
temperature sensor.The MAX1452 also provides a
unique temperature compensation strategy for offset
TC and FSOTC that was developed to provide a
remarkable degree of flexibility while minimizing testing
costs.
The customer can select from one to 114 temperature
points to compensate their sensor. This allows the latitude to compensate a sensor with a simple first order
linear correction or match an unusual temperature
curve. Programming up to 114 independent 16-bit EEPROM locations corrects performance in 1.5°C temperature increments over a range of -40°C to +125°C. For
sensors that exhibit a characteristic temperature performance, a select number of calibration points can be
used with a number of preset values that define the
temperature curve. In cases where the sensor is at a
different temperature than the MAX1452, the MAX1452
uses the sensor bridge itself to provide additional temperature correction.
6
The single pin, serial Digital Input-Output (DIO) communication architecture and the ability to timeshare its
activity with the sensor’s output signal enables output
sensing and calibration programming on a single line
by parallel connecting OUT and DIO. The MAX1452
provides a Secure-Lock feature that allows the customer to prevent modification of sensor coefficients and
the 52-byte user definable EEPROM data after the sensor has been calibrated. The Secure-Lock feature also
provides a hardware override to enable factory rework
and recalibration by assertion of logic high on the
UNLOCK pin.
The MAX1452 allows complete calibration and sensor
verification to be performed at a single test station.
Once calibration coefficients have been stored in the
MAX1452, the customer can choose to retest in order to
verify performance as part of a regular QA audit or to
generate final test data on individual sensors.
The MAX1452’s low current consumption and the integrated uncommitted op amp enables a 4–20mA output
signal format in a sensor that is completely powered
from a 2-wire current loop. Frequency response can be
user-adjusted to values lower than the 3.2kHz bandwidth by using the uncommitted op amp and simple
passive components.
The MAX1452 (Figure 1) provides an analog amplification path for the sensor signal. It also uses an analog
architecture for first-order temperature correction. A
digitally controlled analog path is then used for nonlinear temperature correction. Calibration and correction
is achieved by varying the offset and gain of a programmable-gain-amplifier (PGA) and by varying the
_______________________________________________________________________________________
Low-Cost Precision Sensor
Signal Conditioner
VDD
BIAS
GENERATOR
IRO
DAC
MAX1452
OSCILLATOR
CLK1M
TEST
INP
∑
PGA
OUT
INM
ISRC
CURRENT
SOURCE
ANAMUX
A=1
TEMP
SENSOR
8-BIT ADC
VDDF
DIO
UNLOCK
INTERNAL
EEPROM
6144 BITS
16 BIT DAC - FSO (176) POINT
16 BIT DAC - OFFSET (176)
16 BIT DAC - OFFSET TC
16 BIT DAC - FSO TC
BDR
416 BITS
FOR USER VDD
176
TEMPERATURE
LOOK UP
POINTS FOR
OFFSET AND
SPAN.
BDR
AMP+
FSOTC
OP-AMP
AMPOUT
AMPVSS
Figure 1. Functional Diagram
sensor bridge excitation current or voltage. The PGA
utilizes a switched capacitor CMOS technology, with an
input referred offset trimming range of more than
±150mV with an approximate 3µV resolution (16 bits).
The PGA provides gain values from 39V/V to 234V/V in
16 steps.
The MAX1452 uses four 16-bit DACs with calibration
coefficients stored by the user in an internal 768 x 8
EEPROM (6144 bits). This memory contains the following information, as 16-bit wide words:
• Configuration Register
•
Offset Calibration Coefficient Table
•
Offset Temperature Coefficient Register
•
FSO (Full-Span Output) Calibration Table
•
FSO Temperature Error Correction Coefficient
Register
•
52 bytes (416 bits) uncommitted for customer programming of manufacturing data (e.g., serial number and date)
Initial offset correction is accomplished at the input
stage of the signal gain amplifiers by a coarse offset
setting. Final offset correction occurs through the use of
a temperature indexed lookup table with 176 16-bit
entries. The on-chip temperature sensor provides a
unique 16-bit offset trim value from the table with an
indexing resolution of approximately 1.5°C from -40°C
to +125°C. Every millisecond, the on-chip temperature
sensor provides indexing into the offset lookup table in
EEPROM and the resulting value transferred to the offset DAC register. The resulting voltage is fed into a
summing junction at the PGA output, compensating the
sensor offset with a resolution of ±76µV (±0.0019%
FSO). If the offset TC DAC is set to zero then the maximum temperature error is equivalent to one degree of
temperature drift of the sensor, given the Offset DAC
has corrected the sensor at every 1.5°C. The temperature indexing boundaries are outside of the specified
Absolute Maximum Ratings . The minimum indexing
value is 00hex corresponding to approximately -69°C.
All temperatures below this value output the coefficient
value at index 00hex. The maximum indexing value is
AFhex, which is the highest lookup table entry. All temperatures higher than approximately 184°C output the
highest lookup table index value. No indexing wraparound errors are produced.
FSO Correction
Two functional blocks control the FSO gain calibration.
First, a coarse gain is set by digitally selecting the gain
of the PGA. Second, FSO DAC sets the sensor bridge
current or voltage with the digital input obtained from a
temperature-indexed reference to the FSO lookup table
in EEPROM. FSO correction occurs through the use of
a temperature indexed lookup table with 176 16-bit
entries. The on-chip temperature sensor provides a
unique FSO trim from the table with an indexing resolution approaching one 16-bit value at every 1.5°C from
-40°C to +125°C. The temperature indexing boundaries
are outside of the specified Absolute Maximum
Ratings. The minimum indexing value is 00hex corresponding to approximately -69°C. All temperatures
below this value output the coefficient value at index
00hex. The maximum indexing value is AFhex, which is
the highest lookup table entry. All temperatures higher
than approximately 184°C output the highest lookup
table index value. No indexing wrap-around errors are
produced.
_______________________________________________________________________________________
7
MAX1452
Offset Correction
VDD
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Linear and Nonlinear
Temperature Compensation
For high accuracy applications (errors less than
0.25%), the first-order offset and FSOTC should be
compensated with the offset TC and FSOTC DACs, and
the residual higher order terms with the lookup table.
The offset and FSO compensation DACs provide
unique compensation values for approximately 1.5°C of
temperature change as the temperature indexes the
address pointer through the coefficient lookup table.
Changing the offset does not effect the FSO, however
changing the FSO affects the offset due to nature of the
bridge. The temperature is measured on both the
MAX1452 die and at the bridge sensor. It is recommended to compensate the first-order temperature
errors using the bridge sensor temperature.
Writing 16-bit calibration coefficients into the offset TC
and FSOTC registers compensates first-order temperature errors. The piezoresistive sensor is powered by a
current source resulting in a temperature-dependent
bridge voltage due to the sensor's temperature resistance coefficient (TCR). The reference inputs of the offset TC DAC and FSOTC DAC are connected to the
bridge voltage. The DAC output voltages track the
bridge voltage as it varies with temperature, and by
varying the offset TC and FSOTC digital code a portion
of the bridge voltage, which is temperature dependent,
is used to compensate the first order temperature
errors.
The internal feedback resistors (RISRC and RSTC) for
FSO temperature compensation are optimized to 75kΩ
for silicon piezoresistive sensors. However, since the
required feedback resistor values are sensor dependent,
external resistors may also be used. The internal resistors selection bit in the configuration register selects
between internal and external feedback resistors.
To calculate the required offset TC and FSOTC compensation coefficients, two test-temperatures are needed. After taking at least two measurements at each
temperature, calibration software (in a host computer)
calculates the correction coefficients and writes them to
the internal EEPROM.
With coefficients ranging from 0000hex to FFFFhex and
a +5V reference, each DAC has a resolution of 76µV.
Two of the DACs (offset TC and FSOTC) utilize the sensor bridge voltage as a reference. Since the sensor
bridge voltage is approximately set to +2.5V the FSOTC
and offset TC exhibit a step size of less than 38µV.
Typical Ratiometric
Operating Circuit
Ratiometric output configuration provides an output that
is proportional to the power supply voltage. This output
can then be applied to a ratiometric ADC to produce a
digital value independent of supply voltage.
Ratiometricity is an important consideration for batteryoperated instruments, automotive, and some industrial
applications.
The MAX1452 provides a high-performance ratiometric
output with a minimum number of external components
(Figure 2). These external components include the following:
• One supply bypass capacitor.
•
One optional output EMI suppression capacitor.
•
Two optional resistors, RISRC and RSTC, for special
sensor bridge types.
+5V VDD
7
5
6
VDD
9
BDR
VDDF
INP
OUT 2
OUT
MAX1452
16
FSOTC
SENSOR
4
INM
RSTC
ISRC
1
0.1μF
TEST VSS
8
0.1μF
RISRC
3
GND
Figure 2. Basic Ratiometric Output Configuration
8
_______________________________________________________________________________________
Low-Cost Precision Sensor
Signal Conditioner
MAX1452
G 2N4392
IN
1
S
D
VPWR
+12V TO +40V
MAX15006B
8
7
5
6
OUT
VDD
GND
5
30Ω
9
BDR
VDDF
INP
OUT 2
OUT
MAX1452
16
FSOTC
SENSOR
4
INM
RSTC
ISRC
1
1.0μF
TEST VSS
8
2.2μF
0.1μF
0.1μF
RISRC
3
GND
Figure 3. Basic Nonratiometric Output Configuration
Typical Nonratiometric
Operating Circuit
(12VDC < VPWR < 40VDC)
Nonratiometric output configuration enables the sensor
power to vary over a wide range. A high performance
voltage reference, such as the MAX15006B, is incorporated in the circuit to provide a stable supply and reference for MAX1452 operation. A typical example is
shown in Figure 3. Nonratiometric operation is valuable
when wide ranges of input voltage are to be expected
and the system A/D or readout device does not enable
ratiometric operation.
Internal Calibration Registers (ICRs)
The MAX1452 has five 16-bit internal calibration registers that are loaded from EEPROM, or loaded from the
serial digital interface.
Data can be loaded into the internal calibration registers under three different circumstances.
Normal Operation, Power-On Initialization Sequence
• The MAX1452 has been calibrated, the SecureLock byte is set (CL[7:0] = FFhex) and UNLOCK is
low.
•
Power is applied to the device.
•
The power-on-reset functions have completed.
Typical 2-Wire, Loop Powered,
4–20mA Operating Circuit
•
Registers CONFIG, OTCDAC, and FSOTCDAC are
refreshed from EEPROM.
Process Control systems benefit from a 4–20mA current
loop output format for noise immunity, long cable runs,
and 2-wire sensor operation. The loop voltages can
range from 12VDC to 40VDC and are inherently nonratiometric. The low current consumption of the MAX1452
allows it to operate from loop power with a simple
4–20mA drive circuit efficiently generated using the
integrated uncommitted op amp (Figure 4).
•
Registers ODAC, and FSODAC are refreshed from
the temperature indexed EEPROM locations.
Normal Operation, Continuous Refresh
• The MAX1452 has been calibrated, the SecureLock byte has been set (CL[7:0] = FFhex) and
UNLOCK is low.
•
Power is applied to the device.
•
The power-on-reset functions have completed.
•
The temperature index timer reaches a 1ms time
period.
_______________________________________________________________________________________
9
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
2N4392
G
VIN+
+12V TO +40V
D 100Ω
S
IN
1
Z1
MAX15006B
8
7
5
6
OUT
VDD
BDR
VDDF
INP
FSOTC
GND
5
30Ω
9
16
1.0μF
RSTC
MAX1452
SENSOR
4
ISRC
1
INM
2.2μF
0.1μF
RISRC 4.99MΩ
OUT
AMPOUT
AMPAMP+
499kΩ
0.1μF
13
2N2222A
14
15
4.99kΩ
0.1μF
100kΩ
TEST VSS
8
2
3
100kΩ
47Ω
VIN-
Figure 4. Basic 4–20mA Output, Loop-Powered Configuration
•
Registers CONFIG, OTCDAC, and FSOTCDAC are
refreshed from EEPROM.
•
Registers ODAC and FSODAC are refreshed from
the temperature indexed EEPROM locations.
Calibration Operation, Registers Updated by Serial
Communications
• The MAX1452 has not had the Secure-Lock byte
set (CL[7:0] = 00hex) or UNLOCK is high.
•
Power is applied to the device.
•
The power-on-reset functions have completed.
•
The registers can then be loaded from the serial
digital interface by use of serial commands. See the
section on Serial I/O and Commands.
Internal EEPROM
The internal EEPROM is organized as a 768 by 8-bit
memory. It is divided into 12 pages, with 64 bytes per
10
page. Each page can be individually erased. The memory structure is arranged as shown in Table 1. The lookup tables for ODAC and FSODAC are also shown, with
the respective temp-index pointer. Note that the ODAC
table occupies a continuous segment, from address
000hex to address 15Fhex, whereas the FSODAC table
is divided in two parts, from 200hex to 2FFhex, and
from 1A0hex to 1FFhex. With the exception of the general purpose user bytes, all values are 16-bit wide
words formed by two adjacent byte locations (high byte
and low byte).
The MAX1452 compensates for sensor offset, FSO, and
temperature errors by loading the internal calibration
registers with the compensation values. These compensation values can be loaded to registers directly through
the serial digital interface during calibration or loaded
automatically from EEPROM at power-on. In this way the
device can be tested and configured during calibration
and test and the appropriate compensation values
______________________________________________________________________________________
Low-Cost Precision Sensor
Signal Conditioner
MAX1452
Table 1. EEPROM Memory Address Map
PAGE
0
1
2
3
4
5
6
7
8
9
A
B
LOW-BYTE
ADDRESS (hex)
HIGH-BYTE
ADDRESS (hex)
TEMP-INDEX[7:0]
(hex)
000
001
00
03E
03F
1F
20
040
041
07E
07F
3F
080
081
40
0BE
0BF
5F
0C0
0C1
60
0FE
0FF
7F
100
101
80
13E
13F
9F
140
141
A0
15E
15F
AF to FF
160
161
CONTENTS
ODAC
Lookup Table
Configuration
162
163
Reserved
164
165
OTCDAC
166
167
Reserved
168
169
FSOTCDAC
16A
16B
Control Location
16C
16D
17E
17F
180
181
19E
19F
52 General-Purpose
User Bytes
1A0
1A1
80
1BE
1BF
8F
1C0
1C1
90
1FE
1FF
AF to FF
200
201
00
23E
23F
1F
20
240
241
27E
27F
3F
280
281
40
2BE
2BF
5F
2C0
2C1
60
2FE
2FF
7F
stored in internal EEPROM. The device auto-loads the
registers from EEPROM and be ready for use without further configuration after each power-up. The EEPROM is
configured as an 8-bit wide array so each of the 16-bit
FSODAC
Lookup Table
registers is stored as two 8-bit quantities. The configuration register, FSOTCDAC and OTCDAC registers are
loaded from the pre-assigned locations in the EEPROM.
______________________________________________________________________________________
11
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
The ODAC and FSODAC are loaded from the EEPROM
lookup tables using an index pointer that is a function
of temperature. An ADC converts the integrated temperature sensor output to an 8-bit value every 1ms. This
digitized value is then transferred into the temp-index
register.
The typical transfer function for the temp-index is as follows:
temp-index = 0.6879 Temperature (°C) + 44.0
where temp-index is truncated to an 8-bit integer value.
Typical values for the temp-index register are given in
Table 6.
Note that the EEPROM is byte wide and the registers
that are loaded from EEPROM are 16 bits wide. Thus
each index value points to two bytes in the EEPROM.
Maxim programs all EEPROM locations to FFhex with
the exception of the oscillator frequency setting and
Secure-Lock byte. OSC[2:0] is in the Configuration
Register (Table 3). These bits should be maintained at
the factory preset values. Programming 00hex in the
Secure-Lock byte (CL[7:0] = 00hex), configures the
DIO as an asynchronous serial input for calibration and
test purposes.
Communication Protocol
The DIO serial interface is used for asynchronous serial
data communications between the MAX1452 and a
host calibration test system or computer. The MAX1452
automatically detects the baud rate of the host computer when the host transmits the initialization sequence.
Baud rates between 4800bps and 38,400bps can be
detected and used regardless of the internal oscillator
frequency setting. Data format is always 1 start bit, 8
data bits, 1 stop bit and no parity. Communications are
only allowed when Secure-Lock is disabled (i.e.,
CL[7:0] = 00hex) or the UNLOCK pin is held high.
to complete and the DIO pin to be configured by
Secure-Lock or the UNLOCK pin.
Reinitialization Sequence
The MAX1452 allows for relearning the baud rate. The
reinitialization sequence is one byte transmission of
FFhex, as follows:
11111111011111111111111111
When a serial reinitialization sequence is received, the
receive logic resets itself to its power-up state and
waits for the initialization sequence. The initialization
sequence must follow the reinitialization sequence in
order to re-establish the baud rate.
Serial Interface Command Format
All communication commands into the MAX1452 follow
a defined format utilizing an interface register set (IRS).
The IRS is an 8-bit command that contains both an
interface register set data (IRSD) nibble (4-bit) and an
interface register set address (IRSA) nibble (4-bit). All
internal calibration registers and EEPROM locations are
accessed for read and write through this interface register set. The IRS byte command is structured as follows:
IRS[7:0] = IRSD[3:0], IRSA[3:0]
Where:
• IRSA[3:0] is the 4-bit interface register set address
and indicates which register receives the data nibble IRSD[3:0].
•
IRSA[0] is the first bit on the serial interface after the
start bit.
•
IRSD[3:0] is the 4-bit interface register set data.
•
IRSD[0] is the fifth bit received on the serial interface after the start bit.
The IRS address decoding is shown in Table 10.
Initialization Sequence
Special Command Sequences
Sending the initialization sequence shown below
enables the MAX1452 to establish the baud rate that
initializes the serial port. The initialization sequence is
one byte transmission of 01hex, as follows:
A special command register to internal logic
(CRIL[3:0]) causes execution of special command
sequences within the MAX1452. These command
sequences are listed as CRIL command codes as
shown in Table 11.
1111111101000000011111111
Write Examples
The first start bit 0 initiates the baud rate synchronization
sequence. The 8 data bits 01hex (LSB first) follow this
and then the stop bit, which is indicated above as a 1,
terminates the baud rate synchronization sequence.
This initialization sequence on DIO should occur after a
period of 1ms after stable power is applied to the
device. This allows time for the power-on-reset function
12
A 16-bit write to any of the internal calibration registers
is performed as follows:
1) Write the 16 data bits to DHR[15:0] using four byte
accesses into the interface register set.
2) Write the address of the target internal calibration
register to ICRA[3:0].
______________________________________________________________________________________
Low-Cost Precision Sensor
Signal Conditioner
DRIVEN BY TESTER
DIO
11111 0 1 0 0 11 0 1 0 11
THREE-STATE
NEED WEAK
PULLUP
DRIVEN BY MAX1452
1 1 1 1 1 1 1
1 0 0 0 0 0 1 0 0 0 11
1 1 1 1 1 1 1
11
STOP-BIT
MSB
LSB
START-BIT
STOP-BIT
MSB
LSB
START-BIT
MAX1452
THREE-STATE
NEED WEAK
PULLUP
Figure 5. DIO Output Data Format
3) Write the load internal calibration register (LdICR)
command to CRIL[3:0].
When a LdICR command is issued to the CRIL register,
the calibration register loaded depends on the address
in the internal calibration register address (ICRA). Table
12 specifies which calibration register is decoded.
Erasing and Writing the EEPROM
The internal EEPROM needs to be erased (bytes set to
FFhex) prior to programming the desired contents.
Remember to save the 3 MSBs of byte 161hex (highbyte of the configuration register) and restore it when
programming its contents to prevent modification of the
trimmed oscillator frequency.
The internal EEPROM can be entirely erased with the
ERASE command, or partially erased with the
PageErase command (see Table 11, CRIL command).
It is necessary to wait 6ms after issuing the ERASE or
PageErase command.
After the EEPROM bytes have been erased (value of
every byte = FFhex), the user can program its contents,
following the procedure below:
1) Write the 8 data bits to DHR[7:0] using two byte
accesses into the interface register set.
2) Write the address of the target internal EEPROM
location to IEEA[9:0] using three byte accesses into
the interface register set.
3) Write the EEPROM write command (EEPW) to
CRIL[3:0].
Serial Digital Output
When a RdIRS command is written to CRIL[3:0], DIO is
configured as a digital output and the contents of the
register designated by IRSP[3:0] are sent out as a byte
framed by a start bit and a stop bit.
Once the tester finishes sending the RdIRS command,
it must three-state its connection to DIO to allow the
MAX1452 to drive the DIO line. The MAX1452 threestates DIO high for 1 byte time and then drive with the
start bit in the next bit period followed by the data byte
and stop bit. The sequence is shown in Figure 5.
The data returned on a RdIRS command depends on
the address in IRSP. Table 13 defines what is returned
for the various addresses.
Multiplexed Analog Output
When a RdAlg command is written to CRIL[3:0] the
analog signal designated by ALOC[3:0] is asserted on
the OUT pin. The duration of the analog signal is determined by ATIM[3:0] after which the pin reverts to threestate. While the analog signal is asserted in the OUT
pin, DIO is simultaneously three-stated, enabling a parallel wiring of DIO and OUT. When DIO and OUT are
connected in parallel, the host computer or calibration
system must three-state its connection to DIO after
asserting the stop bit. Do not load the OUT line when
reading internal signals, such as BDR, FSOTC...etc.
The analog output sequence with DIO and OUT is
shown in Figure 6.
The duration of the analog signal is controlled by
ATIM[3:0] as given in Table 14.
______________________________________________________________________________________
13
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
THREE-STATE
NEED WEAK
PULLUP
DRIVEN BY TESTER
DIO
11111 0 1 0 0 11 0 1 0 11
THREE-STATE
2ATIM +1 BYTE
TIMES
THREE-STATE
NEED WEAK
PULLUP
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
11
STOP-BIT
MSB
LSB
START-BIT
HIGH IMPEDANCE
OUT
VALID OUT
Figure 6. Analog Output Timing
The analog signal driven onto the OUT pin is determined by the value in the ALOC register. The signals
are specified in Table 15.
•
Calibrate the output offset and FSO of the transducer using the ODAC and FSODAC, respectively.
•
Store calibration data in the test computer or
MAX1452 EEPROM user memory.
Test System Configuration
The MAX1452 is designed to support an automated
production test system with integrated calibration and
temperature compensation. Figure 7 shows the implementation concept for a low-cost test system capable
of testing many transducer modules connected in parallel. The MAX1452 allows for a high degree of flexibility in system calibration design. This is achieved by use
of single-wire digital communication and three-state
output nodes. Depending upon specific calibration
requirements one may connect all the OUTs in parallel
or connect DIO and OUT on each individual module.
Sensor Compensation Overview
Compensation requires an examination of the sensor
performance over the operating pressure and temperature range. Use a minimum of two test pressures (e.g.,
zero and full-span) and two temperatures. More test
pressures and temperatures result in greater accuracy.
A typical compensation procedure can be summarized
as follows:
Set reference temperature (e.g., +25°C):
• Initialize each transducer by loading their respective registers with default coefficients (e.g., based
on mean values of offset, FSO and bridge resistance) to prevent overload of the MAX1452.
•
14
Set the initial bridge voltage (with the FSODAC) to
half of the supply voltage. Measure the bridge voltage using the BDR or OUT pins, or calculate based
on measurements.
Set next test temperature:
•
Calibrate offset and FSO using the ODAC and FSODAC, respectively.
•
Store calibration data in the test computer or
MAX1452 EEPROM user memory.
•
Calculate the correction coefficients.
•
Download correction coefficients to EEPROM.
•
Perform a final test.
Sensor Calibration and
Compensation Example
The MAX1452 temperature compensation design corrects both sensor and IC temperature errors. This
enables the MAX1452 to provide temperature compensation approaching the inherent repeatability of the
sensor. An example of the MAX1452’s capabilities is
shown in Figure 8.
A repeatable piezoresistive sensor with an initial offset
of 16.4mV and a span of 55.8mV was converted into a
compensated transducer (utilizing the piezoresistive
sensor with the MAX1452) with an offset of 0.5000V and
a span of 4.0000V. Nonlinear sensor offset and FSO
temperature errors, which were on the order of 20% to
30% FSO, were reduced to under ±0.1% FSO. The following graphs show the output of the uncompensated
sensor and the output of the compensated transducer.
Six temperature points were used to obtain this result.
______________________________________________________________________________________
Low-Cost Precision Sensor
Signal Conditioner
MAX1452
DIO[1:N]
DATA
DATA
VOUT
+5V
MODULE N
MAX1452
MODULE 2
MAX1452
MODULE 1
DION
DIO2
DIO1
MAX1452
DIGITAL
MULTIPLEXER
VDD
VSS
VOUT
VDD
VSS
VOUT
VDD
VSS
VOUT
DVM
TEST OVEN
Figure 7. Automated Test System Concept
MAX1452 Evaluation Kit
To expedite the development of MAX1452
based transducers and test systems, Maxim has produced the MAX1452 evaluation kit (EV kit). First-time
users of the MAX1452 are strongly encouraged to use
this kit.
The EV kit is designed to facilitate manual programming of the MAX1452 with a sensor. It includes the following:
1) Evaluation Board with or without a silicon pressure
sensor, ready for customer evaluation.
2) Design/Applications Manual, which describes in
detail the architecture and functionality of the
MAX1452. This manual was developed for test
engineers familiar with data acquisition of sensor
data and provides sensor compensation algorithms
and test procedures.
3) MAX1452 Communication Software, which enables
programming of the MAX1452 from a computer
keyboard (IBM compatible), one module at a time.
4) Interface Adapter, which allows the connection of
the evaluation board to a PC serial port.
______________________________________________________________________________________
15
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
RAW SENSOR OUTPUT
TA = +25°C
30.0
ERROR (% FSO)
VOUT (mV)
80
60
40
6
0
UNCOMPENSATED SENSOR
TEMPERATURE ERROR
FSO
OFFSET
20.0
10.0
0.0
-10.0
-20.0
0
20
40
60
80
100
-50
0
4.0
3.0
2.0
1.0
-0.1
-0.15
-50
0
50
100
TEMPERATURE (°C)
150
0
0
20
40
60
PRESSURE (kPs)
80
Figure 8. Comparison of an Uncalibrated Sensor and a Calibrated Transducer
Table 2. Registers
REGISTER
CONFIG
ODAC
16
DESCRIPTION
Configuration Register
Offset DAC Register
OTCDAC
Offset Temperature Coefficient DAC Register
FSODAC
Full Span Output DAC Register
FSOTCDAC
150
5.0
OFFSET
VOUT (V)
ERROR (% FSO)
FSO
100
COMPENSATED TRANSDUCER
TA = +25°C
COMPENSATED TRANSDUCER ERROR
0.15
0.1
0.05
0
-0.05
50
TEMPERATURE (°C)
PRESSURE (kPs)
Full Span Output Temperature Coefficient DAC Register
______________________________________________________________________________________
100
Low-Cost Precision Sensor
Signal Conditioner
MAX1452
Table 3. Configuration Register (CONFIG[15:0])
FIELD
NAME
DESCRIPTION
15:13
OSC[2:0]
12
REXT
11
CLK1M EN
10
PGA Sign
Logic ‘1’ inverts INM and INP polarity.
9
IRO Sign
Logic ‘1’ for positive input referred offset (IRO). Logic ‘0’ for negative input referred offset (IRO).
8:6
IRO[2:0]
Input referred coarse offset adjustment.
5:2
PGA[3:0]
Programmable gain amplifier setting.
1
ODAC Sign
0
OTCDAC
Sign
Oscillator frequency setting. Factory preset, do not change.
Logic ‘1’ selects external RISRC and RSTC.
Logic ‘1’ enables CLK1M output driver.
Logic ‘1’ for positive offset DAC output. Logic ‘0’ for negative offset DAC output.
Logic ‘1’ for positive offset TC DAC output. Logic ‘0’ for negative offset TC DAC output.
Table 4. Input Referred Offset (IRO[2:0])
IRO SIGN, IRO[2:0]
INPUT REFERRED OFFSET
CORRECTION AS % OF VDD
INPUT REFERRED OFFSET, CORRECTION
AT VDD = 5VDC IN mV
1,111
+1.25
+63
1,110
+1.08
+54
1,101
+0.90
+45
1,100
+0.72
+36
1,011
+0.54
+27
1,010
+0.36
+18
1,001
+0.18
+9
1,000
0
0
0,000
0
0
0,001
-0.18
-9
0,010
-0.36
-18
0,011
-0.54
-27
0,100
-0.72
-36
0,101
-0.90
-45
0,110
-1.08
-54
0,111
-1.25
-63
______________________________________________________________________________________
17
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Table 5. PGA Gain Setting (PGA[3:0])
PGA[3:0]
PGA GAIN (V/V)
0000
39
0001
52
0010
65
0011
78
0100
91
0101
104
0110
117
0111
130
1000
143
1001
Table 6. Temp-Index Typical Values
TEMP-INDEX[7:0]
TEMPERATURE
(°C)
DECIMAL
HEXADECIMAL
-40
20
14
25
65
41
85
106
6A
125
134
86
Table 7. Oscillator Frequency Setting
OSC[2:0]
OSCILLATOR FREQUENCY
100
-37.5%
156
101
-28.1%
1010
169
110
-18.8%
1011
182
1100
1101
111
-9.4%
000
1MHz (nominal)
195
001
+9.4%
208
010
+18.8%
011
+28.1%
1110
221
1111
234
Table 8. EEPROM ODAC and FSODAC Lookup Table Memory Map
18
TEMP-INDEX[7:0]
EEPROM ADDRESS ODAC
LOW BYTE AND HIGH BYTE
EEPROM ADDRESS FSODAC
LOW BYTE AND HIGH BYTE
00hex
to
7Fhex
000hex and 001hex
to
0FEhex and 0FFhex
200hex and 201hex
to
2FEhex and 2FFhex
80hex
to
AFhex
100hex and 101hex
to
15Ehex and 15Fhex
1A0hex and 1A1hex
to
1FEhex and 1FFhex
______________________________________________________________________________________
Low-Cost Precision Sensor
Signal Conditioner
FIELD
NAME
DESCRIPTION
15:8
CL[15:8]
Reserved
7:0
CL[7:0]
Control Location. Secure-Lock is activated by setting this to FFhex which disables DIO serial
communications and connects OUT to PGA output.
Table 10. IRSA Decoding
IRSA[3:0]
DESCRIPTION
0000
Write IRSD[3:0] to DHR[3:0] (data hold register)
0001
Write IRSD[3:0] to DHR[7:4] (data hold register)
0010
Write IRSD[3:0] to DHR[11:8] (data hold register)
0011
Write IRSD[3:0] to DHR[15:12] (data hold register)
0100
Reserved
0101
Reserved
0110
Write IRSD[3:0] to ICRA[3:0] or IEEA[3:0], (internal calibration register address or internal EEPROM address
nibble 0)
0111
Write IRSD[3:0] to IEEA[7:4] (internal EEPROM address, nibble 1)
1000
Write IRSD[3:0] to IRSP[3:0] or IEEA[9:8], (interface register set pointer where IRSP[1:0] is IEEA[9:8])
1001
Write IRSD[3:0] to CRIL[3:0] (command register to internal logic)
1010
Write IRSD[3:0] to ATIM[3:0] (analog timeout value on read)
1011
Write IRSD[3:0] to ALOC[3:0] (analog location)
1100 to 1110
1111
Reserved
Write IRSD[3:0] = 1111bin to relearn the baud rate
______________________________________________________________________________________
19
MAX1452
Table 9. Control Location (CL[15:0])
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Table 11. CRIL Command Codes
CRIL[3:0]
NAME
DESCRIPTION
0000
LdICR
Load internal calibration register at address given in ICRA with data from DHR[15:0].
0001
EEPW
EEPROM write of 8 data bits from DHR[7:0] to address location pointed by IEEA [9:0].
0010
ERASE
Erase all of EEPROM (all bytes equal FFhex).
0011
RdICR
Read internal calibration register as pointed to by ICRA and load data into DHR[15:0].
0100
RdEEP
Read internal EEPROM location and load data into DHR[7:0] pointed by IEEA [9:0].
0101
RdIRS
Read interface register set pointer IRSP[3:0]. See Table 13.
0110
RdAlg
Output the multiplexed analog signal onto OUT. The analog location is specified in ALOC[3:0]
(Table 15) and the duration (in byte times) that the signal is asserted onto the pin is specified in
ATIM[3:0] (Table 14).
0111
PageErase
1000 to
1111
Reserved
Erases the page of the EEPROM as pointed by IEEA[9:6]. There are 64 bytes per page and thus 12
pages in the EEPROM.
Reserved.
Table 12. IRCA Decode
ICRA[3:0]
NAME
0000
CONFIG
0001
ODAC
0010
OTCDAC
Offset Temperature Coefficient DAC Register
0011
FSODAC
Full Scale Output DAC Register
0100
FSOTCDAC
0101
0110 to
1111
20
DESCRIPTION
Configuration Register
Offset DAC Register
Full Scale Output Temperature Coefficient DAC Register
Reserved. Do not write to this location (EEPROM test).
Reserved. Do not write to this location.
______________________________________________________________________________________
Low-Cost Precision Sensor
Signal Conditioner
MAX1452
Table 13. IRSP Decode
IRSP[3:0]
RETURNED VALUE
0000
DHR[7:0]
0001
DHR[15:8]
0010
IEEA[7:4], ICRA[3:0] concatenated
0011
CRIL[3:0], IRSP[3:0] concatenated
0100
ALOC[3:0], ATIM[3:0] concatenated
0101
IEEA[7:0] EEPROM address byte
0110
IEED[7:0] EEPROM data byte
0111
TEMP-Index[7:0]
1000
BitClock[7:0]
1001
Reserved. Internal flash test data.
1010-1111
11001010 (CAhex). This can be used to test communication.
Table 14. ATIM Definition
ATIM[3:0]
DURATION OF ANALOG SIGNAL SPECIFIED IN BYTE TIMES (8-BIT TIME)
0
0000
2 + 1 = 2 byte times i.e. (2 ✕ 8)/baud rate
0001
21 + 1 = 3 byte times
0010
22 + 1 = 5 byte times
0011
23 + 1 = 9 byte times
0100
24 + 1 = 17 byte times
0101
25 + 1 = 33 byte times
0110
26 + 1 = 65 byte times
0111
27 + 1 = 129 byte times
1000
28 + 1 = 257 byte times
1001
29 + 1 = 513 byte times
1010
210 + 1 = 1025 byte times
1011
211 + 1 = 2049 byte times
1100
212 + 1 = 4097 byte times
1101
213 + 1 = 8193 byte times
1110
214 + 1 = 16,385 byte times
1111
In this mode OUT is continuous, however DIO accepts commands after 32,769 byte times. Do not parallel
connect DIO to OUT.
______________________________________________________________________________________
21
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
Table 15. ALOC Definition
ALOC[3:0]
ANALOG SIGNAL
DESCRIPTION
0000
OUT
PGA Output
0001
BDR
Bridge Drive
0010
ISRC
Bridge Drive Current Setting
0011
VDD
Internal Positive Supply
0100
VSS
Internal Ground
0101
BIAS5U
0110
AGND
0111
FSODAC
1000
FSOTCDAC
1001
ODAC
1010
OTCDAC
1011
VREF
1100
VPTATP
Internal Test Node
1101
VPTATM
Internal Test Node
1110
INP
Sensor’s Positive Input
1111
INM
Sensor’s Negative Input
Internal Test Node
Internal Analog Ground. Approximately half of VDD.
Full Scale Output DAC
Full Scale Output TC DAC
Offset DAC
Offset TC DAC
Bandgap Reference Voltage (nominally 1.25V)
Table 16. Effects of Compensation
TYPICAL UNCOMPENSATED INPUT (SENSOR)
TYPICAL COMPENSATED TRANSDUCER OUTPUT
Offset…………………..…….…………………………..±100%FSO
FSO…………………………….………………………..4 to 60mV/V
Offset TC…………………………………………………...20% FSO
Offset TC Nonlinearity…..………………………………….4% FSO
FSOTC…………………………..………………………..-20% FSO
FSOTC Nonlinearity…..……..…………………………….5% FSO
Temperature Range..….….……………………..-40°C to +125°C
OUT..…….……………………………..Ratiometric to VDD at 5.0V
Offset at +25°C……………………………………0.500V ± 200μV
FSO at +25°C……………………………………...4.000V ± 200μV
Offset accuracy over temp. range….………±4mV (±0.1% FSO)
FSO accuracy over temp. range……………±4mV (±0.1% FSO)
22
______________________________________________________________________________________
Low-Cost Precision Sensor
Signal Conditioner
EEPROM
(LOOKUP PLUS CONFIGURATION DATA)
VDD
EEPROM ADDRESS
000H + 001H
VDD
:
16-BIT
FSO
DAC
ISRC
15EH + 15FH
160H + 161H
162H + 163H
164H + 165H
166H + 167H
VSS
VDD
16-BIT
RISRC
75kΩ
OFFSET
DAC
RSTC
75kΩ
168H + 169H
16AH + 16BH
16CH + 16DH
:
VSS
BDR
BANDGAP
TEMP
SENSOR
PHASE
REVERSAL
MUX
VSS
VSS
TEST
CONTROL LOCATION REGISTER
USER STORAGE (52 BYTES)
CLK1M
VDDF
FSO DAC LOOKUP TABLE
(176 ✕ 16-BITS)
8-BIT
LOOKUP
ADDRESS
ΣΔ
FSOTC
DAC
INP
OFFSET TC REGISTER SHADOW
RESERVED
FSOTC REGISTER SHADOW
2FEH + 2FFH
VDD
±1
VDD
19EH + 19FH
1A0H + 1A1H
16-BIT
CONFIGURATION REGISTER SHADOW
RESERVED
:
VSS
FSOTC
USAGE
OFFSET DAC LOOKUP TABLE
(176 ✕ 16-BITS)
UNLOCK
DIGITAL
INTERFACE
VSS
DIO
FSOTC REGISTER
PGA BANDWIDTH ≈
3kHz ± 10%
Σ
MUX
✕ 26
Σ
PGA
MUX
OUT
INM
VSS
INPUT REFERRED OFFSET
(COARSE OFFSET)
IRO (3, 2:0)
OFFSET mV
1,111
1,110
1,101
1,100
63
54
45
36
1,011
1,010
27
18
1,001
1,000
0,000
0,001
0,010
0,011
0,100
9
0
0
-9
-18
-27
-36
0,101
0,110
-45
-54
0,111
-63
AMPPROGRAMMABLE GAIN STAGE
±1
16-BIT
OFFSET
TC DAC
OTC REGISTER
*INPUT REFERRED
OFFSET VALUE IS
PROPORTIONAL TO VDD.
VALUES GIVEN ARE FOR
VDD = 5V.
VSS
PGA (3:0)
PGA GAIN
TOTAL GAIN
0000
0001
0010
0011
0100
0101
0110
1.5
2.0
2.5
3.0
3.5
39
52
65
78
91
4.0
4.5
104
117
0111
1000
5.0
5.5
6.0
6.5
7.0
7.5
8.0
130
143
156
169
182
195
208
8.5
9.0
221
234
1001
1010
1011
1100
1101
1110
1111
AMPOUT
AMP+
UNCOMMITTED OP AMP
PARAMETER
VALUE
I/P RANGE
I/P OFFSET
O/P RANGE
NO LOAD
1mA LOAD
VSS TO VDD
±20mV
VSS, VDD ±0.01V
VSS, VDD ±0.25V
UNITY GBW
10MHz TYPICAL
PGA BANDWIDTH ≈ 3kHz ± 10%
______________________________________________________________________________________
23
MAX1452
Detailed Block Diagram
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
INM
4
15
CLK1M
BDR
5
14
DIO
VDDF
INP
6
13
N.C.
SSOP/TSSOP
MAX1452
7
8
9
10
11
TQFN
Package Information
Chip Information
SUBSTRATE CONNECTED TO: VSS
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE
24
12
UNLOCK
9
AMP+
N.C.
VDDF
TEST 8
N.C.
16
TEST
10 UNLOCK
FSOTC
3
+
N.C.
VDD 7
19
VSS
13 AMPOUT
11 DIO
20
AMPOUT
OUT
12 CLK1M
21
17
14 AMP-
INP 6
22
2
VSS 3
BDR 5
23
AMP-
15 AMP+
MAX1452
24
1
18
ISRC
OUT 2
INM 4
N.C.
16 FSOTC
N.C.
+
VDD
ISRC 1
N.C.
TOP VIEW
N.C.
Pin Configurations
PACKAGE CODE
DOCUMENT NO.
16 SSOP
A16-2
21-0056
16 TSSOP
U16-2
21-0066
24 TQFN-EP
T2444-4
21-0188
______________________________________________________________________________________
Low-Cost Precision Sensor
Signal Conditioner
REVISION
NUMBER
2
REVISION
DATE
4/09
DESCRIPTION
Added TQFN and TSSOP package information, changed packages to lead free,
changed all occurrences of ASIC to MAX1452, changed VDDF RC filter values,
recommended a more suitable voltage reference for non-ratiometric application
circuits, corrected MAX1452 input range, and added typical EEPROM current
requirements to EC table, and added gain nonlinearity graph.
PAGES
CHANGED
1–7, 9, 10, 12,
18, 22, 24
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 25
© 2009 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
MAX1452
Revision History
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