ams AS1916 Microprocessor supervisory circuits with manual reset and watchdog Datasheet

a u s t ri a m i c r o s y s t e m s
AS1916 - AS1918
D a ta S h e e t
M i c r o p r o c e s s o r S u p e r v i s o r y C i r c u i ts w i t h M a n u a l
R e s e t a n d Wa t c h d o g
1 General Description
2 Key Features
The AS1916 - AS1918 microprocessor supervisory circuits were designed to generate a reset when the monitored supply voltage falls below a factory-trimmed
threshold. The reset remains asserted for a minimum
timeout period after the supply voltage stabilizes.
!
VCC Supervisory Range: +1.8 to +3.6V
!
Guaranteed Reset Valid Down to VCC = +1.0V
!
Reset Timeout Delay: 215ms
Guaranteed to be in the correct state for VCC higher than
+1.0V, these devices are ideal for portable and batterypowered systems with strict monitoring requirements.
!
Manual Reset Input
The devices feature factory-trimmed thresholds to monitor a supply voltage between 1.8 and 3.6V.
!
Three Reset Output Types
- Active-Low Push/Pull (AS1916)
- Active-High Push/Pull (AS1917)
- Active-Low Open-Drain (AS1918)
!
Watchdog Timeout Period: 1.5s
!
Immune to Fast Negative VCC Transients
!
External Components Not Required
!
5-pin SOT23 Package
The devices are available with the reset output types
listed in Table 1.
Table 1. Standard Products
Model
Reset Output Type
AS1916
Active-Low Push/Pull
AS1917
Active-High Push/Pull
AS1918
Active-Low Open-Drain
The AS1916 - AS1918 include a manual-reset input for
systems that never fully power down the microprocessor.
3 Applications
Additionally, these devices feature a watchdog timer to
help ensure that the processor is operating within proper
code boundaries.
The devices are ideal for portable and battery-powered
systems, embedded controllers, intelligent instruments,
automotive systems, and critical CPU monitoring applications.
The AS1916 - AS1918 are available in a 5-pin SOT23
package.
Figure 1. Typical Application Diagram
I/O Supply
VCC
5
1
VCC
RESETN
RESETN
AS1916/
AS1918
CPU
3
External
Reset
4
MRN
WDI
GND
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I/O
GND
2
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Data Sheet
4 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 3 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Min
Max
Units
VCC to GND
-0.3
+5.0
V
Open-Drain RESETN
-0.3
+7.0
V
Push/Pull RESET, RESETN
-0.3
VCC +
0.3
V
MRN, WDI to GND
-0.3
VCC +
0.3
V
Input Current (VCC)
20
mA
Output Current (RESET, RESETN)
20
mA
Continuous Power Dissipation
(TAMB = +70ºC)
696
mW
-40
+125
ºC
+150
ºC
-65
+150
ºC
Operating Temperature Range
Junction Temperature
Storage Temperature Range
Package Body Temperature
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+260
ºC
Revision 0.52
Comments
Derate 8.7mW/ºC above +70ºC
The reflow peak soldering temperature (body
temperature) specified is in accordance with
IPC/JEDEC J-STD-020C “Moisture/Reflow
Sensitivity Classification for Non-Hermetic Solid
State Surface Mount Devices”.
The lead finish for Pb-free leaded packages is
matte tin (100% Sn).
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Data Sheet
5 Electrical Characteristics
VCC = +2.7 to +3.6V for AS19xx-T/S/R, VCC = +2.1 to +2.75V for AS19xx- Z/Y, VCC = +1.53 to +2.0V for AS19xx-W/V;
TAMB = -40 to +125ºC (unless otherwise specified). Typ values @ TAMB = +25°C.
Table 3. Electrical Characteristics
Symbol
Parameter
1
VCC
Operating Voltage Range
ICC
VCC Supply Current
(MRN and WDI Not Connected)
Conditions
Min
TAMB = 0 to +85ºC
1.0
3.6
TAMB = -40 to +125ºC
1.2
3.6
VCC = +3.6V, No Load,
TAMB = -40ºC to +85ºC
TAMB = -40 to +125ºC
TAMB = -40 to +85ºC
TAMB = -40 to +125ºC
TAMB = -40 to +85ºC
TAMB = -40 to +125ºC
VCC Reset Threshold
(VCC Falling)
TAMB = -40 to +85ºC
TAMB = -40 to +125ºC
TAMB = -40 to +85ºC
TAMB = -40 to +125ºC
TAMB = -40 to +85ºC
TAMB = -40 to +125ºC
TAMB = -40 to +85ºC
TAMB = -40 to +125ºC
AS19xx-R
AS19xx-Z
AS19xx-Y
AS19xx-W
AS19xx-V
V
12
µA
19
2.994
3.08
2.972
2.848
3.179
2.93
2.827
2.556
2.19
V
2.243
2.260
1.67
1.612
1.536
2.376
2.394
2.113
1.623
2.693
2.714
2.32
2.239
2.129
3.000
3.024
2.63
2.538
2.255
3.154
1.710
1.723
1.58
1.525
1.618
1.631
ppm/
ºC
Reset Threshold Hysteresis
8x
VTH
mV
55
µs
tRP
Reset Timeout Period
ILKG
AS19xx-S
Units
60
VCC to Reset
Output Delay
VOH
AS19xx-T
Max
Reset Threshold
Temperature Coefficient
tRD
VOL
5.5
VCC = +3.6V, No Load,
TAMB = -40 to +125ºC
TAMB = -40 to +85ºC
VTH
Typ
RESETN Output Low
(Push/Pull or Open-Drain)
RESETN Output High
(Push/Pull Only)
Open-Drain RESETN Output
Leakage Current
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VCC = VTH to (VTH - 100mV)
TAMB = -40 to +85ºC
140
TAMB = -40 to +125ºC
100
215
280
320
VCC ≥ 1.0V, ISINK = 50µA,
Reset Asserted, TAMB = 0 to +85ºC
0.3
VCC ≥ 1.2V, ISINK = 100µA, Reset
Asserted
0.3
VCC ≥ 2.55V, ISINK = 1.2mA,
Reset Asserted
0.3
VCC ≥ 3.3V, ISINK = 3.2mA,
Reset Asserted
0.4
V
VCC ≥ 1.8V, ISOURCE = 200µA,
Reset Not Asserted
0.8 x
VCC
VCC ≥ 3.15V, ISOURCE = 500µA,
Reset Not Asserted
0.8 x
VCC
VCC ≥ 3.3V, ISOURCE = 800µA,
Reset Not Asserted
0.8 x
VCC
V
RESETN Not Asserted
1.0
TAMB = +25ºC
0.2
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ms
µA
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Data Sheet
Table 3. Electrical Characteristics (Continued)
Symbol
Parameter
1
RESET Output High
(Push/Pull Only)
VOH
RESET Output Low
(Push/Pull Only)
VOL
Conditions
Min
VCC ≥ 1.0V, ISOURCE = 1µA,
Reset Asserted, TAMB = 0 to +85ºC
0.8 x
VCC
VCC ≥ 1.50V, ISOURCE = 100µA,
Reset Asserted
0.8 x
VCC
VCC ≥ 2.55V, ISOURCE = 500µA,
Reset Asserted
0.8 x
VCC
VCC ≥ 3.3V, ISOURCE = 800µA,
Reset Asserted
0.8 x
VCC
Typ
Max
Units
V
VCC ≥ 1.8V, ISINK = 500µA,
Reset Asserted
0.3
VCC ≥ 3.15V, ISINK = 1.2mA,
Reset Asserted
0.3
VCC ≥ 3.3V, ISINK = 3.2mA,
Reset Asserted
0.4
V
Manual Reset Input
0.3 x
VCC
VIL
MRN Input voltage
0.7 x
VCC
VIH
MRN Minimum Input Pulse
1
MRN Transient Rejection
µs
90
MRN to Reset Delay
ns
130
MRN Pullup Resistance
V
ns
25
50
75
TAMB = -40 to +85ºC
1.12
1.5
2.4
TAMB = -40 to +125ºC
0.80
kΩ
Watchdog Input
tWD
tWDI
Watchdog Timeout Period
WDI Pulse Width
2
2.60
20
ns
0.3 x
VCC
VIL
WDI Input Voltage
0.7 x
VCC
VIH
IWDI
WDI Input Current
WDI = VCC, Time Average
WDI = 0, Time Average
80
-20
s
-11
160
V
µA
1. Over-temperature limits are guaranteed by design and not production tested. Devices tested at +25ºC.
2. Guaranteed by design and not production tested.
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Data Sheet
6 Typical Operating Characteristics
TAMB = +25ºC (unless otherwise specified).
Figure 2. Normalized Reset Threshold Delay vs.
Temperature
Figure 3. VOUT vs. VCC, VTH = 1.58V,
Active-Low (Typ)
1.04
Output Voltage (V)e
Reset Threshold (V) e
1.06
1.02
1
0.98
0.96
0.94
-40 -20
0
20
40
60
80
5.50
5.00
4.50
4.00
3.50
3.00
2.50
2.00
1.50
1.00
0.50
0.00
-0.50
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
100 120
VCC (V)
Temperature (°C)
Figure 4. Reset Timeout Period vs. Temperature
Figure 5. Supply Current vs. Temperature
10
240
VCC Supply Current (µA) e
Reset Timeout Periode (ms)
250
230
220
210
200
190
180
170
160
9
8
7
6
VCC = 1.58V V Version
5
VCC = 3.08V T Version
4
3
150
-40 -20
0
20
40
60
-50
80 100 120
-25
0
25
50
75
100 125
Temperature (°C)
Temperature (°C)
Figure 6. VOH vs. ISOURCE; VCC = 3.2V
Figure 7. VOL vs. ISINK; VCC = 3.2V
0.5
3.25
0.45
3.2
0.35
3.1
0.3
VOUT (V) e
VOUT (V) ]
0.4
3.15
3.05
3
0.25
0.2
0.15
0.1
2.95
0.05
2.9
0
0.2
0.4
0.6
0.8
1
0
1.2
0
ISOURCE (mA)
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1
2
3
4
ISINK (mA)
5
6
7
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Data Sheet
Pin Assignments
7 Pinout
Pin Assignments
Figure 8. Pin Assignments (Top View)
RESETN/RESET 1
GND 2
5 VCC
AS1916 AS1918
MRN 3
4 WDI
Pin Descriptions
Table 4. Pin Descriptions
Pin
Number
1
Pin
Name
Description
Active-Low Reset Output (AS1916, AS1918). The RESETN signal toggles from high to low
when VCC, or MRN is pulled low, or the watchdog triggers a reset. This output signal remains
RESETN
low for the reset timeout period after all supervised voltages exceed their reset threshold, or
MRN goes low to high, or the watchdog triggers a reset.
RESET
Active-High Reset Output (AS1917). The RESET signal toggles from low to high when
VCC, or MRN is pulled low, or the watchdog triggers a reset. This output signal remains high
for the reset timeout period (see tRP on page 3) after all supervised voltages exceed their
reset threshold, or MRN goes low to high, or the watchdog triggers a reset.
GND
Ground
MRN
Active-Low Manual Reset Input. Pulling this pin low asserts a reset. This pin is connected
to the internal 50kΩ pullup to VCC. This reset remains active as long as MRN is low and for
the reset timeout period (see tRP on page 3) after MRN goes high.
Note: If the manual reset feature is not used, this pin should be unconnected or connected
to VCC.
4
WDI
Watchdog Input. If WDI remains high or low for longer than the watchdog timeout period
(see tWD on page 4), the internal watchdog timer period expires and a reset is triggered for
the reset timeout period (see tRP on page 3). The internal watchdog timer clears whenever a
reset is a asserted or when WDI senses a rising or falling edge.
Note: To disable the watchdog feature, this pin must be unconnected or connected to a tristate buffer output.
5
VCC
Supervised Voltage Input. This pin serves as the supervised supply voltage input.
2
3
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Data Sheet
RESET/RESETN
8 Detailed Description
The AS1916 - AS1918 supervisory circuits were designed to generate a reset when the monitored supply voltage falls
below its factory-trimmed trip threshold (see VTH on page 3), and to maintain the reset for a minimum timeout period
(see tRP on page 3) after the supply has stabilized.
The integrated watchdog timer (see Watchdog Input on page 8) helps mitigate against bad programming code or clock
signals, and/or poor peripheral response.
The active-low manual reset input (see Manual Reset Input on page 8) allows for an externally activated system reset.
RESET/RESETN
Whenever the monitored supply voltage falls below its reset threshold, the RESET output asserts low or the RESETN
output asserts high. Once the monitored voltage has stabilized, an internal timer keeps the reset asserted for the reset
timeout period (tRP). After the tRP period, the RESET/RESETN output returns to its original state (see Figure 10).
Figure 9. Functional Diagram of VCC Supervisory Application
5
AS1916 - AS1918
VCC
1
Reset Timeout
Delay Generator
+
–
1.26V
RESETN/
RESET
VCC
3
MRN
4
Watchdog Transition
Detector
WDI
Watchdog
Timer
2
GND
Figure 10. Reset Timing Diagram
VCC
1V
VTH
VTH
1V
RESETN
tRP
tRD
RESET
GND
tRP
tRD
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Data Sheet
Watchdog Input
Watchdog Input
The integrated watchdog feature can be used to monitor processor activity via pin WDI, and can detect pulses as short
as 50ns. The watchdog requires that the processor toggle the watchdog logic input at regular intervals, within a specified minimum timeout period (1.5s, typ). A reset is asserted for the reset timeout period. As long as reset is asserted,
the timer remains cleared and is not incremented. When reset is deasserted, the watchdog timer starts counting
(Figure 11).
Note: The watchdog timer can be cleared with a reset pulse or by toggling WDI.
Figure 11. Watchdog Timing Relationship
VCC
RESETN
tRST
tRP
tWD
tRP
WDI
The RESET signal is the inverse of the RESETN signal.
The watchdog is internally driven low during most (87.5%) of the watchdog timeout period (see tWD on page 4) and
high for the rest of the watchdog timeout period. When pin WDI is left unconnected, this internal driver clears the
watchdog timer every 1.4s. When WDI is tri-stated or is not connected, the maximum allowable leakage current is
10µA and the maximum allowable load capacitance is 200pF.
Note: The watchdog function can be disabled by leaving pin WDI unconnected or connecting it to a tri-state output
buffer.
Manual Reset Input
The active-low pin MRN is used to force a manual reset. This input can be driven by CMOS logic levels or with opendrain collector outputs.
Pulling MRN low asserts a reset which will remain asserted as long as MRN is kept low, and for the timeout period (see
tRP on page 3) after MRN goes high (140ms min). The manual reset circuitry has an internal 50kΩ pullup resistor, thus
it can be left open if not used.
To create a manual-reset circuit, connect a normally open momentary switch from pin MRN to GND (see Figure 1 on
page 1); external debounce circuitry is not required in this configuration.
If MRN is driven via long cables or the device is used in a noisy environment, a 0.1µF capacitor between pin MRN and
GND will provide additional noise immunity.
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Data Sheet
Watchdog Input Current
9 Application Information
Watchdog Input Current
The watchdog input is driven through an internal buffer and an internal series resistor from the watchdog timer (see
Figure 11 on page 8). When pin WDI is left unconnected (watchdog disabled), the watchdog timer is serviced within the
watchdog timeout period (see tWD on page 4) by a low-high-low pulse from the counter chain.
For minimum watchdog input current (minimum overall power consumption), pull WDI low for most of the watchdog
timeout period, pulsing it low-high-low once within the first 7/8 (87.5%) of the watchdog timeout period to reset the
watchdog timer.
Note: If WDI is externally driven high for the majority of the timeout period, up to 160µA can flow into pin WDI.
Interfacing to Bi-Directional CPU Reset Pins
Since the reset output of the AS1918 is open drain, this device interfaces easily with processors that have bi-directional reset pins. Connecting the processor reset output directly to the AS1918 RESETN pin with a single pullup resistor (see Figure 12) allows the AS1918 to assert a reset.
Figure 12. AS1918 RESETN-to-CPU Bi-Directional Reset Pin
VCC
VCC 5
VCC
AS1918
1
CPU
RESETN
RESETN
Reset
Generator
GND
GND
2
Fast Negative-Going Transients
Fast, negative-going VCC transients normally do not require the CPU to be shutdown. The AS1916 - AS1918 are virtually immune to such transients. Resets are issued to the CPU during power-up, powerdown, and brownout conditions.
Note: VCC transients that go 100mV below the reset threshold and last ≤ 55µs typically will not assert a reset pulse.
Valid Reset to VCC = 0
The AS1916 - AS1918 are guaranteed to operate properly down to VCC = 1V.
For AS1916 and AS1917 applications requiring valid reset levels down to VCC = 0, a pulldown resistor to active-low
outputs and a pullup resistor to active-high outputs will ensure that the reset line is valid during the interval where the
reset output can no longer sink or source current.
Watchdog Tips
Careful consideration should be taken when implementing the AS1916 - AS1918 watchdog feature.
One method of supervising software code execution is to set/reset the watchdog input at different places in the code,
rather than pulsing the watchdog input high-low-high or low-high-low. This method avoids a loop condition in which the
watchdog timer would continue to be reset inside the loop, preventing the watchdog from ever timing out.
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Data Sheet
Watchdog Tips
Figure 13 shows a flowchart where the input/output driving the watchdog is set high at the beginning of the routine, set
low at the beginning of every subroutine, then set high again when the routine returns to the beginning. If the routine
should hang in a subroutine, the problem would quickly be corrected, since the I/O is continually set low and the watchdog timer is allowed to time out, causing a reset or interrupt to be issued (see Watchdog Input Current on page 9). This
method results in higher averaged WDI input current over time than a case where WDI is held low for the majority
(87.5%) of the timeout period and periodically pulsing it low-high-low.
Figure 13. Example Watchdog Programming Flowchart
Start
Set WDI
High
Program
Code
Subroutine or
Program Loop
Set WDI Low
Return
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Data Sheet
10 Package Drawings and Markings
The devices are available in an 5-pin SOT23 package.
Figure 14. 5-pin SOT23 Package
Notes:
1. All dimensions in millimeters.
2. Foot length measured at intercept point between datum A and lead
surface.
3. Package outline exclusive of mold flash and metal burr.
4. Package outline inclusive of solder plating.
5. Complies with EIAJ SC74.
6. PKG ST 0003 Rev A supersedes SOT23-D-2005 Rev C.
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Symbol
A
A1
A2
b
C
D
E
E1
L
e
e1
α
Min
Max
0.90
1.45
0.00
0.15
0.90
1.30
0.30
0.50
0.09
0.20
2.80
3.05
2.60
3.00
1.50
1.75
0.30
0.55
0.95 REF
1.90 REF
0º
8º
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Data Sheet
11 Ordering Information
The devices are available as the standard products shown in Table 5.
Table 5. Ordering Information
Model
Marking
Description
Threshold
Delivery Form
Package
AS1916S-T
ASIO
Active-Low Push/Pull Supervisory Circuit
with Watchdog and Manual Reset
2.93V
Tape and Reel
5-pin SOT23
AS1916R-T
ASIP
Active-Low Push/Pull Supervisory Circuit
with Watchdog and Manual Reset
2.63V
Tape and Reel
5-pin SOT23
AS1916Z-T
ASIQ
Active-Low Push/Pull Supervisory Circuit
with Watchdog and Manual Reset
2.32V
Tape and Reel
5-pin SOT23
AS1916V-T
ASIR
Active-Low Push/Pull Supervisory Circuit
with Watchdog and Manual Reset
1.58V
Tape and Reel
5-pin SOT23
AS1917S-T
ASIS
Active High Push/Pull Supervisory Circuit
with Watchdog and Manual Reset
2.93V
Tape and Reel
5-pin SOT23
AS1917R-T
ASIT
Active High Push/Pull Supervisory Circuit
with Watchdog and Manual Reset
2.63V
Tape and Reel
5-pin SOT23
AS1917Z-T
ASIU
Active High Push/Pull Supervisory Circuit
with Watchdog and Manual Reset
2.32V
Tape and Reel
5-pin SOT23
AS1917V-T
ASIV
Active High Push/Pull Supervisory Circuit
with Watchdog and Manual Reset
1.58V
Tape and Reel
5-pin SOT23
AS1918S-T
ASIW
Active-Low Open Drain Supervisory Circuit
with Watchdog and Manual Reset
2.93V
Tape and Reel
5-pin SOT23
AS1918R-T
ASIX
Active-Low Open Drain Supervisory Circuit
with Watchdog and Manual Reset
2.63V
Tape and Reel
5-pin SOT23
AS1918Z-T
ASIY
Active-Low Open Drain Supervisory Circuit
with Watchdog and Manual Reset
2.32V
Tape and Reel
5-pin SOT23
AS1918V-T
ASIZ
Active-Low Open Drain Supervisory Circuit
with Watchdog and Manual Reset
1.58V
Tape and Reel
5-pin SOT23
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Data Sheet
Copyrights
Copyright © 1997-2005, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe.
Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing
in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding
the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior
to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information.
This product is intended for use in normal commercial applications. Applications requiring extended temperature
range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for
each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard
production flow, such as test flow or test location.
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However,
austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to
personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or
consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
Contact Information
Headquarters
austriamicrosystems AG
A-8141 Schloss Premstaetten, Austria
Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
e-mail: [email protected]
For Sales Offices, Distributors and Representatives, please visit:
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