Cypress CY7C198-45LMB 32k x 8 static ram Datasheet

7c198: 10/25/89
Revision: February 29, 1996
CY7C198
Features
Pin Configurations
CerDIP
Top View
I/O1
A2
A3
A4
A5
A6
A7
I/O2
SENSE AMPS
A1
ROW DECODER
A0
1024 x 32 x 8
ARRAY
A8
A 14
1 32 31 30
A13
A 12
NC
V
CC
A7
2
28
VCC
2
27
WE
A7
3
26
A4
A8
A6
A8
25
A3
5
29
4
A5
A9
5
A2
A4
6
28
A9
7
27
A11
A10
6
7
24
23
22
A1
OE
A12
8
21
A0
A13
9
20
CE
A14
10
19
I/O7
I/O0
11
18
I/O6
I/O1
12
17
I/O5
I/O2
13
16
I/O4
14
15
I/O3
GND
I/O3
3
1
A6
A3
A2
A1
A0
NC
I/O0
8
9
26
NC
25
OE
24
A10
11
23
CE
12
22
I/O7
13
21
I/O6
10
14 15 16 17 1819 20
I/O
1
INPUT BUFFER
4
A5
A11
I/O0
LCC
Top View
WE
Logic Block Diagram
I/O
4
I/O
5
D
D
NC
D
I/O
3
D
The CY7C198 is a highĆperformance
CMOS static RAM organized as 32,768
words by8bits.Easymemoryexpansionis
provided by an active LOW chip enable
(CE)andactiveLOWoutputenable(OE)
and threeĆstate drivers. This device has an
automatic powerĆdown feature, reducing
the power consumption by 80% when deĆ
selected. The CY7C198 is available in a
600ĆmilĆwide cerDIP and LCC package
and a 32Ćlead TSOP package.
An active LOW write enable signal (WE)
controls the writing/reading operation of
the memory. When CE and WE inputs
arebothLOW,dataontheeightdatainput/
High speed
Ċ 15 ns
CMOS for optimum speed/power
Low active power
Ċ 990 mW
Low standby power
Ċ 195 mW
Easy memory expansion with CE and
OE features
TTLĆcompatible inputs and outputs
Automatic powerĆdown when
deselected
output pins (I/O0 through I/O7) is written
intothememorylocationaddressedbythe
address present on the address pins (A0
through A14). Reading the device is acĆ
complishedbyselectingthedeviceandenĆ
abling the outputs, CE and OE active
LOW, while WE remains inactive or
HIGH. Under these conditions, the conĆ
tents of the location addressed by the inĆ
formationonaddresspinsispresentonthe
eight data input/output pins.
Theinput/outputpinsremaininahighĆimĆ
pedance state unless the chip is selected,
outputs are enabled, and write enable
(WE) is HIGH.
A die coat is used to ensure alpha immunity.
GND
D
D
Functional Description
I/O
2
D
32K x 8 Static RAM
C198Ć1
C198Ć3
I/O4
A9
I/O5
CE
WE
I/O6
POWER
COLUMN
DOWN
DECODER
I/O7
A 13
A 14
A 12
A 11
A 10
OE
C198Ć2
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA) Commercial
Military
Maximum Standby Current (mA)
Shaded area contains preliminary information.
Cypress Semiconductor Corporation
D
7C198-15 7C198-20 7C198-25 7C198-35 7C198-45
15
20
150
170
30
180
30
3901 North First Street
1
D
San Jose
25
35
45
150
30
150
25
150
25
D CA 95134 D 408-943-2600
February 1988 - Revised February 1996
7c198: 10/25/89
Revision: February 29, 1996
CY7C198
Pin Configurations (continued)
TSOP
Top View
OE
1
32
A0
A1
2
21
CE
A2
3
30
I/O7
A3
4
29
I/O6
A4
5
28
I/O5
WE
6
27
I/O4
VCC
7
26
I/O3
NC
8
25
NC
NC
9
24
NC
A5
10
23
GND
A6
11
22
I/O2
A7
12
21
I/O1
A8
13
20
I/O0
A9
14
19
A14
A10
15
18
A13
A11
16
17
A12
C198Ć4
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines,
not tested.)
Static Discharge Voltage . . . . . . . . . . . . . . . . . . . . . . . . >2001V
(per MILĆSTDĆ883, Method 3015)
Storage Temperature . . . . . . . . . . . . . . . . . . . -65_C to +150_C
LatchĆUp Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . >200 mA
Ambient Temperature with
Power Applied . . . . . . . . . . . . . . . . . . . . . . . . -55_C to +125_C
Operating Range
Supply Voltage to Ground Potential
(Pin 28 to Pin 14) . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State[15] . . . . . . . . . . . . . . . . . . -0.5V to VCC + 0.5V
DC Input
Voltage[15]
Ambient
Temperature
VCC
Commercial
0_C to +70_C
5V ± 10%
Military[16]
-55_C to +125_C
5V ± 10%
Range
. . . . . . . . . . . . . . . . -0.5V to VCC + 0.5V
Output Current into Outputs (LOW) . . . . . . . . . . . . . . . 20 mA
Notes:
15. VIL (min.) = -2.0V for pulse durations less than 20 ns.
16. TA is the instant on" case temperature.
2
7c198: 10/25/89
Revision: February 29, 1996
CY7C198
Electrical Characteristics Over the Operating Range
[17]
7C198-15
Parameter
VOH
VOL
VIH
Description
Test Conditions
Output HIGH
VCC = Min.,
Voltage
IOH = -4.0 mA
Output LOW
VCC = Min.,
Voltage
IOL = 8.0 mA
Min.
Max.
2.4
2.2
VCC
Max.
2.4
2.2
VCC
Min.
Max.
2.4
0.4
Unit
V
0.4
V
2.2
VCC
2.2
VCC
V
+0.3V
-0.5
0.8
-0.5
0.8
-0.5
0.8
-0.5
0.8
V
GND < VI < VCC
-5
+5
-5
+5
-5
+5
-5
+5
mA
-5
+5
-5
+5
-5
+5
-5
+5
mA
-300
mA
Input Load Current
IOZ
Output Leakage
GND < VO < VCC,
Current
Output Disabled
Output Short
Circuit Current
VCC = Max.,
[18]
-300
-300
-300
VOUT = GND
VCC Operating
VCC = Max.,
Supply Current
IOUT = 0
Com'l
mA
150
mA
mA,
f = fMAX = 1/tRC
ISB1
Min.
7C198-35, 45
[15]
IIX
ICC
7C198-25
0.4
+0.3V
Input LOW
IOS
Max.
2.4
Voltage
Voltage
Min.
0.4
Input HIGH
VIL
7C198-20
Mil
Automatic CE
Max. VCC, CE > VIH,
PowerĆDown
VIN > VIH
CurrentĊ TTL
or VIN < VIL, f = fMAX
180
170
150
150
30
30
30
25
mA
15
15
15
15
mA
Inputs
ISB2
Automatic CE
Max. VCC,
PowerĆDown
CE > VCC - 0.3V
CurrentĊ CMOS
VIN > VCC - 0.3V or
Inputs
VIN < 0.3V, f = 0
Shaded area contains preliminary information
[19]
Capacitance
Parameter
CIN
COUT
Description
Input Capacitance
Output Capacitance
Test Conditions
TA = 25
_C, f = 1 MHz,
VCC = 5.0V
5 0V
Max.
Unit
10
pF
10
pF
Notes:
17.
19.
See the last page of this specification for Group A subgroup testing inĆ
18.
Tested initially and after any design or process changes that may affect
these parameters.
formation.
Not more than one output should be shorted at one time. Duration of
the short circuit should not exceed 30 seconds.
3
7c198: 10/25/89
Revision: February 29, 1996
CY7C198
AC Test Loads and Waveforms[20]
R1 481W
5V
OUTPUT
5V
OUTPUT
R1 481W
3.0V
R2
R2
5 pF
30 pF
255W
255W
INCLUDING
INCLUDING
JIG AND
JIG AND
C198Ć5
SCOPE (b)
SCOPE (a)
Equivalent to:
THÉVENIN EQUIVALENT
167W
OUTPUT
1.73V
Switching Characteristics Over the Operating Range[17, 21]
7C198-15
Parameter
Description
Min.
tRC
tAA
tOHA
tACE
tDOE
tLZOE
tHZOE
tLZCE
tHZCE
tPU
tPD
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z[22]
OE HIGH to High Z[22, 23]
CE LOW to Low Z[22]
CE HIGH to High Z[22, 23]
CE LOW to PowerĆUp
CE HIGH to PowerĆDown
15
tWC
tSCE
tAW
tHA
tSA
tPWE
tSD
tHD
tHZWE
tLZWE
Write Cycle Time
CE LOW to Write End
Address SetĆUp to Write End
Address Hold from Write End
Address SetĆUp to Write Start
WE Pulse Width
Data SetĆUp to Write End
Data Hold from Write End
WE LOW to High Z[23]
WE HIGH to Low Z[22]
15
10
10
0
0
9
9
0
GND
Min.
< tr
< fr
C198Ć6
7C198-20
Max.
10%
ALL INPUT PULSES
90%
90%
10%
Max.
7C198-25
Min.
Max.
7C198-35
Min.
Max.
7C198-45
Min.
Max.
Unit
READ CYCLE
3
0
3
0
WRITE CYCLE[24, 25]
Shaded area contains preliminary information.
3
20
15
3
15
7
0
7
3
7
0
15
20
15
15
0
0
15
10
0
7
3
20 tr 3 ns for the 15Ćns and 20Ćns speeds, tr 5 ns for the 20Ćns and
slower speeds.
21. Test conditions assume signal transition time of 3 ns or less for the
12Ćns and15Ćns speeds and 5 ns for the 20Ćns andslowerspeeds,timing
referencelevelsof1.5V,inputpulselevelsof0to3.0V,andoutputloadĆ
ing of the specified IOL/IOH and 30ĆpF load capacitance.
22. At any given temperature and voltage condition, tHZCE is less than
tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any
given device.
Notes:
20
20
9
9
9
20
10
25
3
3
3
0
25
20
20
0
0
20
15
0
3
25
25
10
11
11
20
11
35
3
3
3
0
35
22
30
0
0
22
15
0
3
35
35
16
15
15
20
15
45
3
3
3
0
45
22
40
0
0
22
15
0
3
45
45
16
15
15
25
15
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
23. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in part (b)
of AC Test Loads. Transition is measured ±500 mV from steadyĆstate
voltage.
24. The internal write time of the memory is defined by the overlap of CE
LOW and WE LOW. Both signals must be LOW to initiate a write and
either signal can terminate a write by going HIGH. The data input setĆ
upandholdtimingshouldbereferencedtotherisingedgeofthesignal
that terminates the write.
25. The minimum write cycle time for write cycle #3 (WE controlled, OE
LOW) is the sum of tHZWE and tSD.
4
7c198: 10/25/89
Revision: February 29, 1996
CY7C198
Switching Waveforms
Read Cycle No. 1[26, 27]
tRC
ADDRESS
DATA OUT
tOHA
PREVIOUS DATA VALID
tAA
DATA VALID
C198Ć7
Read Cycle No. 2[27, 28]
tRC
CE
tACE
OE
tHZOE
tHZCE
tDOE
DATA OUT
VCC
SUPPLY
CURRENT
tLZOE
HIGH IMPEDANCE
tLZCE
tPU
50%
HIGH
IMPEDANCE
DATA VALID
tPD
50%
ICC
ISB
C198Ć8
Write Cycle No. 1 (WE Controlled)[24, 29, 30]
tWC
ADDRESS
CE
WE
tSA
tAW
tPWE
tHA
OE
tSD
DATAIN VALID
DATA I/O
tHZOE
tHD
C198Ć9
Notes:
26.
Device is continuously selected. OE, CE = VIL.
29.
Data I/O is high impedance if OE = VIH.
27.
WE is HIGH for read cycle.
30.
If CE goes HIGH simultaneously with WE HIGH, the output remains
28.
Address valid prior to or coincident with CE transition LOW.
in a highĆimpedance state.
5
7c198: 10/25/89
Revision: February 29, 1996
CY7C198
Switching Waveforms (continued)
Write Cycle No. 2 (CE Controlled)[24, 29, 30]
tWC
ADDRESS
tSCE
CE
tSA
tAW
tHA
WE
tSD
DATA I/O
tHD
DATAIN VALID
C198Ć10
Write Cycle No. 3 (WE Controlled, OE LOW)[25, 30]
tWC
ADDRESS
CE
tAW
tHA
tSA
WE
tSD
DATA I/O
tHD
DATAIN VALID
tLZWE
tHZWE
C198Ć11
6
7c198: 10/25/89
Revision: February 29, 1996
CY7C198
Typical DC and AC Characteristics
NORMALIZED SUPPLY CURRENT
vs. SUPPLY VOLTAGE
vs. AMBIENT TEMPERATURE
SB
1.4
1.2
NORMALIZED I CC, I
ICC
0.8
0.6
VIN = 5.0V
TA = 25_C
0.4
0.2
0.8
0.6
VCC = 5.0V
0.4
VIN = 5.0V
0.2
ISB
0.0
4.0
1.0
4.5
5.0
5.5
ISB
0.0
-55
6.0
NORMALIZED ACCESS TIME
NORMALIZED ACCESS TIME
vs. SUPPLY VOLTAGE
vs. AMBIENT TEMPERATURE
1.4
1.6
1.3
1.4
NORMALIZED tAA
NORMALIZED tAA
125
1.2
1.1
TA = 25_C
1.0
0.9
4.5
5.0
5.5
80
VCC = 5.0V
60
TA = 25_C
40
20
0
0.0
1.0
VCC = 5.0V
140
120
100
80
60
VCC = 5.0V
TA = 25_C
40
20
25
0.0
125
2.5
25.0
(ns)
30.0
AA
DELTA t
1.0
0.5
1.0
2.0
3.0
4.0
OUTPUT VOLTAGE (V)
NORMALIZED ICC vs. CYCLE TIME
vs. OUTPUT LOADING
3.0
1.5
4.0
TYPICAL ACCESS TIME CHANGE
vs. SUPPLY VOLTAGE
2.0
3.0
OUTPUT VOLTAGE (V)
AMBIENT TEMPERATURE (_C)
TYPICAL POWERĆON CURRENT
2.0
0
0.6
-55
6.0
1.0
vs. OUTPUT VOLTAGE
1.2
SUPPLY VOLTAGE (V)
1.25
20.0
15.0
VCC = 4.5V
10.0
TA = 25_C
VCC = 5.0V
1.00
TA = 25_C
VIN = 0.5V
0.75
5.0
0.0
0.0
100
OUTPUT SINK CURRENT
0.8
0.8
4.0
vs. OUTPUT VOLTAGE
120
AMBIENT TEMPERATURE (_C)
SUPPLY VOLTAGE (V)
NORMALIZED I PO
25
OUTPUT SINK CURRENT (mA)
1.0
ICC
1.2
NORMALIZED I CC
NORMALIZED I CC, I
SB
1.4
OUTPUT SOURCE CURRENT
OUTPUT SOURCE CURRENT (mA)
NORMALIZED SUPPLY CURRENT
1.0
2.0
3.0
4.0
SUPPLY VOLTAGE (V)
5.0
0.0
0
200
400
600
800
CAPACITANCE (pF)
7
1000
0.50
10
20
30
CYCLE FREQUENCY (MHz)
40
7c198: 10/25/89
Revision: February 29, 1996
CY7C198
Truth Table
CE
WE
OE
H
L
L
L
X
H
L
H
X
L
X
H
Inputs/Outputs
High Z
Data Out
Data In
High Z
Mode
Power
Deselect/PowerĆDown
Read
Write
Deselect, Output Disabled
Standby (ISB)
Active (ICC)
Active (ICC)
Active (ICC)
Ordering Information
Speed
(ns)
15
20
25
35
45
Ordering Code
CY7C198-15LMB
CY7C198-20ZC
CY7C198-20LMB
CY7C198-25DMB
CY7C198-25LMB
CY7C198-35DMB
CY7C198-35LMB
CY7C198-45DMB
CY7C198-45LMB
Package
Name
L55
Z32
L55
D16
L55
D16
L55
D16
L55
Shaded area contains preliminary information.
Package Type
32ĆPinRectangularLeadless Chip Carrier
32ĆLead Thin Small Outline Package
32ĆPinRectangularLeadless Chip Carrier
28ĆLead (600ĆMil) CerDIP
32ĆPinRectangularLeadless Chip Carrier
28ĆLead (600ĆMil) CerDIP
32ĆPinRectangularLeadless Chip Carrier
28ĆLead (600ĆMil) CerDIP
32ĆPinRectangularLeadless Chip Carrier
Operating
Range
Military
Commercial
Military
Military
Military
Military
MILITARY SPECIFICATIONS
Group A Subgroup Testing
DC Characteristics
Parameter
Subgroups
VOH
VOL
VIH
VIL Max.
IIX
IOZ
ICC
ISB1
ISB2
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
Switching Characteristics
Parameter
Subgroups
READ CYCLE
tRC
tAA
tOHA
tACE
tDOE
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
WRITE CYCLE
tWC
tSCE
tAW
tHA
tSA
tPWE
tSD
tHD
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
Document #: 38-00077-L
8
7c198: 10/25/89
Revision: February 29, 1996
CY7C198
Package Diagrams
28ĆLead (600ĆMil) CerDIP D16
32ĆPin Rectangular Leadless Chip Carrier L55
MIL-STD-1835 D-10 Config. A
MIL-STD-1835 C-12
32ĆLead Thin Small Outline Package Z32
E
Cypress Semiconductor Corporation, 1996. The information contained herein is subject to change without notice.
Cypress Semiconductor Corporatio n assumes no responsibility for
the use of any circuitry other than circuitry embodied in a Cypress Semiconductor Corporation product. Nor does it convey or imply any license under pa tent or other rights. Cypress SemiconĆ
9
ductor does not authorize its products for use as critical components in life support systems where a malfunction or failure of the product may reasona bly be expected to result in significant
injury to the user. The inclusion of Cypress Semiconductor products in life support systems applications implies that the manufacturer assumes all r isk of such use and in so doing indemnifies
Cypress Semiconductor against all damages.
Similar pages