FAIRCHILD FSTU16861

Revised May 2001
FSTU16861
20-Bit Bus Switch with −2V Undershoot Protection
General Description
Features
The Fairchild Switch FSTU16861 provides 20-Bits of highspeed CMOS TTL-compatible bus switching. The low On
Resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise.
■ Undershoot hardened to −2V (A and B Ports)
The device is organized as a 10-bit or 20-Bit bus switch.
When OE1 is LOW, the switch is ON and Port 1A is connected to Port 1B. When OE2 is LOW, Port 2A is connected
to Port 2B. When OEX is HIGH, a high impedance state
exists between the A and B Ports. The A and B Ports are
protected against undershoot to support an extended
range to 2.0V below ground. Fairchild’s integrated Undershoot Hardened Circuit (UHC) senses undershoot at the
I/O and responds by preventing voltage differentials from
developing and turning the switch on. When OE is HIGH,
the switch is OPEN and a high-impedance state exists
between the two ports.
■ Zero bounce in flow-through mode
■ 4Ω switch connection between two ports
■ Minimal propagation delay through the switch
■ Low lCC
■ Control inputs compatible with TTL level
■ See Application Note AN-5008 for details
Ordering Code:
Order Number
FSTU16861MTD
Package Number
Package Description
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
UHC is a trademark of Fairchild Semiconductor Corporation.
© 2001 Fairchild Semiconductor Corporation
DS500422
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FSTU16861 20-Bit Bus Switch with −2V Undershoot Protection
May 2001
FSTU16861
Connection Diagram
Logic Diagram
Pin Descriptions
Truth Table
Pin Name
Description
OE1, OE2
Bus Switch Enables
OE1
Inputs
OE2
1A, 1B
Inputs/Outputs
2A, 2B
1An, 2An
Bus A
L
L
1A = 1B
2A = 2B
1Bn, 2Bn
Bus B
L
H
1A = 1B
Z
H
L
Z
2A = 2B
H
H
Z
Z
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
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Recommended Operating
Conditions (Note 4)
Supply Voltage (VCC)
−0.5V to +7.0V
DC Switch Voltage (VS) (Note 2)
−2.0V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN) (Note 3)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN < 0V
−50 mA
Output Voltage (VOUT)
DC Output Current (IOUT)
128 mA
Input Rise and Fall Time (tr, tf)
±100 mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0 ns/V to 5 ns/V
Switch I/O
0 ns/V to DC
-40 °C to +85 °C
Free Air Operating Temperature (TA)
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: VS is the voltage observed/applied at either the A or B Ports across
the switch.
Note 3: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 4: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
TA = −40 °C to +85 °C
VCC
Symbol
Parameter
(V)
Min
Typ
(Note 5)
Max
−1.2
Units
Conditions
IIN = −18 mA
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.0–5.5
VIL
LOW Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
0 ≤ VIN ≤ 5.5V
0
10
µA
VIN = 5.5V
±1.0
µA
0 ≤ A, B ≤ VCC
7
Ω
VIN = 0V, IIN = 64 mA
VIN = 0V, IIN = 30 mA
4.5
IOZ
OFF-STATE Leakage Current
5.5
RON
Switch On Resistance
4.5
(Note 6)
2.0
V
V
4
4.5
4
7
Ω
4.5
8
14
Ω
VIN = 2.4V, IIN = 15 mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15 mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND, IOUT = 0
∆ ICC
Increase in ICC per Input
5.5
2.5
mA
One Input at 3.4V
VIKU
Voltage Undershoot
5.5
−2.0
V
Other Inputs at VCC or GND
0.0 mA ≥ IIN ≥ −50 mA
OE = 5.5V
Note 5: Typical values are at VCC = 5.0V and TA = +25°C
Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
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FSTU16861
Absolute Maximum Ratings(Note 1)
FSTU16861
AC Electrical Characteristics
TA = −40 °C to +85 °C,
Symbol
CL = 50pF, RU = RD = 500Ω
Parameter
VCC = 4.5 – 5.5V
Min
tPHL, tPLH
Propagation Delay Bus-to-Bus
(Note 7)
tPZH, tPZL
Output Enable Time
VCC = 4.0V
Max
1.0
Min
Units
Figure
Conditions
Number
Max
0.25
0.25
ns
5.9
6.4
ns
VI = OPEN
Figures
2, 3
VI = 7V for tPZL
Figures
2, 3
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time
1.0
6.9
7.4
VI = 7V for tPLZ
ns
Figures
2, 3
VI = OPEN for tPHZ
Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 8)
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
3
pF
VCC = 5.0V, VIN = 0V
CI/O
Input/Output Capacitance “OFF State”
6
pF
VCC, OE = 5.0V, VIN = 0V
Note 8: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
Undershoot Characteristic (Note 9)
Symbol
VOUTU
Parameter
Output Voltage During Undershoot
Min
Typ
2.5
VOH - 0.3
Max
Units
Conditions
V
Figure 1
Note 9: This test is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage
undershoot event.
FIGURE 1.
Device Test Conditions
Parameter
Value
VIN
see Waveform
V
R1 = R2
100K
Ω
VTRI
11.0
V
VCC
5.5
V
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Transient
Input Voltage (VIN) Waveform
Units
4
FSTU16861
AC Loading and Waveforms
Note: Input driven by 50Ω source terminated in 50Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 2. AC Test Circuit
FIGURE 3. AC Waveforms
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FSTU16861 20-Bit Bus Switch with −2V Undershoot Protection
Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384(FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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