Renesas BB506C Built in biasing circuit mos fet ic Datasheet

Preliminary Datasheet
BB506C
R07DS0288EJ0200
(Previous: REJ03G1246-0100)
Rev.2.00
Mar 28, 2011
Built in Biasing Circuit MOS FET IC
UHF RF Amplifier
Features
 Built in Biasing Circuit; To reduce using parts cost & PC board space.
 High gain
PG = 24 dB typ. (f = 900 MHz)
 Low noise
NF = 1.4 dB typ. (f = 900 MHz)
 Low output capacitance
Coss = 1.1 pF typ. (f = 1 MHz)
 Provide mini mold packages: CMPAK-4 (SOT-343mod)
Outline
RENESAS Package code: PTSP0004ZA-A
(Package name: CMPAK-4)
2
1. Source
2. Gate1
3. Gate2
4. Drain
3
1
4
Notes:
1. Marking is “FS-“.
2. BB506C is individual type number of RENESAS BBFET.
Absolute Maximum Ratings
(Ta = 25C)
Item
Drain to source voltage
Gate1 to source voltage
Symbol
VDS
VG1S
Gate2 to source voltage
VG2S
Drain current
Channel power dissipation
Channel temperature
Storage temperature
ID
PchNote3
Tch
Tstg
Ratings
6
+6
–0
+6
–0
30
250
150
–55 to +150
Unit
V
V
V
mA
mW
C
C
Notes: 3. Value on the glass epoxy board (50 mm  40 mm  1 mm).
R07DS0288EJ0200 Rev.2.00
Mar 28, 2011
Page 1 of 8
BB506C
Preliminary
Electrical Characteristics
(Ta = 25C)
Item
Drain to source breakdown
voltage
Gate1 to source breakdown
voltage
Gate2 to source breakdown
voltage
Gate1 to source cutoff
current
Gate2 to source cutoff
current
Gate1 to source cutoff
voltage
Gate2 to source cutoff
voltage
Drain current
Symbol
V(BR)DSS
Min
6
Typ
—
Max
—
Unit
V
Test Conditions
ID = 200 A, VG1S = VG2S = 0
V(BR)G1SS
+6
—
—
V
IG1 = +10 A, VG2S = VDS = 0
V(BR)G2SS
+6
—
—
V
IG2 = +10 A, VG1S = VDS = 0
IG1SS
—
—
+100
nA
VG1S = +5 V, VG2S = VDS = 0
IG2SS
—
—
+100
nA
VG2S = +5 V, VG1S = VDS = 0
VG1S(off)
0.5
0.8
1.1
V
VDS = 5 V, VG2S = 4 V, ID = 100 A
VG2S(off)
0.4
0.7
1.0
V
VDS = 5 V, VG1S = 5 V, ID = 100 A
ID(op)
12
16
20
mA
|yfs|
27
32
38
mS
Input capacitance
Ciss
1.2
1.6
2.0
pF
Output capacitance
Coss
0.7
1.1
1.5
pF
Power gain
PG
19
24
29
dB
Noise figure
NF
—
1.4
2.1
dB
Forward transfer admittance
VDS = 5 V, VG1 = 5 V, VG2S = 4 V
RG = 100 k
VDS = 5 V, VG1 = 5 V, VG2S = 4 V
RG = 100 k, f = 1 kHz
VDS = 5 V, VG1 = 5 V, VG2S = 4 V
RG = 100 k f = 1 MHz
VDS = 5 V, VG1 = 5V, VG2S = 4 V
RG = 100 k f = 900 MHz
Bias Circuit for Operating Items (ID(op), |yfs|, Ciss, Coss, NF, PG)
VG2
RG
Gate 2
Drain
A
ID
R07DS0288EJ0200 Rev.2.00
Mar 28, 2011
VG1
Gate 1
Source
Page 2 of 8
BB506C
Preliminary
900 MHz Power Gain, Noise Figure Test Circuit
VD
VG1 VG2
C6
C4
C5
R1
R2
C3
R3
RFC
Output (50 Ω)
D
G2
L3
Input (50 Ω)
L4
G1
S
L1
L2
C1
C1, C2
C3
C4 to C6
R1
R2
R3
C2
:
:
:
:
:
:
Variable Capacitor (10 pF MAX)
Disk Capacitor (1000 pF)
Air Capacitor (1000 pF)
100 kΩ
47 kΩ
4.7 kΩ
L2:
L1:
10
3
3
8
10
26
(φ1 mm Copper wire)
Unit : mm
21
L4:
L3:
18
10
10
7
7
29
RFC : f1 mm Copper wire with enamel 4 turns inside dia 6 mm
R07DS0288EJ0200 Rev.2.00
Mar 28, 2011
Page 3 of 8
BB506C
Preliminary
Main Characteristics
Typical Output Characteristics
400
ID (mA)
25
300
Drain Current
Channel Power Dissipation Pch* (mW)
Maximum Channel Power Dissipation Curve
200
100
68 kΩ
VG2S = 4 V
VDS = VG1
20
82 kΩ
100 kΩ
15
120 kΩ
10
150 kΩ
5
80
RG
0
50
100
150
0
0
200
1
2
=1
3
kΩ
4
5
Drain to Source Voltage VDS (V)
Ambient Temperature Ta (°C)
* Value on the glass epoxy board (50 mm × 40 mm × 1 mm)
Forward Transfer Admittance
vs. Gate1 Voltage
Drain Current
ID (mA)
25
VDS = 5 V
VG2S = 4 V
RG = 100 kΩ
20
4V
15
3V
10
2V
5
VG2S = 1 V
0
0
1
2
3
4
5
Forward Transfer Admittance
|yfs| (mS)
Drain Current vs. Gate1 Voltage
VDS = 5 V
VG2S =4 V
RG = 100 kΩ
f = 1 kHz
40
4V
30
3V
20
10 V
G2S = 0
2V
1V
0
0
1
2
3
4
Gate1 Voltage VG1 (V)
Gate1 Voltage VG1 (V)
Drain Current vs. Gate Resistance
Input Capacitance vs.
Gate2 to Source Voltage
5
Input Capacitance Ciss (pF)
25
Drain Current ID (mA)
50
20
15
10
5
VDS = VG1 = 5 V
VG2S = 4 V
0
10
5
VDS = 5 V
VG1 = 5 V
RG = 100 kΩ
f = 1 MHz
4
3
2
1
0
100
Gate Resistance RG (kΩ)
R07DS0288EJ0200 Rev.2.00
Mar 28, 2011
1000
0
1
2
3
4
Gate2 to Source Voltage VG2S (V)
Page 4 of 8
BB506C
Preliminary
Power Gain vs. Gate Resistance
Noise Figure vs. Gate Resistance
5
40
NF (dB)
VDS = 5 V
VG1 = 5 V
VG2S = 4 V
f = 900 MHz
30
Noise Figure
Power Gain PG (dB)
50
20
10
VDS = 5 V
VG1 = 5 V
VG2S = 4 V
f = 900 MHz
4
3
2
1
0
0
10
100
10
1000
Gate Resistance RG (kΩ)
25
Noise Figure vs.
Gate2 to Source Voltage
5
NF (dB)
20
15
Noise Figure
Power Gain PG (dB)
1000
Gate Resistance RG (kΩ)
Power Gain vs.
Gate2 to Source Voltage
10
VDS = 5 V
VG1 =5 V
RG = 100 kΩ
f = 900 MHz
5
100
0
VDS = 5 V
VG1 = 5 V
RG = 100 kΩ
f = 900 MHz
4
3
2
1
0
1
2
3
4
Gate2 to Source Voltage VG2S (V)
1
2
3
4
Gate2 to Source Voltage
VG2S (V)
Gain Reduction vs.
Gate2 to Source Voltage
Gain Reduction GR (dB)
40
VDS = 5 V
VG1 = 5 V
RG = 100 kΩ
f = 900 MHz
35
30
25
20
15
10
5
0
0
1
2
3
4
Gate2 to Source Voltage VG2S (V)
R07DS0288EJ0200 Rev.2.00
Mar 28, 2011
Page 5 of 8
BB506C
Preliminary
S11 Parameter vs. Frequency
.8
S21 Parameter vs. Frequency
1
Scale: 5 / div.
90°
1.5
.6
60°
120°
2
.4
3
30°
150°
4
5
.2
10
.2
0
.4
.6 .8 1
1.5 2
3 45
180°
0°
–10
–5
–4
–3
–.2
–30°
–150°
–.4
–2
–.6
–.8
–120°
–1.5
–60°
–1
–90°
Test condition: VDS = 5 V, VG1 = 5 V,
VGS2 = 4 V, RG = 100 kΩ
0.05 to 1.05 GHz (0.05 GHz step)
Test condition: VDS = 5 V, VG1 = 5 V,
VGS2 = 4 V, RG = 100 kΩ
0.05 to 1.05 GHz (0.05 GHz step)
S12 Parameter vs. Frequency
90°
S22 Parameter vs. Frequency
Scale: 0.05 / div.
.8
1
1.5
.6
60°
120°
2
.4
3
30°
150°
4
5
.2
10
180°
0°
.2
0
.4
.6 .8 1
1.5 2
3 45
–10
–5
–4
–3
–.2
–30°
–150°
–.4
–2
–120°
–60°
–90°
Test condition: VDS = 5 V, VG1 = 5 V,
VGS2 = 4 V, RG = 100 kΩ
0.05 to 1.05 GHz (0.05 GHz step)
R07DS0288EJ0200 Rev.2.00
Mar 28, 2011
–.6
–.8
–1.5
–1
Test condition: VDS = 5 V, VG1 = 5 V,
VGS2 = 4 V, RG = 100 kΩ
0.05 to 1.05 GHz (0.05 GHz step)
Page 6 of 8
BB506C
Preliminary
S parameter
(VDS = 5 V, VG1 = 5 V, VG2S = 4 V, RG = 100 k, Zo = 50 )
Freq
(MHz)
S11
S21
S12
S22
50
100
150
200
250
300
350
400
450
500
550
600
650
700
750
800
Mag
0.995
0.991
0.992
0.987
0.984
0.981
0.975
0.967
0.964
0.958
0.951
0.939
0.933
0.922
0.916
0.900
Deg
-3.3
-6.2
-9.3
-12.4
-15.5
-18.6
-21.7
-24.8
-27.9
-30.8
-33.9
-37.0
-40.3
-43.5
-46.5
-49.6
Mag
3.28
3.26
3.28
3.26
3.27
3.24
3.23
3.24
3.22
3.22
3.22
3.20
3.20
3.20
3.19
3.19
Deg
177.9
175.5
173.7
171.3
170.0
167.3
165.8
163.3
161.9
159.4
157.9
155.4
154.1
150.7
150.7
146.7
Mag
0.001
0.001
0.002
0.002
0.004
0.003
0.004
0.004
0.004
0.006
0.006
0.004
0.004
0.007
0.007
0.006
Deg
17.6
75.6
73.8
79.5
116.5
89.6
76.3
87.0
91.9
89.0
100.4
84.2
85.4
80.4
93.5
108.8
Mag
0.991
0.996
0.995
0.997
0.995
0.993
0.992
0.989
0.991
0.987
0.988
0.985
0.984
0.983
0.981
0.979
Deg
-1.8
-3.6
-5.2
-7.0
-8.6
-10.3
-11.8
-13.9
-15.5
-17.0
-18.9
-20.4
-22.2
-23.7
-25.5
-27.2
850
900
950
1000
0.892
0.883
0.866
0.858
-52.8
-56.2
-59.2
-62.0
3.18
3.18
3.17
3.16
146.4
142.8
142.3
139.8
0.005
0.005
0.006
0.006
122.9
120.3
104.0
121.3
0.978
0.975
0.970
0.970
-28.9
-30.6
-32.3
-33.8
R07DS0288EJ0200 Rev.2.00
Mar 28, 2011
Page 7 of 8
BB506C
Preliminary
Package Dimensions
Package Name
CMPAK-4
JEITA Package Code
SC-82AB
RENESAS Code
PTSP0004ZA-A
D
Previous Code
CMPAK-4(T) / CMPAK-4(T)V
MASS[Typ.]
0.006g
A
e2
e
Q
b1
c
B
B
E
HE
LP
L
A
A
x M
L1
S
Reference
Symbol
A3
b
A
e2
A2
A
l1
A1
y S
b5
S
b
e
e1
b1
l1
c
c
A-A Section
b4
B-B Section
Pattern of terminal position areas
A
A1
A2
A3
b
b1
c
D
E
e
e2
HE
L
L1
LP
x
y
b4
b5
e1
l1
Q
Dimension in Millimeters
Min
0.8
0
0.8
0.25
0.35
0.1
1.8
1.15
1.8
0.3
0.1
0.2
Nom
0.9
0.25
0.3
0.4
0.16
2.0
1.25
0.65
0.6
2.1
Max
1.1
0.1
1.0
0.4
0.5
0.26
2.2
1.35
2.4
0.7
0.5
0.6
0.05
0.05
0.45
0.55
1.5
0.9
0.2
Ordering Information
Orderable Part Number
BB506CFS-TL-E
BB506CFS-TL-H
Note:
Quantity
3000
Shipping Container
 178 mm Reel, 8 mm Emboss Taping
For some grades, production may be terminated. Please contact the Renesas sales office to check the state of
production before ordering the product.
R07DS0288EJ0200 Rev.2.00
Mar 28, 2011
Page 8 of 8
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Colophon 1.1