Filtronic FPD3000SOT89 Low noise, high linearity packaged phemt Datasheet

FPD3000SOT89
LOW NOISE, HIGH LINEARITY PACKAGED PHEMT
•
PERFORMANCE (1850 MHz)
♦ 30 dBm Output Power (P1dB)
♦ 13 dB Small-Signal Gain (SSG)
♦ 1.3 dB Noise Figure
♦ 45 dBm Output IP3
♦ 45% Power-Added Efficiency
♦ Evaluation Boards Available
♦ Available in Lead Free Finish: FPD3000SOT89E
•
DESCRIPTION AND APPLICATIONS
The FPD3000SOT89 is a packaged depletion mode AlGaAs/InGaAs pseudomorphic High Electron
Mobility Transistor (pHEMT). It utilizes a 0.25 x 3000 µm Schottky barrier Gate, defined by highresolution stepper-based photolithography. The recessed and offset Gate structure minimizes
parasitics to optimize performance, with an epitaxial structure designed for improved linearity over a
range of bias conditions and input power levels. The FPD3000 is available in die form and in other
packages.
Typical applications include drivers or output stages in PCS/Cellular base station high-interceptpoint LNAs, WLL and WLAN systems, and other types of wireless infrastructure systems.
•
ELECTRICAL SPECIFICATIONS AT 22°C
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
RF SPECIFICATIONS MEASURED AT f = 1850 MHz USING CW SIGNAL
Power at 1dB Gain Compression
P1dB
VDS = 5 V; IDS = 50% IDSS
29.5
30
dBm
Small-Signal Gain
SSG
VDS = 5 V; IDS = 50% IDSS
11.5
13
dB
Power-Added Efficiency
PAE
VDS = 5 V; IDS = 50% IDSS;
POUT = P1dB
45
%
Noise Figure
NF
VDS = 5 V; IDS = 50% IDSS
1.3
dB
VDS = 5 V; IDS = 25% IDSS
0.9
Output Third-Order Intercept Point
IP3
(from 15 to 5 dB below P1dB)
VDS = 5V; IDS = 50% IDSS
Matched for optimal power
42
Matched for best IP3
45
Saturated Drain-Source Current
IDSS
VDS = 1.3 V; VGS = 0 V
Maximum Drain-Source Current
IMAX
VDS = 1.3 V; VGS ≅ +1 V
1.5
A
Transconductance
GM
VDS = 1.3 V; VGS = 0 V
800
mS
Gate-Source Leakage Current
IGSO
VGS = -5 V
2
20
µA
Pinch-Off Voltage
|VP|
VDS = 1.3 V; IDS = 3 mA
0.7
1.0
1.3
V
Gate-Source Breakdown Voltage
|VBDGS|
IGS = 3 mA
12
16
V
Gate-Drain Breakdown Voltage
|VBDGD|
IGD = 3 mA
12
16
V
Phone: +1 408 850-5790
Fax: +1 408 850-5766
http:// www.filtronic.co.uk/semis
750
930
dBm
1100
mA
Revised: 01/05/05
Email: [email protected]
FPD3000SOT89
LOW NOISE, HIGH LINEARITY PACKAGED PHEMT
•
ABSOLUTE MAXIMUM RATINGS1
Parameter
Symbol
Test Conditions
Drain-Source Voltage
VDS
Gate-Source Voltage
Max
Units
-3V < VGS < +0V
8
V
VGS
0V < VDS < +8V
-3
V
Drain-Source Current
IDS
For VDS > 2V
IDSS
mA
Gate Current
IG
Forward or reverse current
30
mA
PIN
Under any acceptable bias state
600
mW
Channel Operating Temperature
TCH
Under any acceptable bias state
175
ºC
Storage Temperature
TSTG
Non-Operating Storage
150
ºC
Total Power Dissipation
PTOT
See De-Rating Note below
3.5
W
Comp.
Under any bias conditions
5
dB
2 or more Max. Limits
80
%
RF Input Power
2
Gain Compression
3
Simultaneous Combination of Limits
Min
-40
1
2
TAmbient = 22°C unless otherwise noted
Max. RF Input Limit must be further limited if input VSWR > 2.5:1
Users should avoid exceeding 80% of 2 or more Limits simultaneously
3
Notes:
• Operating conditions that exceed the Absolute Maximum Ratings will result in permanent damage to the device.
• Total Power Dissipation defined as: PTOT ≡ (PDC + PIN) – POUT, where:
PDC: DC Bias Power
PIN: RF Input Power
POUT: RF Output Power
• Total Power Dissipation to be de-rated as follows above 22°C:
PTOT= 3.5W – (0.025W/°C) x TPACK
where TPACK = source tab lead temperature above 22°C
(coefficient of de-rating formula is the Thermal Conductivity)
Example: For a 65°C source lead temperature: PTOT = 3.5W – (0.025 x (65 – 22)) = 2.43W
•
HANDLING PRECAUTIONS
To avoid damage to the devices care should be exercised during handling. Proper Electrostatic
Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and
testing. These devices should be treated as Class 1A per ESD-STM5.1-1998, Human Body Model.
Further information on ESD control measures can be found in MIL-STD-1686 and MIL-HDBK-263.
•
APPLICATIONS NOTES & DESIGN DATA
Applications Notes are available from your local Filtronic Sales Representative or directly from the
factory. Complete design data, including S-parameters, noise data, and large-signal models are
available on the Filtronic web site. Evaluation Boards available upon request.
Phone: +1 408 850-5790
Fax: +1 408 850-5766
http:// www.filtronic.co.uk/semis
Revised: 01/05/05
Email: [email protected]
FPD3000SOT89
LOW NOISE, HIGH LINEARITY PACKAGED PHEMT
•
BIASING GUIDELINES
¾ Active bias circuits provide good performance stabilization over variations of operating
temperature, but require a larger number of components compared to self-bias or dual-biased.
Such circuits should include provisions to ensure that Gate bias is applied before Drain bias,
otherwise the pHEMT may be induced to self-oscillate. Contact your Sales Representative for
additional information.
¾ Dual-bias circuits are relatively simple to implement, but will require a regulated negative
voltage supply for depletion-mode devices such as the FPD3000SOT89.
¾ Self-biased circuits employ an RF-bypassed Source resistor to provide the negative Gate-Source
bias voltage, and such circuits provide some temperature stabilization for the device. A nominal
value for circuit development is 1.2 Ω for a 50% of IDSS operating point.
¾ For standard Class A operation, a 50% of IDSS bias point is recommended. A small amount of
RF gain expansion prior to the onset of compression is normal for this operating point. Note that
pHEMTs, since they are “quasi- E/D mode” devices, exhibit Class AB traits when operated at
50% of IDSS. To achieve a larger separation between P1dB and IP3, an operating point in the 25%
to 33% of IDSS range is suggested. Such Class AB operation will not degrade the IP3
performance.
•
PACKAGE OUTLINE
(dimensions in mm)
All information and specifications subject to change without notice.
Phone: +1 408 850-5790
Fax: +1 408 850-5766
http:// www.filtronic.co.uk/semis
Revised: 01/05/05
Email: [email protected]
FPD3000SOT89
LOW NOISE, HIGH LINEARITY PACKAGED PHEMT
•
TYPICAL TUNED RF PERFORMANCE
Power Transfer Characteristic
3.25
32.0
31.0
Pout (dBm)
2.75
Comp Point
2.25
29.0
1.75
28.0
1.25
27.0
0.75
26.0
Gain Compression, (dB)
Output Power (dBm)
30.0
0.25
25.0
-0.25
24.0
23.0
11.0
13.0
15.0
17.0
19.0
-0.75
23.0
21.0
Input Power (dBm)
45%
45%
40%
40%
35%
35%
30%
30%
25%
25%
20%
20%
PAE
Eff.
15%
15%
10%
10%
5%
5%
0%
Drain Efficiency (%)
PAE (%)
Drain Efficiency and PAE
0%
12.0
13.0
14.0
15.0
16.0
17.0
18.0
19.0
20.0
21.0
22.0
Input Power (dBm)
Typical power and efficiency is shown above. The devices were biased nominally at VDS = 5V, IDS
= 50% of IDSS, at a test frequency of 1.85 GHz. The test devices were tuned (input and output
tuning) for maximum output power at 1dB gain compression.
Phone: +1 408 850-5790
Fax: +1 408 850-5766
http:// www.filtronic.co.uk/semis
Revised: 01/05/05
Email: [email protected]
FPD3000SOT89
LOW NOISE, HIGH LINEARITY PACKAGED PHEMT
Typical Intermodulation performance
VDS = 5V, IDS = 50% IDSS at f = 1.85GHz
-40.00
21
-42.00
3rds (dBc)
-44.00
Output Power (dBm)
19
-46.00
-48.00
17
-50.00
-52.00
15
-54.00
3rd Order IM Products (dBc)
Pout (dBm)
-56.00
13
-58.00
11
-60.00
0.7
1.7
2.8
3.8
4.7
5.7
6.8
7.8
8.8
9.8
Inout Power (dBm)
Note: pHEMT devices exhibit non-classical intermodulation performance, with equivalent IP3
values exceeding 14 dB above P1dB. This IMD enhancement is affected by the quiescent bias
current, the Drain-Source voltage, and the tuning or matching applied to the device.
Maximum Stable Gain & S21
FPD3000SOT89 5V / 50%IDSS
35
MSG
30
MSG
20
Mag S21
&
S21
25
15
10
5
0
0.5
Phone: +1 408 850-5790
Fax: +1 408 850-5766
1.5
2.5
3.5
4.5
5.5
Frequency (GHz)
http:// www.filtronic.co.uk/semis
6.5
7.5
8
Revised: 01/05/05
Email: [email protected]
FPD3000SOT89
LOW NOISE, HIGH LINEARITY PACKAGED PHEMT
•
TYPICAL OUTPUT PLANE POWER CONTOURS (VDS = 5V, IDS = 50% IDSS)
0.
6
Swp Max
143
1.
0
0.
8
2.
0
0.
3.
4.
24dBm
25dBm
26dBm
0.
0.
2
0
27dBm
0.
4
28dBm
0.
6
5.
10.
0. 1.
8
0
2.
0
10
.0
3. 4. 5.
0 0 0
29dBm
-
30dBm
-
-
0.
0.
6
2.
0.
Swp Min
1
1.
Swp Max
131
1.
0
0.
8
2.
0
0.4
0.2
3.0
4.0
24dBm
25dBm
26dBm
27dBm
28dBm
0.
0.
229dBm
4
0
0.
6
0.
8
1.
0
5.0
10.0
2.
0
3. 4. 5.
0
0 0
10
.0
30dBm
-10.0
-0.2
-5.0
-4.0
-3.0
-0.4
0.
6
Phone: +1 408 850-5790
Fax: +1 408 850-5766
0.
8
1850 MHz
Contours swept with a constant input
power, set so that nominal P1dB is
achieved at the point of optimum
output match.
Input (Source plane) Γs:
0.70 ∠ -165.5º
0.17 - j0.12 (normalized)
8.5 – j6.0 Ω
Nominal IP3 performance is
obtained with this input plane
match, and the output plane match
as shown.
900 MHz
Contours swept with a constant input
power, set so that nominal P1dB is
achieved at the point of optimum
output match.
Input (Source plane) Γs:
0.78 ∠ -147.4º
0.13 - j0.29 (normalized)
6.5 – j14.5 Ω
Nominal
IP3
performance
is
obtained with this input plane match,
and the output plane match as
shown.
2.
0
1.
0
Swp Min
1
http:// www.filtronic.co.uk/semis
Revised: 01/05/05
Email: [email protected]
FPD3000SOT89
LOW NOISE, HIGH LINEARITY PACKAGED PHEMT
•
TYPICAL SCATTERING PARAMETERS (50Ω SYSTEM)
See Website “More Info” for S-parameter design files.
FPD3000SOT89 5V / 50%IDSS
0.
6
0.
8
5 GHz
Swp Max
8GHz
1.
0
6 GHz
7 GHz
2.
0
4 GHz
0.4
3.5 GHz
3 GHz
3.0
4.0
5.0
2.50.2GHz
10.0
2 GHz
0.
2
0
1.5 GHz
0.
4
0.
6
0.
8
1.
0
2.
0
10
.0
4. 5.
0 0
3.
0
-10.0
1 GHz
-0.2
-5.0
-4.0
-3.0
-0.4
0.
6
S11
2.
0
0.
8
1.
0
Swp Min
0.5GHz
FPD3000SOT89 5V / 50%IDSS
2.
0
6
0.
0.8
1.0
Swp Max
8GHz
0.
4
5 GHz
6 GHz
7 GHz
3.
0
4 GHz
0
4.
5.0
3 GHz
10.0
0.2
10.0
5.0
4.0
3.0
2.0
1.0
0.8
0.6
0
0.2
1 GHz
0.4
2 GHz
-10.0
2
-5.
0
-0.
-4
.0
0
Phone: +1 408 850-5790
Fax: +1 408 850-5766
-2
-1.0
-0.8
S22
-0
.6
.0
-3
.
.4
-0
Swp Min
0.5GHz
http:// www.filtronic.co.uk/semis
Revised: 01/05/05
Email: [email protected]
FPD3000SOT89
LOW NOISE, HIGH LINEARITY PACKAGED PHEMT
•
TYPICAL I-V CHARACTERISTICS
DC IV Curves FPD3000SOT89
1.2
Drain-Source Voltage (A)
1.0
0.8
VG=-1.50V
VG=-1.25V
VG=-1.00V
VG=-0.75V
VG=-0.50V
VG=-0.25V
VG=0V
0.6
0.4
0.2
0.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Drain-Source Voltage (V)
Note: The recommended method for measuring IDSS, or any particular IDS, is to set the Drain-Source
voltage (VDS) at 1.3V. This measurement point avoids the onset of spurious self-oscillation which
would normally distort the current measurement (this effect has been filtered from the I-V curves
presented above). Setting the VDS > 1.3V will generally cause errors in the current measurements,
even in stabilized circuits.
Recommendation: Traditionally a device’s IDSS rating (IDS at VGS = 0V) was used as a predictor of
RF power, and for MESFETs there is a correlation between IDSS and P1dB (power at 1dB gain
compression). For pHEMTs it can be shown that there is no meaningful statistical correlation
between IDSS and P1dB; specifically a linear regression analysis shows r2 < 0.7, and the regression
fails the F-statistic test. IDSS is sometimes useful as a guide to circuit tuning, since the S22 does vary
with the quiescent operating point IDS.
Phone: +1 408 850-5790
Fax: +1 408 850-5766
http:// www.filtronic.co.uk/semis
Revised: 01/05/05
Email: [email protected]
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