ISSI IS62U6416LL-20BI 64k x 16 low voltage, ultra-low power cmos static ram Datasheet

ISSI®
ISSI
IS62U6416LL
IS62U6416LL
64K x 16 LOW VOLTAGE,
ULTRA-LOW POWER CMOS STATIC RAM
®
ADVANCE INFORMATION
DECEMBER 1998
1
FEATURES
DESCRIPTION
• Access time: 200 ns
• CMOS low power operation
– 40 mW (typical) operating
– 90 µW (typical) standby
• TTL compatible interface levels
• Single 1.8V-2.7V power supply
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Available in Jedec Std 44-pin SOJ package,
44-pin TSOP (Type II), and 48-pin mini BGA
The ISSI IS62U6416LL is an ultra-low power, 1,048,576-bit
static RAM organized as 65,536 words by 16 bits. It is
fabricated using ISSI's high-performance CMOS technology.
This highly reliable process coupled with innovative circuit
design techniques yields access times as fast as 200 ns with
low power consumption.
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down
with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE and OE. The active LOW Write
Enable (WE) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
2
3
4
5
6
FUNCTIONAL BLOCK DIAGRAM
7
A0-A15
DECODER
64K x 16
MEMORY ARRAY
8
VCC
9
GND
I/O0-I/O7
Lower Byte
I/O
DATA
CIRCUIT
I/O8-I/O15
Upper Byte
10
COLUMN I/O
11
CE
OE
WE
CONTROL
CIRCUIT
12
UB
LB
The specification contains ADVANCE INFORMATION. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible
product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1998, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
1
ISSI
IS62U6416LL
®
PIN CONFIGURATIONS
44-Pin SOJ
44-Pin TSOP
A4
1
44
A5
A3
2
43
A6
A2
3
42
A7
A1
4
41
OE
A0
5
40
UB
CE
6
39
LB
I/O0
7
38
I/O15
I/O1
8
37
I/O14
I/O2
9
36
I/O13
I/O3
10
35
I/O12
Vcc
11
34
GND
GND
12
33
Vcc
I/O4
13
32
I/O11
I/O5
14
31
I/O10
I/O6
15
30
I/O9
I/O7
16
29
I/O8
WE
17
28
NC
A15
18
27
A8
A14
19
26
A9
A13
20
25
A10
A12
21
24
A11
NC
22
23
NC
A4
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A15
A14
A13
A12
NC
2
2
3
4
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
PIN DESCRIPTIONS
48-Pin mini BGA (Top View)
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
5
6
A0-A15
Address Inputs
I/O0-I/O15
Data Inputs/Outputs
CE
OE
WE
LB
UB
Chip Enable Input
Output Enable Input
A
LB
OE
A0
A1
A2
N/C
B
I/O
8
UB
A3
A4
CE
I/O
0
C
I/O
9
I/O
10
A5
A6
I/O
1
I/O
2
D
GND
I/O
11
NC
A7
I/O
3
Vcc
NC
No Connection
E
Vcc
I/O
12
NC
NC
I/O
4
GND
Vcc
Power
F
I/O
14
I/O
13
A14
A15
I/O
5
I/O
6
GND
Ground
G
I/O
15
NC
A12
A13
WE
I/O
7
H
NC
A8
A9
A10
A11
NC
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
ISSI
IS62U6416LL
®
TRUTH TABLE
Mode
Not Selected
Output Disabled
Read
Write
WE
CE
OE
LB
UB
X
H
X
H
H
H
L
L
L
H
L
L
L
L
L
L
L
L
X
H
X
L
L
L
X
X
X
X
X
H
L
H
L
L
H
L
X
X
H
H
L
L
H
L
L
I/O Pin
I/O0-I/O7
I/O8-I/O15
High-Z
High-Z
High-Z
DOUT
High-Z
DOUT
DIN
High-Z
DIN
1
Vcc Current
High-Z
High-Z
High-Z
High-Z
DOUT
DOUT
High-Z
DIN
DIN
ISB1, ISB2
ICC
2
ICC
3
ICC
4
5
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing and Reference Level
Output Load
Unit
0.4 to 1.8V(1)
5 ns
0.9V(1)
See Figures 1 and 2
6
7
AC TEST LOADS
3070 Ω
3070 Ω
THEVENIN EQUIVALENT
1.8V
8
1554 Ω
1.8V
OUTPUT
0.91V
OUTPUT
OUTPUT
100 pF
Including
jig and
scope
3150 Ω
Figure 1.
30 pF
Including
jig and
scope
3150 Ω
Figure 3.
9
Figure 2.
10
11
12
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
3
ISSI
IS62U6416LL
®
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
VTERM
TSTG
PT
IOUT
Parameter
Terminal Voltage with Respect to GND
Storage Temperature
Power Dissipation
DC Output Current (LOW)
Value
–0.5 to Vcc +0.5
–65 to +150
1.5
20
Note:
1. Stress greater than those listed under
ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the
device. This is a stress rating only and
functional operation of the device at
these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods
may affect reliability.
Unit
V
°C
W
mA
OPERATING RANGE
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
VCC
1.8V (Min.) to 2.7V (Max.)
1.8V (Min.) to 2.7V (Max.)
DC ELECTRICAL CHARACTERISTICS (Over Operating Range Unless Otherwise Specified)
Symbol
Parameter
Test Conditions
Min.
Max.
Unit
VOH
Output HIGH Voltage
VCC = Min., IOH = –0.44 mA
1.6
—
V
VOL
Output LOW Voltage
VCC = Min., IOL = 0.33 mA
—
0.4
V
VIH
Input HIGH Voltage
1.6
VCC + 0.2
V
VIL(1)
Input LOW Voltage
–0.2
0.4
V
ILI
Input Leakage
GND ≤ VIN ≤ VCC
–1
1
µA
ILO
Output Leakage
GND ≤ VOUT ≤ VCC, Outputs Disabled
–1
1
µA
Note:
1. VIL (min.) = –1.5V for pulse width less than 30 ns.
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range Unless Otherwise Specified)
-200
Min. Max.
Symbol
Parameter
Test Conditions
ICC
Vcc Dynamic Operating
Supply Current
VCC = Max.,
IOUT = 0 mA, f = fMAX
CE = VIH
Com.
Ind.
—
—
25
40
mA
ISB1
TTL Standby Current
(TTL Inputs)
VCC = Max.,
VIN = VIH or VIL
CE ≥ VIH , f = 0
Com.
Ind.
—
—
0.3
0.3
mA
ISB2
CMOS Standby
Current (CMOS Inputs)
VCC = Max.,
Com.
Ind.
—
—
5
5
µA
CE ≥ VCC – 0.2V,
VIN ≤ 0.2V, f = 0
Unit
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency; f = 0 means no input lines change.
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
ISSI
IS62U6416LL
®
1
CAPACITANCE(1)
Symbol
Parameter
CIN
Input Capacitance
COUT
Input/Output Capacitance
Conditions
Max.
Unit
VIN = 0V
8
pF
VOUT = 0V
10
pF
2
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
3
4
READ CYCLE SWITCHING CHARACTERISTICS(1)
(Over Operating Range)
5
Symbol
Parameter
-200
Min. Max.
tRC
Read Cycle Time
200
—
ns
tAA
Address Access Time
—
200
ns
tOHA
Output Hold Time
20
—
ns
tACE
CE Access Time
OE Access Time
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
LB, UB Access Time
LB, UB to High-Z Output
LB, UB to Low-Z Output
—
200
ns
—
100
ns
0
50
ns
20
—
ns
0
50
ns
30
—
ns
—
100
ns
0
50
ns
20
—
ns
tDOE
tHZOE(2)
tLZOE
(2)
tHZCE(2)
tLZCE(2)
tBA
tHZB
tLZB
Unit
6
7
8
9
10
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing
reference levels of 0.9V, input pulse levels of 0.4 to 1.8V and output
loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500mV from
steady-state voltage. Not 100% tested.
11
12
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
5
ISSI
IS62U6416LL
®
AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CE = OE = VIL, UB or LB = VIL)
tRC
ADDRESS
tAA
tOHA
tOHA
DOUT
DATA VALID
PREVIOUS DATA VALID
READ CYCLE NO. 2(1,3)
tRC
ADDRESS
tAA
tOHA
OE
tHZOE
tDOE
tLZOE
CE
tACE
tHZCE
tLZCE
LB, UB
tBA
DOUT
HIGH-Z
tHZB
tLZB
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE, UB, or LB = VIL.
3. Address is valid prior to or coincident with CE LOW transition.
6
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
ISSI
IS62U6416LL
®
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range)
Parameter
-200
Min.
Max.
tWC
Write Cycle Time
200
—
ns
tSCE
CE to Write End
160
—
ns
tAW
Address Setup Time to Write End
160
—
ns
tHA
Address Hold from Write End
0
—
ns
tSA
Address Setup Time
0
—
ns
tPWB
160
—
ns
tPWE
LB, UB Valid to End of Write
WE Pulse Width
160
—
ns
tSD
Data Setup to Write End
160
—
ns
tHD
Data Hold from Write End
0
—
ns
tHZWE(3)
WE LOW to High-Z Output
WE HIGH to Low-Z Output
—
50
ns
20
—
ns
Symbol
tLZWE(3)
Unit
1
2
3
4
5
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V,
input pulse levels of 0.4V to 1.8V and output loading specified in Figure 1.
2. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All
signals must be in valid states to initiate a Write, but any one can go inactive to terminate the
Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the
signal that terminates the write.
3. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage.
6
7
DATA RETENTION CHARACTERISTICS
Symbol
Parameter
Test Condition
Min.
Max.
Unit
VDR
Vcc for Data Retention
CE ≥ VCC – 0.2V
1.5
—
V
IDR
Data Retention Current
VCC = VDR
CE ≥ VCC – 0.2V
—
5.0
µA
tSDR
Data Retention Set up Time
See Data Retention Waveform
0
—
ns
tRDR
Recovery Time
See Data Retention Waveform
tRC
—
ns
8
9
10
DATA RETENTION TIMING DIAGRAM
tSDR
DATA RETENTION MODE
tRDR
11
VCC
1.8V
12
VIH
VDR
CE
CE ≥ VCC – 0.2V
GND
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
7
ISSI
IS62U6416LL
®
AC WAVEFORMS
WRITE CYCLE NO. 1(1,2) (WE Controlled)
tWC
ADDRESS
tHA
tSCE
CE
tPWB
LB, UB
tAW
tPWE
WE
tSA
WRITE(1)
tSD
tHD
DIN
tHZWE
DOUT
HIGH-Z
tLZWE
UNDEFINED
HIGH-Z
UNDEFINED
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least
one of the LB and UB inputs being in the LOW state.
2. WRITE = (CE) [ (LB) = (UB) ] (WE).
8
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
ISSI
IS62U6416LL
®
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
Speed (ns) Order Part No.
200
1
Package
IS62U6416LL-20T
IS62U6416LL-20K
IS62U6416LL-20B
Plastic TSOP (Type II)
400-mil Plastic SOJ
Mini BGA (6mm x 8mm)
2
3
ORDERING INFORMATION
Industrial Range: –40°C to +85°C
Speed (ns) Order Part No.
200
Package
IS62U6416LL-20TI
IS62U6416LL-20KI
IS62U6416LL-20BI
4
Plastic TSOP (Type II)
400-mil Plastic SOJ
Mini BGA (6mm x 8mm)
5
NOTICE
Integrated Silicon Solution, Inc., reserves the right to make changes to the products contained in this publication in
order to improve design, performance or reliability. Integrated Silicon Solution, Inc. assumes no responsibility for the
use of any circuits described herein, conveys no license under any patent or other right, and makes no representation
that the circuits are free of patent infringement. Charts and schedules contained herein reflect representative operating
parameters, and may vary depending upon a user's specific application. While the information in this publication has
been carefully checked, Integrated Silicon Solution, Inc. shall not be liable for any damages arising as a result of any
error or omission.
6
7
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where
the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to
significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated
Silicon Solution, Inc. receives written assurances, to its satisfaction, that: (a) the risk of injury or damage has been
minimized; (b) the user assumes all such risks; and (c) potential liability of Integrated Silicon Solution, Inc. is adequately
protected under the circumstances.
8
9
Copyright 1998 Integrated Silicon Solution, Inc.
Reproduction in whole or in part, without the prior written consent of Integrated Silicon Solution, Inc., is prohibited.
10
ISSI
®
Integrated Silicon Solution, Inc.
2231 Lawson Lane
Santa Clara, CA 95054
Fax: (408) 588-0806
Toll Free: 1-800-379-4774
email: [email protected]
http://www.issi.com
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
9
11
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