IDT IDT29FCT52BD Fast cmos octal registered transceiver Datasheet


FAST CMOS
OCTAL REGISTERED
TRANSCEIVERS
IDT29FCT52A/B/C
IDT29FCT53A/B/C
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
• Equivalent to AMD’s Am2952/53 and National’s
29F52/53 in pinout/function
• IDT29FCT52A/53A equivalent to FAST speed
• IDT29FCT52B/53B 25% faster than FAST
• IDT29FCT52C/53C 37% faster than FAST
• IOL = 64mA (commercial) and 48mA (military)
• IIH and IIL only 5µA max.
• CMOS power levels (2.5mW typ. static)
• TTL input and output level compatible
• CMOS output level compatible
• Available in 24-pin DIP, SOIC, 28-pin LCC with JEDEC
standard pinout
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
The IDT29FCT52A/B/C and IDT29FCT53A/B/C are 8-bit
registered transceivers manufactured using an advanced
dual metal CMOS technology. Two 8-bit back-to-back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable and 3-state output
enable signals are provided for each register. Both A outputs
and B outputs are guaranteed to sink 64mA.
The IDT29FCT52A/B/C is a non-inverting option of the
IDT29FCT53A/B/C.
FUNCTIONAL BLOCK DIAGRAM(1)
CPA
CEA
A0
A1
OEB
D 0 CE CP Q0
A2
A3
A4
D3
Q3
A
D 4 Reg. Q4
B3
B4
A5
D5
D6
Q5
Q6
B5
D7
Q7
Q0
D0
Q1
Q2
D1
D2
A6
A7
Q1
Q2
B0
B1
D1
D2
B2
B6
B7
Q3
D3
B
Q 4 Reg. D4
Q5
D5
Q6
D6
Q 7 CE CP D7
OEA
CPB
CEB
NOTE:
1. IDT29FCT52 function is shown.
2533 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1992 Integrated Device Technology, Inc.
7.1
MAY 1992
DSC-4605/3
1
IDT29FCT52A/B/C, IDT29FCT53A/B/C
FAST CMOS OCTAL REGISTERED TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
B5
B6
B7
NC
Vcc
A7
A6
PIN CONFIGURATIONS
INDEX
1
24
2
23
3
22
4
5
6
7
P24-1,
D24-1,
E24-1
&
SO24-2
21
20
19
18
8
17
9
16
10
15
11
14
12
13
Vcc
A7
A6
A5
A4
A3
A2
A1
A0
OEA
CPB
CEB
4
B4
B3
B2
NC
B1
B0
OEB
3
2
5
28 27 26
25
1
6
24
7
23
L28-1
8
22
9
21
10
20
11
19
A5
A4
A3
NC
A2
A1
A0
12 13 14 15 16 17 18
CPA
CEA
GND
NC
CEB
CPB
OEA
B7
B6
B5
B4
B3
B2
B1
B0
OEB
CPA
CEA
GND
DIP/CERPACK/SOIC
TOP VIEW
LCC
TOP VIEW
2533 drw 02
PIN DESCRIPTION
Name
I/O
Description
A0-7
I/O
Eight bidirectional lines carrying the A Register inputs or B Register outputs.
B0-7
I/O
Eight bidirectional lines carrying the B Register inputs or A Register outputs.
CPA
I
CEA
I
OEB
I
CPB
I
CEB
I
OEA
I
Clock for the A Register. When CEA is LOW, data is entered into the A Register on the LOW-to-HIGH transition
of the CPA signal.
Clock Enable for the A Register. When CEA is LOW, data is entered into the A Register on the LOW-to-HIGH
transition of the CPA signal. When CEA is HIGH, the A Register holds its contents, regardless of CPA signal
transitions.
Output Enable for the A Register. When OEB is LOW, the A Register outputs are enabled onto the B0-7 lines. When
OEB is HIGH, the B0-7 outputs are in the high-impedance state.
Clock for the B Register. When CEB is LOW, data is entered into the B Register on the LOW-to-HIGH transition
of the CPB signal.
Clock Enable for the B Register. When CEB is LOW, data is entered into the B Register on the LOW-to-HIGH
transition of the CPB signal. When CEB is HIGH, the B Register holds its contents, regardless of CPB signal
transitions.
Output Enable for the B Register. When OEA is LOW, the B Register outputs are enabled onto the A0-7 lines. When
OEA is HIGH, the A0-7 outputs are in the high-impedance state.
2533 tbl 01
REGISTER FUNCTION TABLE(1)
OUTPUT CONTROL(1)
(Applies to A or B Register)
D
X
L
H
Inputs
CP
X
↑
↑
CE
H
L
L
Internal
Internal
Q
NC
L
H
Function
Hold Data
Load Data
Y-Outputs
OE
Q
52
H
X
Z
Z
Disable Outputs
L
L
L
H
Enable Outputs
L
H
H
L
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
NC = No Change
↑ = LOW-to-HIGH Transition
2533 tbl 02
7.1
53
Function
2533 tbl 03
2
IDT29FCT52A/B/C, IDT29FCT53A/B/C
FAST CMOS OCTAL REGISTERED TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Commercial
Military
Unit
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
–0.5 to +7.0
–0.5 to +7.0
V
CIN
Input
Capacitance
VIN = 0V
6
10
pF
–0.5 to VCC
–0.5 to VCC
V
CI/O
I/O
Capacitance
VOUT = 0V
8
12
pF
0 to +70
–55 to +125
°C
–55 to +125
–65 to +135
°C
–55 to +125
–65 to +150
°C
0.5
120
0.5
120
W
mA
VTERM(2) Terminal Voltage
with Respect
to GND
(3)
VTERM
Terminal Voltage
with Respect
to GND
TA
Operating
Temperature
TBIAS
Temperature
Under Bias
TSTG
Storage
Temperature
PT
Power Dissipation
DC Output Current
IOUT
NOTE:
2533 tbl 05
1. This parameter is guaranteed by characterization data and not tested.
NOTES:
2533 tbl 04
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed +0.5V unless otherwise noted.
2. Inputs and VCC terminals only.
3. Outputs and I/O terminals only.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC – 0.2V
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Test Conditions(1)
Parameter
Min.
Typ.(2)
Max.
Unit
V
VIH
Input HIGH Level
Guaranteed Logic HIGH Level
2.0
—
—
VIL
Input LOW Level
Guaranteed Logic LOW Level
—
—
0.8
V
IIH
Input HIGH Current
VCC = Max.
VI =VCC
—
—
5
µA
(Except I/O Pins)
VI = 2.7V
—
—
5(4)
Input LOW Current
VI = 0.5V
—
—
–5(4)
VI = GND
—
—
–5
VI = VCC
—
—
15
IIL
(Except I/O Pins)
IIH
IIL
Input HIGH Current
VCC = Max.
(I/O Pins Only)
VI = 2.7V
—
—
Input LOW Current
VI = 0.5V
—
—
(I/O Pins Only)
VIK
Clamp Diode Voltage
VI = GND
Vcc = Min., IN = –18mA
(3)
15
µA
(4)
–15(4)
—
—
–15
—
–0.7
–1.2
V
IOS
Short Circuit Current
Vcc = Max. , VO = GND
–60
–120
—
mA
VOH
Output HIGH Voltage
Vcc = 3V, VIN = VLC or VHC, IOH = –32µA
VHC
VCC
—
V
Vcc = Min.
IOH = –300µA
VHC
VCC
—
VIN = VIH or VIL
IOH = –15mA MIL.
2.4
4.0
—
IOH = –24mA COM’L.
2.4
4.0
—
—
GND
VLC
VOL
Output LOW Voltage
Vcc = 3V, VIN = VLC or VHC, IOL = 300µA
Vcc = Min.
IOL = 300µA
—
GND
VLC(4)
VIN = VIH or VIL
IOL = 48mA MIL.(5)
—
0.3
0.55
—
0.3
0.55
IOL = 64mA COM’L.
(5)
V
NOTES:
2533 tbl 06
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. These are maximum IOL values per output, for 8 outputs turned on simultaneously. Total maximum IOL (all outputs) is 512mA for commercial and
384mA for military. Derate IOL for number of outputs exceeding 8 turned on simultaneously.
7.1
3
IDT29FCT52A/B/C, IDT29FCT53A/B/C
FAST CMOS OCTAL REGISTERED TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC – 0.2V
Symbol
Test Conditions(1)
Parameter
Min.
Typ.(2)
Max.
Unit
ICC
Quiescent Power Supply
Current
VCC = Max.
VIN ≥ VHC; VIN ≤ VLC
—
0.5
1.5
µA
∆ICC
Quiescent Power Supply
Current TTL Inputs HIGH
Vcc = Max.
VIN = 3.4V(3)
—
0.5
2.0
mA
ICCD
Dynamic Power Supply
Current(4)
Vcc = Max.
Outputs Open
OEA or OEB= GND
One Input Toggling
50% Duty Cycle
VIN ≥ VHC
VIN ≤ VLC
—
0.15
0.25
mA/
MHz
IC
Total Power Supply
Current(6)
Vcc = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OEA or OEB= GND
One Bit Toggling
at fi = 5MHz
50% Duty Cycle
VIN ≥ VHC
VIN ≤ VLC
(FCT)
—
2.0
4.0
mA
VIN = 3.4V
VIN = GND
—
2.5
6.0
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OEA or OEB = GND
Eight Bits Toggling
at fi = 2.5MHz
50% Duty Cycle
VIN ≥ VHC
VIN ≤ VLC
(FCT)
—
4.3
7.8(5)
VIN = 3.4V
VIN = GND
—
6.5
16.8(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
7.1
2533 tbl 07
4
IDT29FCT52A/B/C, IDT29FCT53A/B/C
FAST CMOS OCTAL REGISTERED TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol
Parameter
tPLH
tPHL
Propagation Delay
CPA, CPB to An, Bn
tPZH
tPZL
IDT29FCT52A/53A
IDT29FCT52B/53B
IDT29FCT52C/53C
Com’l.
Com’l.
Com’l.
Mil.
Mil.
Mil.
Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
CL = 50pF
RL = 500Ω
2.0
10.0
2.0
11.0
2.0
7.5
2.0
8.0
2.0
6.3
2.0
7.3
ns
Output Enable Time
OEA or OEB to
An or Bn
1.5
10.5
1.5
13.0
1.5
8.0
1.5
8.5
1.5
7.0
1.5
8.0
ns
tPHZ
tPLZ
Output Disable Time
OEA or OEB to
An or Bn
1.5
10.0
1.5
10.0
1.5
7.5
1.5
8.0
1.5
6.5
1.5
7.5
ns
tSU
Set-up Time HIGH
or LOW An, Bn to
CPA, CPB
2.5
—
2.5
—
2.5
—
2.5
—
2.5
—
2.5
—
ns
tH
Hold Time HIGH
or LOW An, Bn to
CPA, CPB
2.0
—
2.0
—
1.5
—
1.5
—
1.5
—
1.5
—
ns
tSU
Set-up Time HIGH
or LOW CEA, CEB to
CPA, CPB
3.0
—
3.0
—
3.0
—
3.0
—
3.0
—
3.0
—
ns
tH
Hold Time HIGH
or LOW CEA, CEB to
CPA, CPB
2.0
—
2.0
—
2.0
—
2.0
—
2.0
—
2.0
—
ns
tW
Pulse Width, HIGH(3)
or LOW CPA or CPB
3.0
—
3.0
—
3.0
—
3.0
—
3.0
—
3.0
—
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
2533 tbl 08
7.1
5
IDT29FCT52A/B/C, IDT29FCT53A/B/C
FAST CMOS OCTAL REGISTERED TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
SWITCH POSITION
TEST CIRCUITS FOR ALL OUTPUTS
VCC
7.0V
500Ω
V OUT
VIN
Pulse
Generator
D.U.T.
50pF
RT
500Ω
SET-UP, HOLD AND RELEASE TIMES
Closed
All Other Tests
Open
3V
1.5V
0V
tH
TIMING
INPUT
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
tW
t REM
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
Open Drain
Disable Low
Enable Low
PULSE WIDTH
DATA
INPUT
ASYNCHRONOUS CONTROL
Switch
DEFINITIONS:
2533 tbl 09
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
CL
t SU
Test
t SU
1.5V
3V
1.5V
0V
tH
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
3V
1.5V
SAME PHASE
INPUT TRANSITION
t PLH
t PHL
CONTROL
INPUT
t PZL
0V
OUTPUT
NORMALLY SWITCH
LOW CLOSED
t PZH
VOH
1.5V
OUTPUT
VOL
t PLH
t PHL
OUTPUT SWITCH
NORMALLY OPEN
HIGH
3V
OPPOSITE PHASE
INPUT TRANSITION
1.5V
1.5V
0V
t PLZ
3.5V
3.5V
1.5V
0.3V
V OL
t PHZ
0.3V
1.5V
0V
V OH
0V
0V
NOTES
2533 drw 04
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0 MHz; ZO ≤ 50Ω; tF ≤ 2.5ns;
tR ≤ 2.5ns.
7.1
6
IDT29FCT52A/B/C, IDT29FCT53A/B/C
FAST CMOS OCTAL REGISTERED TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT29FCT
XXX
X
X
Device
Type
Package
Process/
Temperature
Range
Blank
B
Commercial (0°C to +70°C)
Military (–55°C to +125°C)
Compliant to MIL-STD-883, Class B
P
D
E
L
SO
Plastic DIP
CERDIP
CERPACK
Leadless Chip Carrier
Small Outline IC
52A
53A
52B
53B
52C
53C
Non-Inverting Octal Registered Transceiver
Inverting Octal Registered Transceiver
Fast Non-Inverting Octal Registered Transceiver
Fast Inverting Octal Registered Transceiver
Super Fast Non-Inverting Octal Registered Transceiver
Super Fast Inverting Octal Registered Transceiver
2533 drw 03
7.1
7
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