MIC4807
Micrel
MIC4807
80V 8-Channel Addressable Low-Side Driver
General Description
Features
The MIC4807 is an 80V, 8-channel, addressable low side
driver with latches and TTL/CMOS compatible logic inputs.
Each logic input is composed of a comparator with a 1.4V
bandgap-derived reference serving as the trip point. The
addresses (AIN, BIN, and CIN) and Data-in logic inputs have an
internal 50µA pull-up current source, while the Output Enable
(OE), Chip Select (CS), and Clear logic inputs have an
internal 75µA pull-down sink. If the logic lines to the MIC4807
are severed, these currents guarantee that the outputs will
turn OFF.
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Applications
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Individual latches in the MIC4807 are selected by a binary
address presented at inputs AIN, BIN, and CIN. Data-in is
directed to the addressed latch while CS is held low, allowing
an individual output to be pulse-width modulated. When CS
is set high again, the last Data-in is stored in the latch. If Datain = "1", the addressed output is turned on, and if Data-in = "0",
the addressed output is turned off.
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Information presented to Data-in and the address inputs is
transferred to the latches while CS is pulled low. For
application, where several outputs must be
(Continued)
Lamp Drivers
Solenoid Drivers
Display Drivers
-Electroluminescent
-Vacuum Fluorescent
-Plasma
Relay Drivers
Print Head Drivers
Heater Drivers
Power Semiconductor Drivers
Security Systems
Environmental Controls
Process Controllers
Ordering Information
Pin Diagram
HVOUT2 1
HVOUT3 2
VDD 3
OE
Ground
CS
Clear
HVOUT4
HVOUT5
4.5V to 16V Operation
Eight 80V 100mA Outputs
Off-state Leakage less than 10µA at 25°C
Short-Circuit Proof
Thermal Shutdown with Hysteresis
DMOS Output Devices (RON ≤ 7Ω at 25°C)
18 HVOUT1
17 HVOUT0
Part
Number
16 Data-in
4
MIC4807 15 AIN
5
6
14 BIN
13 CIN
7
8
12 VDD
11 HVOUT7
9
10 HVOUT6
MIC4807BN
Operating
Temperature-Range
Package
-40°C to 85°C
18-Pin Plastic DIP
Block Diagram
Thermal
Shutdown
VDD 12
{
AIN 15
Addressing
BIN 14
CIN 13
Address
Decoder
Latches
Data-in 16
Current
Limit
Driver
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Driver
Ground 5
October 1998
6
7
4
CS
Clear
OE
7-3
17
HVOUT 0
18
1
HVOUT 1
2
HVOUT 3
8
HVOUT 4
9
HVOUT 5
10
HVOUT 6
11
HVOUT 7
HVOUT 2
7
MIC4807
Micrel
When operated below current limit, the outputs appear as
small-valued resistors (typically 5.1Ω at 25°C) connected to
ground. The "ON" resistance (RON) has a strong, positive
temperature coefficient (approximately 7500 ppm/°C) which
promotes current sharing if two or more outputs are paralleled.
General Description (Continued)
turned on simultaneously, Gray Code address sequencing
can be applied to Ain, Bin, Cin, while Data-in is held high and
CS is held low. Data-in will be transferred to each address in
turn, without the need to toggle CS. Similarly, a set of outputs
could be simultaneously turned off by setting Data-in low.
Gray Code ensures that no intermediate addresses are
inadvertently accessed. A typical Gray Code is 0, 1, 3, 2, 6,
7, 5, 4.
Absolute Maximum Ratings (Notes 1, 2 and 3)
Output Voltage (VOUT, OFF)
100V
Supply Voltage (VDD)
16.5V
Logic Input Voltage (VIN)
–0.3V TO VDD + 0.3
Continuous Output Current (IOUT)
Internally Limited
Power Dissipation (PD, Note 2)
Internally Limited
Ambient Temperature (TA):
–40°C to +85°C
Maximum Junction Temperature (TJMAX)
150°C
Storage Temperature
–65°C to +150°C
θJA - Plastic DIP
130°C/W
Each output drive circuit has a high-voltage, power DMOS
device configured as a transconductance loop. This loop
limits the output current to typically 200mA. While current
limiting keeps the output device within its allowable safeoperating area (SOA), the power dissipation may be excessive. Long-term survival is guaranteed by thermal shutdown.
Electrical Characteristics:
(Note 6) MIC4807BN, TA = 25°C, VDD = 15V unless otherwise specified (see
Test Circuit).
Symbol
Parameter
Conditions
VDD
Supply Voltage
IDD
Supply Current
OE = L (Note 3)
OE = H (Note 4)
VIN (0)
Logic Input Voltage
4.5V ≤ VDD ≤ 16V
Min
Typ
4.5
VIN (1)
5.5
1.5
Max
Units
16
V
10
3
mA
mA
0.8
V
2.0
V
–150
–70
–25
µA
25
130
250
µA
1
10
µA
5.1
7
Ω
190
250
mA
80
V
0.35
0.7
V
V
IIN (0)
Logic Input Current for AIN,
BIN, CIN, and Data-in
VIN = 0V
IIN (1)
Logic Input Current for CS,
OE, and Clear
VIN = VDD
IOUT
Output Leakage Current
OE = 0V, VOUT = 80V
RON
Output "ON" Resistance
Output is ON, VOUT = 0.7V,VDD = 10V
ISC
Short Circuit Current
Output is ON< VOUT = 50V
10V ≤ VDD ≤ 15V (Note 5)
VOUT
Output Voltage (OFF)
VOUT
Output Voltage (ON)
IOUT = 50mA,VDD = 10V
IOUT = 100mA, VDD = 10V
Data and Address
Set-up Time
VDD = 10V for all timing tests
(A, see Timing Diagram)
400
ns
Data and Address
Hold Time
(B)
50
ns
CS Pulse Width
(C)
500
ns
Turn-on Delay
(D)
140
0.26
0.51
2.5
7-4
ns
October 1998
MIC4807
Micrel
Electrical Characteristics:
Symbol
(Note 6) TA = 25°C, VDD = 15V unless otherwise specified (see Test Circuit).
Parameter
Conditions
Min
Typ
Max
Units
Turn-Off Delay
(E)
2.5
µs
Output Disable
Response Time
(F)
2
µs
Output Enable
Response Time
(G)
2
µs
Clear Response Time
(H)
2.5
µs
Clear Pulse Width
(I)
Electrical Characteristics:
500
ns
(Note 6) TA = –55°C to +125°C, VDD = 15V unless otherwise specified (see Test
Circuit).
Symbol
Parameter
Conditions
Min
Typ
4.5
Max
Units
16
V
VDD
Supply Voltage
IDD
Supply Current
OE = L (Note 3)
OE = H (Note 4)
15
4
mA
mA
VIN (0)
Logic Input Voltage
4.5V ≤ VDD ≤ 16V
0.8
V
VIN (1)
2.0
V
–250
–10
µA
25
400
µA
7
µA
12
Ω
300
mA
80
V
0.6
1.2
V
V
IIN (0)
Logic Input Current for AIN,
BIN, CIN, and Data-in
VIN = 0V
IIN (1)
Logic Input Current for CS,
OE, and Clear
VIN = VDD
IOUT
Output Leakage Current
OE = 0V, VOUT = 80V
RON
Output "ON" Resistance
Output is ON, VOUT =0.7V,VDD=10V
ISC
Short Circuit Current
Output is ON< VOUT = 50V
10V ≤ VDD ≤ 15V (Note 5)
VOUT
Output Voltage (OFF)
VOUT
Output Voltage (ON)
IOUT = 50mA,VDD = 10V
IOUT = 100mA, VDD = 10V
Data and Address
Set-up Time
VDD = 10V for all timing tests
(A, see Timing Diagram)
700
ns
Data and Address
Hold Time
(B)
50
ns
CS Pulse Width
(C)
1000
ns
Turn-on Delay
(D)
October 1998
5.1
100
5
7-5
µs
7
MIC4807
Micrel
Electrical Characteristics:
Symbol
(Note 6) TA = 25°C, VDD = 15V unless otherwise specified (see Test Circuit).
Parameter
Conditions
Min
Typ
Max
Units
Turn-Off Delay
(E)
5
µs
Output Disable
Response Time
(F)
4
µs
Output Enable
Response Time
(G)
4
µs
Clear Response Time
(H)
5
µs
Clear Pulse Width
(I)
1000
ns
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not
apply when operating the device beyond its specified operating ratings.
Note 2: The junction temperature is internally limited by a thermal shutdown circuit. The maximum power dissipation is a function of
TJMAX, θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJMAX - TA) / θJA. If this dissipation
is exceeded, the die temperature will rise above 150°C, and the MIC4807 will go into thermal shutdown.
Note 3: All outputs are off when OUTPUT ENABLE is pulled low.
Note 4: All outputs are turned on during this test.
Note 5: Pulse testing is used to avoid thermal shutown.
Note 6: Minimum and Maximum limits are tested and 100% guaranteed over the temperature range specified. Typicals are measured
at 25°C and represent the most likely parametric norm.
Timing Diagram
Logic "1"
Logic "0"
CIN
BIN
AIN
A
B
Data-in
CS
C
H
Clear
OE
HVOUT0
G
D
OFF
ON
F
HVOUT1
HVOUT2
H
D
E
HVOUT3
HVOUT4
7-6
October 1998
MIC4807
Micrel
Test Circuit and AC Waveform Measurement Standards
VOUT3
VOUT2
VDD
VIN
VIN
1
18
2
17
3
16
4
MIC4807 15
5
6
14
7
12
8
11
9
10
VOUT1
VOUT0
R
C
R
C
R
C
R
C VDD=10V
VIN
C = 35pF
R = 10kΩ
13
R
C
R
C
R
C
R
C
VOUT7
VOUT6
VOUT5
VOUT4
VIN
5V
0V
10V
All reference times are taken
from the 50% transition point.
tDelay
VOUT
0V
7
October 1998
7-7
MIC4807
Micrel
Equivalent Logic Diagram
VDD
AIN
BIN
CIN
Data-in
50µA
Drive
Circuit
+
-
HVOUT0
1.4V
CS
Clear
OE
Address
Decoder
+
-
Total of
8 Channels
75µA
Drive
Circuit
HVOUT7
OVER
TEMP
CIN BIN AIN
CS
Data-in
Clear
OE
Truth Table
CS
Clear Data-In CIN BIN AIN OE HVOUT0 HVOUT1 HVOUT2 HVOUT3 HVOUT4 HVOUT5 HVOUT6 HVOUT7
Functional Mode
X
L
X
X
X
X
X
H
H
H
H
H
H
H
H
Clear
H
H
X
X
X
X
H
P
P
P
P
P
P
P
P
Memory
L
H
D
L
L
L
H
D
P
P
P
P
P
P
P
Address HVOUT0
L
H
D
L
L
H
H
P
D
P
P
P
P
P
P
Address HVOUT1
L
H
D
L
H
L
H
P
P
D
P
P
P
P
P
Address HVOUT2
L
H
D
L
H
H
H
P
P
P
D
P
P
P
P
Address HVOUT3
L
H
D
H
L
L
H
P
P
P
P
D
P
P
P
Address HVOUT4
L
H
D
H
L
H
H
P
P
P
P
P
D
P
P
Address HVOUT5
L
H
D
H
H
L
H
P
P
P
P
P
P
D
P
Address HVOUT6
L
H
D
H
H
H
H
P
P
P
P
P
P
P
D
Address HVOUT7
X
X
X
X
X
X
L
H
H
H
H
H
H
H
H
Blanking
L = Low Logic Level
X = Don't Care
H = High Logic Level
P = Previous State
D = Data (High or Low)
7-8
October 1998
MIC4807
Micrel
Typical DC Output Characteristics for the “On” State:
(VDD = 10V and TA = 25°C unless other wise specified)
VDD = 10V
VDD = 15V
EXPANDED VERSION OF SHORT
CIRCUIT CURRENT FOR LOW
OUTPUT VOLTAGE (VOUT)
400
400
300
300
IOUT (mA)
IOUT (mA)
SHORT CIRCUIT CURRENT
200
200
100
100
0
0
0
20
40
VOUT (V)
60
80
0
2
3
4
5
VOUT (V)
IOUT FOR SEPARATE VDD
IOUT AT 3 TEMPERATURES
120
100
100
80
80
IOUT (mA)
120
IOUT (mA)
1
60
T = 25°C
T = 125°C
60
40
40
20
20
0
T = –55°C
7
0
0
0.5
VOUT (V)
1.0
0.0
5.0
10.0
VOUT (V)
ON RESISTANCE (RON)
SHORT CIRCUIT CURRENT LIMIT (ISC)
15.0
200
RON (Ω)
ISC (mA)
10.0
100
5.0
0
0.0
0.0
5.0
10.0
0.0
VDD (V)
October 1998
5.0
VDD (V)
7-9
10.0
MIC4807
Micrel
Pin Description
Pin No.
Pin Name
Functional Description
5
Ground
12
VDD
1, 2, 8,
9,10, 11,
17,18
HVOUT0 through HVOUT7
These are the high voltage (HV) open outputs, each of which is capable of
sinking 100mA when switched on, and standing off 80V when switched off.
In addition, each output channel is equipped with an analog current limiter
to protect it from shorts to the positive high voltage supply. When an output
is shorted (up to 80V), a maximum of 225mA (200mA nominal) will flow
through it to ground.
13, 14, 15
CIN, BIN, &AIN
When these inputs are combined together they form the BCD address used
to select the desired output. Each input is TTL compatible with an internal
pull-up current source of 50mA.
6
CS
When CS is at logic "0" the device is actively addressed, and when CS is
at logic "1" the decoded address and input Data are inhibited, making
the part unaddressable. CS is TTL compatible with an internal pull-down
current sink of 75µA.
7
Clear
Clear resets all the outputs to the off state when pulled to logic "0", and is
TTL compatible with an internal pull-down current sink of 75µA.
16
Data-in
Data-in determines the state of the output being addressed. When Datain is at logic "0" the addressed output is turned off, and when Data-in is at
logic "1" the addressed output is turned on. Data-in is TTL compatible with
an internal pull-up current source of 50µA.
4
OE
OE allows the bank of eight outputs to be duty cycled together. When OE
is at logic "1" the outputs are enabled to follow their respective latches, and
when OE is at logic "0" all the outputs are turned off. OE is TTL Compatible
with a pull-down current sink of 75µA.
Electrical ground to chip substrate.
Positive logic supply voltage (10V-15V).
7-10
October 1998