MIC58P01 Micrel MIC58P01 8-Bit Parallel-Input Protected Latched Driver General Description Features The MIC58P01 parallel-input latched driver is a high-voltage (80V), high-current (500mA) integrated circuit comprised of eight CMOS data latches, a bipolar Darlington transistor driver for each latch, and CMOS control circuitry for the common CLEAR, STROBE, and OUTPUT ENABLE functions. Similar to the MIC5801, additional protection circuitry supplied on this device includes thermal shutdown, under voltage lockout (UVLO), and overcurrent shutdown. • • • • • • • • • The bipolar/CMOS combination provides an extremely lowpower latch with maximum interface flexibility. The MIC58P01 has open-collector outputs capable of sinking 500 mA and integral diodes for inductive load transient suppression with a minimum output breakdown voltage rating of 80V (50V sustaining). The drivers may be paralleled for higher load current capability. With a 5V logic supply, the MIC58P01 will typically operate at better than 5MHz. With a 12V logic supply, significantly higher speeds are obtained. The CMOS inputs are compatible with standard CMOS, PMOS, and NMOS circuits. TTL circuits may require pull-up resistors. 4.4MHz Minimum Data Input Rate High-Voltage, High-Current Outputs Per-Output Overcurrent Shutdown (500mA typical) Under Voltage Lockout Thermal Shutdown Output Transient Protection Diodes CMOS, PMOS, NMOS, and TTL Compatible Inputs Internal Pull-Down Resistors Low-Power CMOS Latches Ordering Information Part Number Each of these eight outputs has an independent overcurrent shutdown of 500mA. Upon current shutdown, the affected channel will turn OFF until VDD is cycled or the ENABLE/ RESET pin is pulsed high. Current pulses less than 2µs will not activate current shutdown. Temperatures above 165°C will shut down all outputs. The UVLO circuit disables the outputs at low VDD; hysteresis of 0.5V is provided. Temperature Range Package MIC58P01BN –40°C to +85°C 22-Pin Plastic DIP MIC58P01BV –40°C to +85°C 28-Pin PLCC MIC58P01BWM –40°C to +85°C 24-Pin Wide SOIC 7 Functional Diagram Pin Configuration (DIP) ENABLE/RESET ISHUTDOWN V DD IREF IOUT / N - + 2.2R 1.25V R IN + – UVLO COMMON THERMAL SHUTDOWN S R Q OUTPUT R1 70k Circuitry below dashed line is included in each of the 8 channels. V EE R2 3k CLEAR 1 STROBE 2 7-17 22 OUTPUT ENABLE/RESET 21 VDD OUT1 IN1 3 20 IN2 4 19 OUT2 IN3 5 18 OUT3 IN4 6 17 OUT4 IN5 7 16 OUT5 IN6 8 15 OUT6 IN7 9 14 OUT7 IN8 10 13 OUT8 12 COMMON GROUND 11 October 1998 I LIMIT AND THERMAL SHUTDOWN LATCHES CLEAR STROBE UVLO MIC58P01 Micrel Pin Configuration, Continued Absolute Maximum Ratings: (Note 1) NC 2 VDD NC 3 CLEAR STROBE 4 OE/RESET NC at +25°C Free-Air Temperature 1 28 27 26 IN 1 5 25 OUT 1 IN 2 6 24 OUT 2 IN 3 7 23 OUT 3 IN 4 8 22 OUT 4 MIC58P01BV IN 5 9 21 OUT 5 IN 6 10 20 OUT 6 IN 7 11 19 OUT 7 17 18 80V 15V –0.3V to VDD + 0.3V 2.25W 22.5mW/°C 1.6W 16mW/°C 1.4W 14mW/°C –55°C to +85°C –65°C to +125°C Note 1: Micrel CMOS devices have input-static protection but are susceptible to damage when exposed to extremely high static electrical charges. OUT 8 NC 16 COMMON 15 GROUND 14 NC 13 NC IN 8 12 Output Voltage, VCE Supply Voltage, VDD Input Voltage Range, VIN Package Power Dissipation: MIC58P01BN Derate above TA = +25°C MIC58P01BV Derate above TA = +25°C MIC58P01BWM Derate above TA = +25°C Operating Temperature Range, TA Storage Temperature Range, TS MIC58P01BV, 28–Pin PLCC Typical Input V DD GROUND 1 24 CLEAR 2 23 STROBE 3 22 OUTPUT ENABLE/RESET VDD IN1 4 21 OUT1 IN2 5 20 OUT2 IN3 6 19 OUT3 IN4 7 18 OUT4 IN5 8 17 OUT5 IN6 9 16 OUT6 IN7 10 15 OUT7 IN8 11 14 OUT8 GROUND 12 13 COMMON IN Allowable Output Current As A Function of Duty Cycle ALLOWABLE COLLECTOR CURRENT IN mA AT 50°C MIC58P01BWM NC MIC58P01BWM, 24–Pin SOIC (not pin compatible with MIC5801BWM) MIC58P01BN 450 400 1 or 2 350 3 4 300 5 6 250 7 8 200 NUMBER OF OUTPUTS CONDUCTING SIMULTANEOUSLY 150 100 0 10 20 30 40 50 60 70 80 90 100 PERCENT DUTY CYCLE Pin Description Pin (DIP) Name Description 1 CLEAR Resets all Latches and turns all outputs OFF (open). 2 STROBE Input Strobe Pin. Loads output latches when High. 3–10 INPUT Parallel Inputs, 1 through 8 11 GROUND Logic and Output Ground pin. 12 COMMON Transient suppression diode common cathode pin. 13–20 OUTPUT Parallel Outputs, 8 through 1. 21 VDD Logic Supply voltage. 22 OUTPUT ENABLE/RESET When Low, Outputs are active. When High, outputs are inactive and device is reset from a fault condition. An undervoltage condition emulates a high OE input. 7-18 October 1998 MIC58P01 Micrel Electrical Characteristics: at TA = +25°C, VDD = 5V (unless otherwise noted) Limits Characteristic Symbol Output Leakage Current ICEX Collector-Emitter Test Conditions VCE(SAT) Saturation Voltage Input Voltage Min. Typ. VCE = 80V, TA = +25°C 50 VCE = 80V, TA = +70°C 100 IC = 100mA 0.9 1.1 IC = 200mA 1.1 1.3 IC = 350mA 1.3 VIN(1) VDD = 12V RIN Supply Current Clamp Diode µA V 1.6 1.0 VIN(0) Input Resistance Max. Units 10.5 VDD = 10V 8.5 VDD = 5.0V (See Note) 3.5 VDD = 12V 50 200 VDD = 10V 50 300 VDD = 5.0V 50 600 kΩ IDD(ON) VDD = 12V, Outputs Open 3.3 4.5 (One output VDD = 10V, Outputs Open 3.1 4.5 active) VDD = 5.0V, Outputs Open 2.4 3.6 IDD(ON) VDD = 12V, Outputs Open 6.4 10.0 (All outputs VDD = 10V, Outputs Open 6.0 9.0 active) VDD = 5.0V, Outputs Open 4.7 7.5 IDD(OFF) VDD = 12V, Outputs Open, Inputs = 0V 3.0 4.5 (Total) VDD = 5.0V, Outputs Open, Inputs = 0V 2.2 3.6 IR Leakage Current VR = 80V, TA = +25°C 50 VR = 80V, TA = +70°C 100 Overcurrent Threshold ILIM Per Output Start-Up Voltage VSU Note 2. Minimum Operating VDD VDD MIN Clamp Diode Forward Voltage VF V 500 3.5 3.0 IF = 350mA 4.0 mA mA mA µA mA 4.5 V 3.5 4.0 V 1.7 2.0 V Thermal Shutdown 165 °C Thermal Shutdown Hystersis 10 °C NOTE 1: NOTE 2: Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to insure a minimum logic “1”. Under-Voltage Lockout is guaranteed to release device at no more than 4.5V, and disable the device at no less than 3.0V. Truth Table Output OUTN INN Strobe Clear Enable t–1 t 0 1 0 0 X OFF 1 1 0 0 X ON X X 1 X X OFF X X X 1 X OFF X 0 0 0 ON ON X 0 0 0 OFF OFF Information present at an input is transferred to its latch when the STROBE is high. A high CLEAR input will set all latches to the output OFF condition regardless of the Data or STROBE input levels. A high OUTPUT ENABLE will set all outputs to the OFF condition, regardless of any other input conditions. When the OUTPUT ENABLE is low, the outputs depend on the state of their respective latches. If current shutdown is activated, the OUTPUT ENABLE must be pulsed high to restore operation. Over temperature faults are not latched and require no reset pulse. X = Irrelevant t–1 = previous output state t = present output state October 1998 7-19 7 MIC58P01 Micrel CLEAR F STROBE C A OUTPUT ENABLE C B B C A G B G IN N D E E OUT N Timing Conditions (TA A. B. C. D. E. F. G. = +25°C, Logic Levels are VDD and Ground, VDD = 5V) Minimum data active time before strobe enabled (data set-up time) ....................................................................... 50ns Minimum data active time after strobe disabled (data hold time) ............................................................................. 50ns Minimum strobe pulse width .................................................................................................................................. 125 ns Typical time between strobe activation and output on to off transition ................................................................... 500ns Typical time between strobe activation and output off to on transition ................................................................... 500ns Minimum clear pulse width ..................................................................................................................................... 300ns Minimum data pulse width ..................................................................................................................................... 225 ns VDD = 5V to 12V IL = 100mA 0 50 100 TEMPERATURE (°C) 6 Current Shutdown Threshold vs. Temperature SUPPLY CURRENT (mA) SHUTDOWN THRESHOLD (A) VDD = 5V 0.50 0.45 VDD = 12V 0.40 0.35 –50 0 50 100 TEMPERATURE (°C) 150 VDD = 5V 3 2 ALL OUTPUTS OFF 1 8 0.60 ALL OUTPUTS ON 4 0 –50 150 0.55 5 CURRENT SHUTDOWN DELAY (µS) 0.7 0.6 –50 IL = 350mA Supply Current vs. Temperature 0 50 100 TEMPERATURE (°C) 150 Supply Current vs. Temperature 7 6 ALL OUTPUTS ON VDD = 12V 3 2 ALL OUTPUTS OFF 1 0 –50 Current Shutdown Delay vs. Output Current 6 5 4 3 VDD = 5V 2 1 VDD = 12V 0 0.4 240 5 4 7 260 OUTPUT DELAY (nS) 1.6 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 Output Saturation Voltage vs. Temperature SUPPLY CURRENT (mA) SATURATION VOLTAGE (V) Typical Characteristic Curves 0.5 0.6 0.7 0.8 OUTPUT CURRENT (A) 0.9 Output Delay vs. Supply Voltage RL = 50Ω 220 200 180 TD OFF 160 140 TD ON 120 0 50 100 TEMPERATURE (°C) 7-20 150 100 5 6 7 8 9 10 11 12 13 14 15 SUPPLY VOLTAGE (V) October 1998 MIC58P01 Micrel Typical Application +12V +5V µ 0.1µ µ 22µ + 1 22 STROBE 2 21 INPUT 1 3 20 INPUT 2 4 19 INPUT 3 5 18 INPUT 4 6 INPUT 5 7 INPUT 6 8 15 INPUT 7 9 14 INPUT 8 10 13 11 12 K1 K2 K3 LATCHES K4 17 K5 16 K6 K7 K8 Relays: Guardian Electric 1725-1C-12D MIC58P01 Protected Relay Driver 7 October 1998 7-21