Revised May 2003 NC7SZ373 TinyLogic UHS D-Type Latch with 3-STATE Output General Description Features The NC7SZ373 is a single positive edge-triggered D-type CMOS Latch with 3-STATE output from Fairchild’s Ultra High Speed Series of TinyLogic in the space saving SC70 6-lead package. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a very broad VCC operating range. The device is specified to operate over the 1.65V to 5.5V range. The inputs and output are high impedance when VCC is 0V. Inputs tolerate voltages up to 7V independent of VCC operating voltage. The latch appears transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. The output tolerates voltages above VCC in the 3-STATE condition. ■ Space saving SC70 6-lead package ■ Ultra small MicroPak leadless package ■ Ultra High Speed; tPD 2.6 ns Typ into 50 pF at 5V VCC ■ High Output Drive; ±24 mA at 3V VCC ■ Broad VCC Operating Range; 1.65V to 5.5V ■ Matches the performance of LCX when operated at 3.3V VCC ■ Power down high impedance inputs/output ■ Overvoltage tolerant inputs facilitate 5V to 3V translation ■ Patented noise/EMI reduction circuitry implemented Ordering Code: Order Package Product Code Number Number Top Mark NC7SZ373P6X MAA06A Z73 6-Lead SC70, EIAJ SC88, 1.25mm Wide 3k Units on Tape and Reel NC7SZ373L6X MAC06A D4 6-Lead MicroPak, 1.0mm Wide 5k Units on Tape and Reel Package Description Supplied As TinyLogic is a registered trademark of Fairchild Semiconductor Corporation. MicroPak is a trademark of Fairchild Semiconductor Corporation. © 2003 Fairchild Semiconductor Corporation DS500157 www.fairchildsemi.com NC7SZ373 TinyLogic UHS D-Type Latch with 3-STATE Output June 1998 NC7SZ373 Logic Symbol Connection Diagrams IEEE/IEC Pin Assignments for SC70 Pin Descriptions Pin Names Description D Data Input LE Latch Enable Input OE Output Enable Input Q (Top View) Pin One Orientation Diagram Latch Output Function Table Inputs Output LE D OE Q AAA = Product Code Top Mark - see ordering code H L L L Note: Orientation of Top Mark determines Pin One location. Read the top product code mark left to right, Pin One is the lower left pin.(see diagram). H H L H L X L Qn-1 X X H Z Pad Assignments for MicroPak H = HIGH Logic Level X = Immaterial L = LOW Logic Level Z = HIGH Impedance Qn-1 = Previous state prior to HIGH-to-LOW transition of latch enable (Top Thru View) www.fairchildsemi.com 2 Supply Voltage (VCC) −0.5V to +7.0V DC Input Voltage (VIN) −0.5V to +7.0V DC Output Voltage (VOUT) −0.5V to +7.0V Recommended Operating Conditions (Note 2) Power Supply DC Input Diode Current (IIK) VIN < 0V −50 mA Operating (VCC ) 1.65V to 5.5V Data Retention 1.5V to 5.5V Input Voltage (VIN) DC Output Diode Current (IOK) 0V to 5.5V Output Voltage (VOUT) VOUT < 0V DC Output (IOUT) Source/Sink Current −50 mA Active State 0V to VCC ±50 mA 3-STATE 0V to 5.5V ±50 mA DC VCC/GND Current (ICC/IGND) Input Rise and Fall Time (tr, tf) −65°C to +150°C Storage Temperature Range (TSTG) 150°C Junction Temperature under Bias (TJ) VCC = 1.8V, 2.5V ± 0.2V 0 to 20 ns/V VCC = 3.3V ± 0.3V 0 to 10 ns/V VCC = 5.5V ± 0.5V Junction Lead Temperature (TL) 260°C (Soldering, 10 seconds) Power Dissipation (PD) @+85°C 0 to 5 ns/V −40°C to +85°C Operating Temperature (TA) Thermal Resistance (θJA) 180 mW 350° C/W Note 1: The “Absolute Maximum Ratings”: are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH Parameter HIGH Level Control Input Voltage VIL LOW Level Control Input Voltage VOH VOL TA = +25°C VCC (V) Min Typ TA = −40°C to +85°C Max 1.65 to 1.95 0.75 VCC 2.3 to 5.5 Min Max 0.75 VCC 0.7 VCC 0.25 VCC 2.3 to 5.5 0.25 VCC 0.3 VCC 0.3 VCC HIGH Level Control 1.65 1.55 1.65 1.55 Output Voltage 1.8 1.7 1.8 1.7 2.3 2.2 2.3 2.2 3.0 2.9 3.0 2.9 4.5 4.4 4.5 4.4 1.65 1.24 1.52 1.29 2.3 1.9 2.15 1.9 IOH = −8 mA 3.0 2.4 2.8 2.4 IOH = −16 mA 3.0 2.3 2.68 2.3 IOH = −24 mA 4.5 3.8 4.2 3.8 IOH = −32 mA V LOW Level Control 1.65 0.0 0.08 0.0 1.8 0.0 0.1 0.1 2.3 0.0 0.1 0.1 3.0 0.0 0.1 0.1 Input Leakage Current IOZ 3-STATE Output Leakage IOFF Power-Off Leakage Current ICC Quiescent Supply Current V IOH = −100 µA Output Voltage IIN Conditions V 0.7 VCC 1.65 to 1.95 Unit VIN = VIH IOH = −4 mA IOL = 100 µA 4.5 0.0 0.1 0.1 1.65 0.08 0.24 0.24 2.3 0.10 0.3 0.3 IOL = 8 mA 3.0 0.15 0.4 0.4 IOL = 16 mA 3.0 0.22 0.55 0.55 IOL = 24 mA 4.5 0.22 0.55 0.55 V VIN = VIL IOL = 4 mA IOL = 32 mA 0 to 5.5 ±0.1 ±1.0 µA 1.65 to 5.5 ±0.5 ±5.0 µA 0.0 1.0 10 µA VIN or VOUT = 5.5V 1.65 to 5.5 1.0 10 µA VIN = 5.5V, GND 3 0 ≤ VIN ≤ 5.5V VIN = VIL or VIH 0 ≤ VOUT ≤ 5.5V www.fairchildsemi.com NC7SZ373 Absolute Maximum Ratings(Note 1) NC7SZ373 AC Electrical Characteristics Symbol TA = +25°C VCC Parameter TA = −40°C to +85°C (V) Min Typ Max Min Max tPLH Propagation Delay 1.65 2.0 9.0 15.0 2.0 16.0 tPHL D to Q 1.8 2.0 6.1 10.0 2.0 10.5 Units Conditions 1.5 3.6 6.5 1.6 6.8 1.0 2.7 4.6 1.2 5.0 5.0 ± 0.5 1.0 2.0 3.4 1.0 3.7 3.3 ± 0.3 1.5 3.3 5.5 1.5 6.2 CL = 50 pF 5.0 ± 0.5 1.0 2.6 4.3 1.3 4.8 RD = 500Ω, S1 = Open Figures 1, 3 CL = 15 pF Figures 1, 3 CL = 15 pF ns RD = 1 MΩ S1 = Open tPLH Propagation Delay 1.65 2.0 9.0 1.45 2.0 15.0 LE to Q 1.8 2.0 6.0 9.6 2.0 10.0 2.5 ± 0.2 1.8 3.5 6.1 1.5 6.6 3.3 ± 0.3 1.3 2.6 4.4 1.0 4.8 5.0 ± 0.5 1.0 2.0 3.2 0.8 3.5 3.3 ± 0.3 1.5 3.3 5.3 1.5 6.2 CL = 50 pF 5.0 ± 0.5 1.3 2.6 4.2 1.2 4.6 RD = 500Ω, S1 = Open 1.65 2.0 9.0 13.5 2.0 14.6 1.8 2.0 6.0 9.0 2.0 9.5 2.5 ± 0.2 2.0 3.7 6.0 1.8 6.6 3.3 ± 0.3 1.5 2.8 5.0 1.4 5.3 S1 = GND for tPZH 5.0 ± 0.5 1.0 2.2 3.7 1.0 3.9 S1 = VI for tPZL 1.65 2.0 7.7 12.0 2.0 13.0 Output Enable Time tPZH tPLZ Output Disable Time tPHZ tS tH tW ns RD = 1 MΩ S1 = Open CL = 50 pF, VI = 2x VCC ns RU, RD = 500Ω CL = 50 pF, VI = 2x VCC 1.8 2.0 5.1 8.0 2.0 8.5 2.5 ± 0.2 2.0 3.5 6.0 1.8 6.3 3.3 ± 0.3 1.5 2.8 4.5 1.4 4.7 S1 = GND for tPHZ 5.0 ± 0.5 1.0 2.3 3.7 1.0 3.9 S1 = VI for tPLZ Setup Time, 2.5 ± 0.2 2.0 D to LE 3.3 ± 0.3 1.5 5.0 ± 0.5 1.5 Hold Time, 2.5 ± 0.2 1.5 D to LE 3.3 ± 0.3 1.5 5.0 ± 0.5 1.5 Pulse Width, LE Figures 1, 3 2.5 ± 0.2 3.3 ± 0.3 tPHL tPZL Figure Number 2.5 ± 0.2 3.0 3.3 ± 0.3 3.0 5.0 ± 0.5 3.0 ns RU, RD = 500Ω CL = 50 pF Figures 1, 4 Figures 1, 4 Figures 1, 4 Figures 1, 5 ns RD = 500 Ω, S1 = Open ns RD = 500 Ω, S1 = Open Figures 1, 5 ns CL = 50 pF Figures 1, 5 CL = 50 pF RD = 500 Ω, S1 = Open Capacitance (Note 3) Symbol Parameter Typ Max Units Conditions 3 pF VCC = Open, V IN = 0V or VCC Output Capacitance 4 pF VCC = 3.3V, V IN = 0V or VCC Power Dissipation Capacitance 14 (Note 4) 17 CIN Input Capacitance COUT CPD pF VCC = 3.3V VCC = 5.0V Note 3: TA = +25C, f = 1 MHz. Note 4: C PD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD ) at no output loading and operating at 50% duty cycle. (See Figure 2) CPD is related to ICCD dynamic operating current by the expression: ICCD = (CPD)(VCC)(fIN) + (ICCstatic). www.fairchildsemi.com 4 NC7SZ373 AC Loading and Waveforms CL includes load and stray capacitance D Input = AC Waveform; tr = tf = 1.8 ns; Input PRR = 1.0 MHz, tw = 500 ns D Input PRR = 10 MHz; Duty Cycle = 50% FIGURE 2. ICCD Test Circuit FIGURE 1. AC Test Circuit FIGURE 3. AC Waveforms FIGURE 4. AC Waveforms FIGURE 5. AC Waveforms 5 www.fairchildsemi.com NC7SZ373 Tape and Reel Specification TAPE FORMAT for SC70 Package Designator P6X Tape Number Cavity Section Cavities Status Cover Tape Status Leader (Start End) 125 (typ) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (typ) Empty Sealed TAPE DIMENSIONS inches (millimeters) Package SC70-6 Tape Size 8 mm www.fairchildsemi.com DIM A DIM B 0.093 0.096 (2.35) (2.45) DIM F DIM Ko 0.138 ± 0.004 0.053 ± 0.004 (3.5 ± 0.10) 6 (1.35 ± 0.10) DIM P1 DIM W 0.157 0.315 ± 0.004 (4) (8 ± 0.1) TAPE FORMAT for MicroPak Package Designator (Continued) Tape Number Cavity Section Cavities Status Status Leader (Start End) 125 (typ) Empty Sealed L6X Cover Tape Carrier 3000 Filled Sealed Trailer (Hub End) 75 (typ) Empty Sealed N W1 W2 W3 REEL DIMENSIONS inches (millimeters) Tape Size 8 mm A B C D 7.0 0.059 0.512 0.795 2.165 0.331 + 0.059/−0.000 0.567 W1 + 0.078/−0.039 (177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/−0.00) (14.40) (W1 + 2.00/−1.00) 7 www.fairchildsemi.com NC7SZ373 Tape and Reel Specification NC7SZ373 Physical Dimensions inches (millimeters) unless otherwise noted 6-Lead SC70, EIAJ SC88, 1.25mm Wide Package Number MAA06A www.fairchildsemi.com 8 NC7SZ373 TinyLogic UHS D-Type Latch with 3-STATE Output Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 6-Lead MicroPak, 1.0mm Wide Package Number MAC06A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 9 www.fairchildsemi.com