DIFFERENTIAL CLOCK D FLIP-FLOP DESCRIPTION FEATURES ■ ■ ■ ■ 475ps propagation delay 2.8GHz toggle frequency Internal 75KΩ input pull-down resistors Available in 8-pin SOIC package The SY10/100EL51 are differential clock D flip-flops with reset. These devices are functionally similar to the E151 devices, with higher performance capabilities. With propagation delays and output transition times significantly faster than the E151, the EL51 is ideally suited for those applications which require the ultimate in AC performance. The reset input is an asynchronous, level triggered signal. Data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differential clock inputs of the EL51 allow the device to be used as a negative edge triggered flip-flop. The differential input employs clamp circuitry to maintain stability under open input (pulled down to VEE) conditions. PIN CONFIGURATION/BLOCK DIAGRAM R SY10EL51 SY100EL51 1 8 VCC 7 Q R D 2 CLK 3 6 Q CLK 4 5 VEE D Flip-Flop SOIC TOP VIEW TRUTH TABLE(1) PIN NAMES Pin Function D R CLK R Reset Input Q L L Z L D Data Input H L Z H CLK Clock Input X H X L Q Data Output NOTE: 1. Z = LOW-to-HIGH transition. Rev.: E 1 Amendment: /0 Issue Date: August, 1998 SY10EL51 SY100EL51 Micrel DC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = GND TA = –40°C Symbol Parameter IIH TA = +85°C Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. — — 24 24 29 29 19 19 24 24 29 29 19 19 24 24 29 29 19 24 24 30 29 36 –5.2 –4.5 –5.5 –5.5 –4.75 –4.20 –5.2 –4.5 –5.5 –5.5 –4.75 –4.20 –5.2 –4.5 –5.5 –5.5 –4.75 –4.20 –5.2 –4.5 –5.5 –5.5 — 150 — — 150 — — 150 — — 150 Input HIGH Current Unit mA Power Supply Voltage 10EL –4.75 100EL –4.20 VEE TA = +25°C Min. Power Supply Current 10EL 100EL IEE TA = 0°C V — µA AC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = GND TA = –40°C Symbol Parameter fMAX Maximum Toggle Frequency tPLH tPHL Min. Typ. TA = 0°C TA = +25°C TA = +85°C Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit GHz 1.8 2.8 — 2.2 2.8 — 2.2 2.8 — 2.2 2.8 — Propagation Delay to Output CLK R 325 305 465 455 605 605 375 355 465 455 555 555 385 355 475 465 565 565 440 410 530 510 620 620 tS Set-up Time 150 0 — 150 0 — 150 0 — 150 0 — ps tH Hold Time 250 100 — 250 100 — 250 100 — 250 100 — ps tRR Reset Recovery 400 200 — 400 200 — 400 200 — 400 200 — ps tPW Minimum Pulse Width CLK, Reset 400 — — 400 — — 400 — — 400 — — ps VPP Minimum Input Swing(1) 150 — — 150 — — 150 — — 150 — — mV VCMR Common Mode Range(2) (2) — –0.4 (2) — –0.4 (2) — –0.4 (2) — –0.4 V tr tf Output Rise/Fall Times Q 100 (20% to 80%) 225 350 100 225 350 100 225 350 100 225 350 ps ps NOTES: 1. Minimum input swing for which AC parameters are guaranteed. 2. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPP min. and 1V. The lower end of the CMR range is dependent on VEE and is equal to VEE + 3.0V. PRODUCT ORDERING CODE Ordering Code Package Type Operating Range SY10EL51ZC Z8-1 Commercial SY10EL51ZCTR Z8-1 Commercial SY100EL51ZC Z8-1 Commercial SY100EL51ZCTR Z8-1 Commercial 2 SY10EL51 SY100EL51 Micrel 8 LEAD SOIC .150" WIDE (Z8-1) Rev. 03 3 SY10EL51 SY100EL51 Micrel MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. © 2000 Micrel Incorporated 4