FAIRCHILD FAN7024MU

www.fairchildsemi.com
FAN7024
675mW CMOS Mono Power Amplifier with
Shutdown
Features
Description
•
•
•
•
The FAN7024 is a bridge connected audio power amplifier
capable of delivering 675mW of continuous average power
to an 8Ω load with less than 0.3%(THD) from a 5V power
supply. The FAN7024 requires few external components and
operates on low supply voltage from 2.3V to 5.5V. Since the
FAN7024 does not require output coupling capacitors,
bootstrap capacitors, or snubber networks, it is ideally suited
for low power portable systems that require minimum
volume and weight. The FAN7024 features an externally
controlled gain and low power consumption shutdown mode
(0.1uA,typ.). Additional FAN7024 features include thermal
shutdown protection, unity gain stability, and external gain
set.
•
•
•
•
Continuous Average Power is 675mW (8Ω)
Low THD: Typical 0.3% @ Po=500mW
[email protected], Input Terminated : 60dB
Do Not Need Output Coupling Capacitor or Bootstrap
Capacitor
Low Shutdown Current: Typical 0.1µA
Shutdown: High Active
Click & Pop Suppression circuitry
Built in TSD Circuit
Typical Applications
• Cellular Phone
• PDA
• Portable Audio Systems
8MSOP
1
10MLP
1
BOTTOM VIEW
Internal Block Diagram
4
IN-
VO1
5
3
IN+
20KΩ
20KΩ
2
BP
100KΩ
8
VDD/2
6
VO2
VDD
100KΩ
BIAS
&
Shutdown
1
SD
7
GND
Rev. 1.0.0
©2003 Fairchild Semiconductor Corporation
FAN7024
Pin Assignments
VO2 GND VDD VO1
8
7
6
5
024
YWW
1
2
3
4
SD
BP
IN+
IN-
VO2
10
1
SD
NC
9
2
BP
VDD
8
3
GND
NC
7
4
IN+
VO1
6
5
IN-
10MLP(BOTTOM VIEW)
8MSOP
Pin Definitions
2
( ) : 10MLP
Pin Number
Pin Name
1(1)
SD
Pin Function Description
Shutdown. Hold high to shutdown, hold low for normal operation
2(2)
BP
Bypass. Tap to voltage divider for internal mid-supply bias
3(4)
IN+
Noninverting input
4(5)
IN-
Inverting input
5(6)
VO1
Power amplifier output1
6(8)
VDD
Supply voltage input
7(3)
GND
Ground connection for circuitry
8(10)
VO2
Power amplifier output2
FAN7024
Absolute Maximum Ratings (Note 2)
Parameter
Symbol
Value
Unit
Maximum Supply Voltage
VDD
6.0
V
Input Voltage
VIN
-0.3 ~ VDD+0.3
V
PD
Internally Limited
Power Dissipation
W
Storage Temperature
TSTG
-65 ~ +150
°C
Junction Temperature
TJ
150
°C
Thermal Resistance
Junction to Ambient
190
Rthja
Remark
8MSOP
°C/W
166
50
10MLP, Single-Layer
10MLP, Multi-Layer
Recommended Operating Conditions (Note 2)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Operating Supply Voltage
VDD
2.3
-
5.5
V
Operating Temperature
TOPR
-40
-
85
°C
3
FAN7024
Electrical Characteristics(Note1,2)
(RL = 8Ω, Ta = 25°C, unless otherwise specified)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
VDD = 5.0V, UNLESS OTHERWISE SPECIFIED
Quiescent Power Supply Current
IDD
VIN = 0V,IO = 0A
-
2.3
5.5
mA
Shutdown Current
ISD
VSD = VDD
-
0.1
1.0
µA
Output Offset Voltage
VOS
VIN = 0V
-
0
50
mV
Output Power
PO
THD = 1%(Max.), f = 1kHz
-
675
-
mW
THD+N
PO = 500mWrms, Av=6dB,
20Hz<f<20kHz, BW<80kHz
-
Total Harmonic Distortion+Noise
0.2
-
%
Vripple=200mVsinp-p
Power Supply Rejection Ratio
PSRR
f=217Hz(Terminated input)
-
63
-
f=1kHz(Terminated input)
-
65
-
f=217Hz(Unterminated input)
-
70
-
f=1kHz(Unterminated input)
-
70
-
dB
VDD = 3.3V, UNLESS OTHERWISE SPECIFIED
Quiescent Power Supply Current
IDD
VIN = 0V,IO = 0A
-
1.9
4
mA
Shutdown Current
ISD
VSD = VDD
-
0.1
1.0
µA
Output Offset Voltage
VOS
VIN = 0V
-
0
50
mV
Output Power
PO
THD = 1%(Max.), f = 1kHz
-
265
-
mW
THD+N
PO = 250mWrms, Av=6dB,
20Hz<f<20kHz, BW<80kHz
-
Total Harmonic Distortion+Noise
0.3
-
%
Vripple=200mVsinp-p
f=217Hz(Terminated input)
Power Supply Rejection Ratio
PSRR
-
63
-
f=1kHz(Terminated input)
-
65
-
f=217Hz(Unterminated input)
-
70
-
f=1kHz(Unterminated input)
-
70
-
IDD
VIN = 0V,IO = 0A
-
1.7
3.5
dB
VDD = 2.6V, UNLESS OTHERWISE SPECIFIED
Quiescent Power Supply Current
mA
Shutdown Current
ISD
VSD = VDD
-
0.1
1.0
µA
Output Offset Voltage
VOS
VIN = 0V
-
0
50
mV
Output Power
PO
THD = 1%(Max.), f = 1kHz
-
130
-
mW
Total Harmonic Distortion+Noise
THD+N
PO = 100mWrms, Av=6dB,
20Hz<f<20kHz, BW<80kHz
-
Power Supply Rejection Ratio
PSRR
f=217Hz(Terminated input)
-
63
-
f=1kHz(Terminated input)
-
65
-
0.4
-
%
Vripple=200mVsinp-p
dB
Note 1 : All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2 : Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended Operating
Conditions indicate conditions for which the device is functional, but do not guarantee specific performance limits. Electrical
Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific
performance limits. This assumes that the device is whitin the Operating Ratings. Specifications are not guaranteed for
parameters where no limit is given, however, the typical value is a good indication of device performance.
4
FAN7024
Typical Application Circuit
RF
20KΩ
CI
RI
4
VO1
5
20KΩ
0.39uF
IN-
3
IN+
RL
20KΩ
CB
1uF
20KΩ
2
BP
8Ω/16Ω/32Ω
100KΩ
VDD
8
VDD/2
6
VO2
VDD
CS
10uF
100KΩ
BIAS
&
Shutdown
20KΩ
1
SD
7
NC
GND
External Components Descriptions
Components
Functional Descriptions
1. RI
The inverting input resistor which sets the closed-loop gain in conjunction with Rf. This
resistor also forms a high pass filter with CI at fc=1/(2πRICI)
2. CI
The input coupling capacitor blocks the DC voltage at the amplifier’s input terminals. Also
creates a high pass with RI at fc=1/(2πRICI). Refer to the section, Proper Selection of
External Components, for an explanation of how to determine the value of CI.
3. RF
The feedback resistor which sets closed-loop gain in conjunction with RI.
4. CS
The supply bypass capacitor which provides power supply filtering. Refer to the
Application Information section for proper placement and selection of the supply
bypass capacitor.
5. CB
The bypass pin capacitor which provides half-supply filtering. Refer to the Proper
Selection of External Components section for information concerning proper placement
and selecting CB’s value.
5
FAN7024
Performance Chracteristics
10
10
VDD=5V
RL=8Ω
Av=6dB
BW < 80kHz
VDD=5V
RL=16Ω
Av=6dB
BW < 80kHz
1
THD + N (%)
THD + N (%)
1
f = 20KHz
0.1
f = 20KHz
0.1
f = 1KHz
f = 20Hz
f = 1KHz
f = 20Hz
0.01
10m
50m
100m
500m
0.01
10m
1
50m
Output Power (W)
100m
Figure 1. THD+N vs. Output Power
1
Figure 2. THD+N vs. Output Power
10
10
VDD=5V
RL=32Ω
Av=6dB
BW < 80kHz
VDD=3.3V
RL=8Ω
Av=6dB
BW < 80kHz
THD + N (%)
1
THD + N (%)
1
f = 20KHz
0.1
f = 20KHz
0.1
f = 1KHz
f = 20Hz
f = 20Hz
f = 1KHz
0.01
10m
50m
100m
500m
0.01
10m
1
50m
Output Power (W)
100m
500m
1
500m
1
Output Power (W)
Figure 4. THD+N vs. Output Power
Figure 3. THD+N vs. Output Power
10
10
VDD=3.3V
RL=16Ω
Av=6dB
BW < 80kHz
VDD=3.3V
RL=32Ω
Av=6dB
BW < 80kHz
THD + N (%)
1
THD + N (%)
1
f = 20KHz
0.1
f = 20KHz
0.1
f = 1KHz
f = 20Hz
0.01
10m
50m
100m
Output Power (W)
Figure 5. THD+N vs. Output Power
6
500m
Output Power (W)
f = 20Hz
f = 1KHz
500m
1
0.01
10m
50m
100m
Output Power (W)
Figure 6. THD+N vs. Output Power
FAN7024
Performance Characteristics (Continued)
10
10
VDD=2.6V
RL=8Ω
Av=6dB
BW < 80kHz
VDD=2.6V
RL=16Ω
Av=6dB
BW < 80kHz
THD + N (%)
1
THD + N (%)
1
f = 20KHz
f = 1KHz
0.1
f = 20KHz
0.1
f = 1KHz
f = 20Hz
f = 20Hz
0.01
10m
50m
100m
500m
0.01
10m
1
50m
Output Power (W)
100m
500m
1
Output Power (W)
Figure 7. THD+N vs. Output Power
Figure 8. THD+N vs. Output Power
10
10
VDD=2.6V
RL=32Ω
Av=6dB
BW < 80kHz
VDD=5V
RL=8Ω
Po=500mW
BW < 80kHz
1
THD + N (%)
THD + N (%)
1
f = 20KHz
0.1
0.1
f = 20Hz
f = 1KHz
0.01
0.01
10m
50m
100m
500m
20
1
50
100
200
Output Power (W)
500
1k
2k
5k
10k
20k
5k
10k
20k
Frequency (Hz)
Figure 9. THD+N vs. Output Power
Figure 10. THD+N vs. Frequency
10
10
VDD=5V
RL=16Ω
Po=250mW
BW < 80kHz
VDD=5V
RL=32Ω
Po=200mW
BW < 80kHz
1
THD + N (%)
THD + N (%)
1
0.1
0.1
0.01
0.01
20
50
100
200
500
1k
2k
Frequency (Hz)
Figure 11. THD+N vs. Frequency
5k
10k
20k
20
50
100
200
500
1k
2k
Frequency (Hz)
Figure 12. THD+N vs. Frequency
7
FAN7024
Performance Characteristics (Continued)
10
10
VDD=3.3V
RL=8Ω
Po=250mW
BW < 80kHz
VDD=3.3V
RL=16Ω
Po=200mW
BW < 80kHz
THD + N (%)
1
THD + N (%)
1
0.1
0.1
0.01
0.01
20
50
100
200
500
1k
2k
5k
10k
20k
20
50
100
200
Frequency (Hz)
Figure 13. THD+N vs. Frequency
1k
2k
5k
10k
20k
5k
10k
20k
5k
10k
20k
Figure 14. THD+N vs. Frequency
10
10
VDD=3.3V
RL=32Ω
Po=100mW
BW < 80kHz
VDD=2.6V
RL=8Ω
Po=125mW
BW < 80kHz
1
THD + N (%)
THD + N (%)
1
0.1
0.1
0.01
20
50
100
200
500
1k
2k
5k
10k
0.01
20k
20
50
100
200
Frequency (Hz)
500
1k
2k
Frequency (Hz)
Figure 15. THD+N vs. Frequency
Figure 16. THD+N vs. Frequency
10
10
VDD=2.6V
RL=16Ω
Po=100mW
BW < 80kHz
VDD=2.6V
RL=32Ω
Po=75mW
BW < 80kHz
1
THD + N (%)
THD + N (%)
1
0.1
0.01
20
0.1
50
100
200
500
1k
2k
Frequency (Hz)
Figure 17. THD+N vs. Frequency
8
500
Frequency (Hz)
5k
10k
20k
0.01
20
50
100
200
500
1k
2k
Frequency (Hz)
Figure 18. THD+N vs. Frequency
FAN7024
Performance Characteristics (Continued)
0
0
-10
-20
-30
VDD = 5V
Vripple = 250mV
RL = 8Ω
Vin = 0V (Input Open)
-10
-20
-30
PSRR (dB)
PSRR (dB)
-40
-50
-60
-70
CB = 1.0uF
-80
-40
-50
-60
-70
-90
CB = 1.0uF
-80
-100
-90
-110
-120
20
VDD = 5V
Vripple = 250mV
RL = 8Ω
Vin = 0V (Input Grounded)
Av = 6dB
50
100 200
500
1k
2k
5k
10k
20k
-100
20
50k 100k
50
100 200
500
Frequency (Hz)
Figure 19. Power Supply Rejection Ratio
-20
-30
-10
-20
-30
PSRR (dB)
PSRR (dB)
-50
-60
-70
CB = 1.0uF
-80
-90
-40
-50
-60
CB = 1.0uF
-90
50
100 200
500
1k
2k
5k
10k
20k
-100
20
50k 100k
50
100 200
500
1k
2k
5k
10k
20k
50k 100k
Frequency (Hz)
Figure 21. Power Supply Rejection Ratio
Figure 22. Power Supply Rejection Ratio
3.5
VDD = 5V
RL = 8Ω
Av = 6dB
Vin = 0V
3.0
Supply Current(mA)
Noise Floor (dB)
50k 100k
VDD = 3.3V
Vripple = 250mV
RL = 8Ω
Vin = 0V (Input Grounded)
Av = 6dB
Frequency (Hz)
10u
5u
VO1+VO2
1u
50n
10n
5n
1n
20
20k
-80
-110
100u
50u
10k
-70
-100
1m
500u
5k
0
VDD = 3.3V
Vripple = 250mV
RL = 8Ω
Vin = 0V (Input Open)
-40
-120
20
2k
Figure 20. Power Supply Rejection Ratio
0
-10
1k
Frequency (Hz)
Temp. = 25°C
2.5
2.0
1.5
1.0
0.5
50
100
200
500
1k
2k
Frequency (Hz)
Figure 23. Noise Floor
5k
10k
20k
0.0
0
1
2
3
4
5
Supply Voltage(V)
Figure 24. Supply Current vs. Supply Voltage
9
FAN7024
Performance Characteristics (Continued)
2.5
0.7
Vin = 0V
VDD=5V
Temp. = 25°C
0.6
Power Dissipation (W)
Supply Current(mA)
2.0
1.5
1.0
0.5
0.5
RL=8 Ω
RL=16 Ω
0.4
0.3
RL=32 Ω
0.2
f=1KHz
THD+N<1%
BW<80kHz
VDD=5V
0.1
0.0
0
1
2
3
4
0.0
0.0
5
0.2
0.4
Shutdown Voltage(V)
Figure 25. Supply Current vs. Shutdown Voltage
0.9
f=1KHz
RL=8 Ω
BW<80kHz
f=1KHz
RL=16 Ω
BW<80kHz
0.8
10% THD+N
0.8
0.6
0.4
0.7
10% THD+N
0.6
0.5
0.4
0.3
1% THD+N
0.2
1% THD+N
0.2
0.0
2.0
1.0
1.0
Output Power(W)
Output Power(W)
1.0
0.8
Figure 26. Power Dissipation vs. Output Power
1.4
1.2
0.6
Output Power (W)
0.1
2.5
3.0
3.5
4.0
4.5
5.0
0.0
2.0
5.5
2.5
3.0
Supply Voltage(V)
3.5
4.0
4.5
5.0
5.5
Supply Voltage(V)
Figure 27. Output Power vs. Supply Voltage
Figure 28. Output Power vs. Supply Voltage
0.6
3.0
10MLP(Multi-La ye r) : 2.5W m a x
2.5
0.4
Ambient Temperature [°C]
Output Power(W)
0.5
f=1KHz
RL=32 Ω
BW<80kHz
10% THD+N
0.3
0.2
1% THD+N
0.1
2.0
1.5
1.0
10MLP(Single -La ye r) : 753mW m a x
0.5
8MSOP : 657m W ma x
0.0
0.0
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Supply Voltage(V)
Figure 29. Output Power vs. Supply Voltage
10
5.5
0
25
50
75
100
Power Dissipation [W]
Figure 30. Power Derating Curve
125
150
FAN7024
Application Informations
Power Supply Bypassing
Proper power supply bypassing is critical for low noise and high power supply rejection. A larger capacitor may help to
increase immunity to the supply noise. However, considering economical design, attaching 10uF electrolytic capacitor or tantalum capacitor with 0.1uF ceramic capacitor to the VDD pin as close as possible is enough to get a good supply noise rejection. The capacitor location on both the bypass pin and power supply pin should be as close to the device as possible.
Connecting a 1uF capacitor, CB, between the bypass pin and ground improves the internal bias voltage’s stability and
improves the amplifier’s PSRR. The PSRR improvements increase as the bypass pin capacitor value increases. The selection
of bypass capacitors, especially CB, depends on desired PSRR requirements, click and pop performance as explained in the
section, Proper Selection of External Components, system cost, and size constraints.
Shutdown Function
In order to reduce power consumption while not in use, the FAN7024 contains a shutdown function(pin 1) to externally turn
off the amplifier’s bias circuitry. This shutdown feature turns the amplifier off when a logic high is placed on the shutdown
pin. The trigger point between a logic low and high level is typically half supply. It is best to switch between ground and supply to provide maximum device performance. By switching the shutdown pin to the VDD, the supply current of the FAN7024
will be minimized in the shutdown mode. While the device isdisabled with shutdown pin voltages less than VDD, the shutdown current may be greater than the typical value of 0.1uA. In either case, the shutdown pin should be tied to a definite voltage because leaving the pin floating may result in an unwanted state change. In many applications, a microcontroller or
microprocessor output is used to control the shutdown circuitry which provides a quick, smooth transition into shutdown.
Another solution is to use a single-pole, single-throw switch in conjunction with an external pull-up resistor.
When the switch is closed, the shutdown pin is connected to ground and the device is enabled. If the switch is open, the
FAN7024 will be disabled through the external pull-up resistor. This scheme guarantees that the shutdown pin will not float.
This prevents unwanted state changes.
Bridge Configuration Explantion
As shown in typical appliction circuit, the FAN7024 has two operational amplifiers internally, allowing for a few different
amplifier configurations. The first amplifier’s gain is externally configurable, while the second amplifier is internally fixed in
a unity-gain, inverting configuration. The close-loop gain of the first amplifier is set by selecting the ratio of RF to RI while the
second amplifier’s gain is fixed by two internal 20kΩ resistors. In the typical application circuit, the output of the first amplifier serves as the input of the second amplifier which results in both amplifiers producing signals indentical in magnitude, but
out of phase 180°. Consequently the differential gain of the device is
RF
A VD = 2 ⋅ ------RI
(1)
By driving the load differentially through outputs VO1 and VO2, an amplifier configuration commonly referred to as "bridged
mode" is established. Bridged mode operation is different from the classical single-ended amplifier configuration where one
side of its load is connected to ground.
A bridge amplfier design has a few distinct advantages over the single-ended configuration, as it provides differential drive to
the load, thus doubling output swing for a specified supply voltage. Four times the output power is possible as compared to a
single-ended amplifier under the same conditions. This increase in attainable output power assumes that the amplifier is not
current limited or clipped.
A bridgge configuration , such as the one used in FAN7024, also creates a second advantage over single-ended amplifiers.
Since the differential outputs, VO1 and VO2, are biased at half-suppy, no net DC voltage exists across the load. This eliminates
the need for an output coupling capacitor which is required in a single supply, single-ended amplifier configuration. If an output coupling capacitor is not used in a single-ended configuration, the half-supply bias across the load would result in both
increased internal IC power dissipation as well as permanant loudspeaker damage.
Adaptive Q-current Control Circuit
Among the several kinds of the analog amplifiers, a class-AB amplifier satisfies moderate total harmonic distortion(THD) and
the efficiency. In general, the output distortion is proportional to the quiescent-current(Q-current) of the output stage, but
power efficiency is inversely propotional to that. To satisfy both needs, an adaptive Q-current control(AQC) technique is proposed. The AQC circuit controls the Q-current with respect to the amount of the output distortion, whereas it is not activated
when no input signals are applied or no output distortion is sensed.
11
FAN7024
Power Dissipation
Power dissipation is a major concern when designing any power amplifier and must be thoroughly uderstood to ensure a successful design. Equation (2) states the maximum power dissipation point for a bridged amplifier operating at a given supply
voltage and driving a specified output load.
2
P DMAX
V DD
= 4 ⋅ ---------------2π 2 R L
(2)
Since the FAN7024 is driving a bridged amplifier, the internal maximum power dissipation point of the FAN7024 results from
equation (2). Even with the large internal power dissipation, the FAN7024 does not require heat sinking over a wide range of
ambient temperature. From equation (2), assuming a 5V power supply and an 8Ω load, the maximum power dissipation point
is 633mW. The maximum power dissipation point obtained from equation (2) must not be greater than the power dissipation
that results from equation (3) :
( T JMAX – T A )
P DMAX = --------------------------------R thja
(3)
For package 8MSOP(FAN7024MU), Rthja=190°C/W, TJMAX=150°C for the FAN7024.
Depending on the ambient temperature, TA, of the system surroundings, equation (3) can be used to find the maximum internal
power dissipation supported by the IC packaging. If the result of equation (2) is greater than that of equation (3), then decrease
the supply voltage, increase the load impedance, or reduce the ambient temperature, TA. If these measures are insufficient, a
heat sink can be added to reduce TA. For the typical application of a 5V power supply, with 8Ω load, the maximum ambient
temperature possible without violating the maximum junction temperature is approximately 30°C provided that device operation is around the power dissipation point. Internal power dissipation is a function of output power and thus, if typical operation is not around the maximum power dissipation point, the ambient temperature can be increased. Refer to the Performance
Characteristics curves for power dissipation information for lower output powers.
Proper Selection of External Components
Selection of external components in applications using integrated power amplifiers is critical to optimize device and system
performance. While the FAN7024 is tolerant of external component combinations, consideration to component values must be
used to maximize overall system quality. The FAN7024 is unity-gain stable and this gives a designer maximum system flexibility. The FAN7024 should be used in low gain configurations to minimize THD+N values and maximize the signal-to-noise
ratio. Low gain configurations require large input signals to obtain a given output power. Besides gain, one of the major considerations is the closed-loop bandwidth of the amplifier. The input coupling capacitor, CI, forms a first order high pass filter
which limits low frequency response. This value should be chosen based on needed frequency response for a few distinct reasons.
Selection of Capacitor Size
In the typical application, an input capacitor, CI, is required to allow the amplifier to bias the input signal to the proper DC
level for optimum operation. In this case, CI and RI form a high-pass filter with the corner frequency
1 f c = -----------------2πR I C I
(4)
The value of CI is important to consider, as it directly affects the bass(low frequency) performance of the circuit. Clearly a certain sized capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the speakers used in
portable systems, whether internal or external, have little ability to reproduce signals below 150Hz. Thus using large input
capacitor may not increase systme performance. In addition to systme cost and size, click and pop performance is affected by
the size of the input coupling capacitor, CI. A larger input coupling capacitor requires more charge to reach its quiescent DC
voltage(normally VDD/2). This charge comes from the output via feedback and is apt to create pops upon device enable. Thus,
by minimizing the capacitor size based on necessary low frequency response, turn-on pops can be minimized.
Besides minimizing the input capacitor sizes, careful consideration should be paid to the bypass capacitor value. Bypass
capacitor, CB, is the most critical component to minimize turn-on pops since it determines how fast the FAN7024 turns on.
The slower the FAN7024’s outputs ramp to their quiescent DC voltage(normally VDD/2), the smaller the turn-on pop. Thus
choosing CB equal to 1.0uF along with a small value of CI(in the range of 0.1uF to 0.39uF), should produce a clickless and
popless shutdown function. While the device will function properly, (no oscillations or motorboating), with CB equal to 0.1uF,
the device will be much more susceptible to turn-on clicks and pops. Thus, a value of CB equal to 1uF or larger is recom-
12
FAN7024
mended in all but the most cost sensitive designs.
Pop Noise Reduction
The FAN7024 contains circuitry to minimize turn-on and shutdown transients or ’clicks and pop’. For this discussion, turn-on
refers to either applying the power supply voltage or when the shutdown mode is deactivated.
To reduce the pop noise, the FAN7024 has some delay. During that delay, the input capacitor is precharged and the normal
operation is prepared. Such delay time can be controlled by choosing CB. The delay time is expressed as
CB
t delay = 2.5V ⋅ ------------- + 20ms
40uA
(5)
13
FAN7024
Mechanical Dimensions
Package
Dimensions in millimeters
8MSOP
14
FAN7024
Mechanical Dimensions
Package
Dimensions in millimeters
10MLP
BOTTOM VIEW
15
FAN7024
Ordering Information
Device
FAN7024MU
FAN7024MUX
FAN7024MPX
Package
8MSOP
Operating Temperature
Packing
-40°C ~ +85°C
Tape& Reel
Tube
10MLP
Tape& Reel
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
8/28/03 0.0m 001
Stock#DSxxxxxxxx
 2003 Fairchild Semiconductor Corporation