AD ADL5541 50 mhz to 6 ghz rf/if gain block Datasheet

50 MHz to 6 GHz
RF/IF Gain Block
ADL5541
Fixed gain of 15 dB
Operation up to 6 GHz
Input/output internally matched to 50 Ω
Integrated bias control circuit
Output IP3
44 dBm at 500 MHz
40 dBm at 900 MHz
Output 1 dB compression: 19.7 dBm at 900 MHz
Noise figure of 3.5 dB at 900 MHz
Single 5 V power supply
Small footprint 8-lead LFCSP
Pin compatible with 20 dB gain ADL5542
1 kV ESD (Class 1C)
FUNCTIONAL BLOCK DIAGRAM
RFIN 1
GND 2
INPUT
MATCH
OUTPUT
MATCH
BIAS CONTROL
GND 3
8
RFOUT
7
GND
6
GND
5
VPOS
ADL5541
CB 4
06877-001
FEATURES
Figure 1.
GENERAL DESCRIPTION
The ADL5541 is a broadband 15 dB linear amplifier that operates
at frequencies up to 6 GHz. The device can be used in a wide
variety of CATV, cellular, and instrumentation equipment.
The ADL5541 provides a gain of 15 dB, which is stable over
frequency, temperature, power supply, and from device to
device. The device is internally matched to 50 Ω with an input
return loss of 10 dB or better up to 6 GHz. Only input/output
ac coupling capacitors, power supply decoupling capacitors, and
an external inductor are required for operation.
The ADL5541 is fabricated on an InGaP HBT process and has
an ESD rating of 1 kV (Class 1C). The device is packaged in a
3 mm × 3 mm LFCSP that uses an exposed paddle for excellent
thermal impedance.
The ADL5541 consumes 90 mA on a single 5 V supply and is
fully specified for operation from −40°C to +85°C.
A fully populated RoHS-compliant evaluation board is
available.
The ADL5542 is a companion part that offers a gain of 20 dB in
a pin-compatible package.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
ADL5541
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................8
Functional Block Diagram .............................................................. 1
Basic Connections .......................................................................... 10
General Description ......................................................................... 1
Revision History ............................................................................... 2
Soldering Information and Recommended PCB Land Pattern
....................................................................................................... 10
Specifications..................................................................................... 3
Evaluation Board ............................................................................ 11
Typical Scattering Parameters..................................................... 5
Outline Dimensions ....................................................................... 12
Absolute Maximum Ratings............................................................ 6
Ordering Guide .......................................................................... 12
ESD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
REVISION HISTORY
7/07—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADL5541
SPECIFICATIONS
VPOS = 5 V and TA = 25°C, unless otherwise noted.
Table 1.
Parameter
OVERALL FUNCTION
Frequency Range
Gain (S21)
Input Return Loss (S11)
Output Return Loss (S22)
Reverse Isolation (S12)
FREQUENCY = 100 MHz
Gain
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
FREQUENCY = 500 MHz
Gain
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
FREQUENCY = 900 MHz
Gain
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
FREQUENCY = 2000 MHz
Gain
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
FREQUENCY = 2400 MHz
Gain
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
Conditions
Min
Typ
Max
Unit
6000
15.2
−12
−10
−19
MHz
dB
dB
dB
dB
15.7
19
38
3.5
dB
dBm
dBm
dB
50
900 MHz
Frequency 500 MHz to 5 GHz
Frequency 500 MHz to 5 GHz
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
14.7
±50 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Δf = 1 MHz, output power (POUT) = 3 dBm per tone
14.9
±50 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
13.9
±50 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
13.9
±50 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
Rev. 0 | Page 3 of 12
15.1
±0.15
±0.1
±0.01
19.9
44
3.5
15.2
±0.03
±0.15
±0.01
19.7
40.8
3.5
14.7
±0.03
±0.17
±0.01
16.3
39.2
3.8
14.5
±0.03
±0.19
±0.02
14.9
38.6
4.0
15.5
3.7
15.4
3.7
15.4
4.0
15.1
4.2
dB
dB
dB
dB
dBm
dBm
dB
dB
dB
dB
dB
dBm
dBm
dB
dB
dB
dB
dB
dBm
dBm
dB
dB
dB
dB
dB
dBm
dBm
dB
ADL5541
Parameter
FREQUENCY = 3500 MHz
Gain
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
FREQUENCY = 5800 MHz
Gain
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
POWER INTERFACE
Supply Voltage (VPOS)
Supply Current
vs. Temperature
Power Dissipation
Conditions
Min
Typ
Max
Unit
13.6
14.3
±0.03
±0.19
±0.02
12.1
30.7
4.2
14.9
dB
dB
dB
dB
dBm
dBm
dB
±50 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
9.1
±50 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
11.2
±0.15
±0.9
±0.02
5.8
21.9
6.0
4.5
13.5
7.0
dB
dB
dB
dB
dBm
dBm
dB
Pin VPOS
4.5
−40°C ≤ TA ≤ +85°C
VPOS = 5 V
Rev. 0 | Page 4 of 12
5
90
±12
0.5
5.5
100
V
mA
mA
W
ADL5541
TYPICAL SCATTERING PARAMETERS
VPOS = 5 V and TA = 25°C, the effects of the test fixture have been de-embedded up to the pins of the device.
Table 2.
S11
S21
S12
S22
Freq. (MHz)
Magnitude (dB)
Angle (°)
Magnitude (dB)
Angle (°)
Magnitude (dB)
Angle (°)
Magnitude (dB)
Angle (°)
50
100
500
900
1000
1500
2000
2500
3000
3500
4000
4500
5000
5500
6000
−18.11
−20.84
−27.69
−27.48
−26.87
−29.18
−17.88
−9.87
−7.92
−7.74
−10.85
−13.25
−13.97
−13.68
−4.52
−134.53
−161.29
+115.36
+101.79
+91.91
−107.74
−153.68
+169.30
+142.75
+117.57
+116.84
+136.93
+143.02
−121.08
−138.62
16.29
15.93
15.58
15.52
15.56
15.50
15.51
15.57
15.49
15.21
14.82
15.23
14.56
13.89
12.07
+166.36
+168.53
+154.53
+136.22
+131.64
+108.03
+84.72
+59.74
+35.05
+9.15
−16.13
−41.75
−68.15
−96.10
−123.56
−19.15
−18.82
−18.70
−18.70
−18.64
−18.64
−18.43
−18.32
−17.93
−18.14
−18.11
−17.54
−17.64
−17.47
−18.61
+3.84
+2.26
−13.59
−26.33
−29.43
−44.69
−60.42
−75.48
−92.29
−110.62
−125.08
−142.99
−161.24
+178.77
+157.35
−17.89
−22.24
−24.96
−22.38
−23.15
−19.35
−14.13
−9.89
−8.69
−11.02
−15.70
−7.83
−6.87
−11.66
−7.66
−134.08
−155.22
+176.64
+173.92
+174.28
+167.80
+176.19
+161.55
+138.18
+100.39
+6.37
−80.59
−112.39
−102.32
−54.40
Rev. 0 | Page 5 of 12
ADL5541
ABSOLUTE MAXIMUM RATINGS
ESD CAUTION
Table 3.
Parameter
Supply Voltage, VPOS
Input Power (re: 50 Ω)
Internal Power Dissipation (Paddle Soldered)
θJC (Junction to Paddle)
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Rating
6.5 V
10 dBm
650 mW
28.5°C/W
150°C
−40°C to +85°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 6 of 12
ADL5541
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND 2
GND 3
CB 4
PIN 1
INDICATOR
ADL5541
TOP VIEW
(Not to Scale)
8 RFOUT
7 GND
6 GND
5 VPOS
06877-002
RFIN 1
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1
2, 3, 6, 7
4
5
8
Exposed Paddle
Mnemonic
RFIN
GND
CB
VPOS
RFOUT
Description
RF Input. Requires a dc blocking capacitor.
Ground. Connect these pins to a low impedance ground plane.
Low Frequency Bypass. A 1 μF capacitor should be connected between this pin and ground.
Power Supply for Bias Controller. Connect directly to external power supply.
RF Output and Supply Voltage. DC bias is provided to this pin through an inductor that is tied to the
external power supply. RF path requires a dc blocking capacitor.
Exposed Paddle. Internally connected to GND. Solder to a low impedance ground plane.
Rev. 0 | Page 7 of 12
ADL5541
TYPICAL PERFORMANCE CHARACTERISTICS
45
45
OIP3 (+25°C)
40
OIP3 (0dBm)
35
30
25
20
P1dB
15
GAIN
10
30
OIP3 (+85°C)
OIP3 (–40°C)
25
P1dB (+85°C)
20
15
P1dB (–40°C)
10
NF
5
0
0.5 0.9 1.3 1.7 2.1 2.5 2.9 3.3 3.7 4.1 4.5 4.9 5.3 5.7
P1dB (+25°C)
5
0
0.5 0.9 1.3 1.7 2.1 2.5 2.9 3.3 3.7 4.1 4.5 4.9 5.3 5.7
FREQUENCY (GHz)
06877-006
OIP3 AND P1dB (dBm)
35
06877-003
GAIN, P1dB, OIP3, NF (dB, dBm)
40
FREQUENCY (GHz)
Figure 3. Gain, P1dB, OIP3, and Noise Figure vs. Frequency
Figure 6. OIP3 and P1dB vs. Frequency and Temperature
50
16
500MHz
45
15
900MHz
40
+85°C
2.4GHz
–40°C
OIP3 (dBm)
GAIN (dB)
14
13
2GHz
35
30
3.5GHz
25
12
20
+25°C
11
10
–5
06877-007
06877-004
10
0.5 0.9 1.3 1.7 2.1 2.5 2.9 3.3 3.7 4.1 4.5 4.9 5.3 5.7
15
–3
–1
1
3
5
7
9
11
13
15
POUT (dBm)
FREQUENCY (GHz)
Figure 4. Gain vs. Frequency and Temperature
Figure 7. OIP3 vs. Output Power (POUT) and Frequency
0
8
–5
S11
NOISE FIGURE (dB)
S11, S22, S12 (dB)
7
S22
–10
–15
–20
S12
–25
–30
6
+85°C
5
+25°C
4
–35
–40°C
–45
0
1
2
3
4
5
06877-008
06877-005
3
–40
2
6
0
FREQUENCY (GHz)
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
FREQUENCY (GHz)
Figure 5. Input Return Loss (S11), Output Return Loss (S22), and
Reverse Isolation (S12) vs. Frequency
Figure 8. Noise Figure vs. Frequency and Temperature
Rev. 0 | Page 8 of 12
6.0
ADL5541
30
25
20
20
PERCENTAGE (%)
15
10
15
10
5
06877-009
5
0
37.0
38.5
40.0
41.5
0
15.08
43.0
06877-011
PERCENTAGE (%)
25
15.11
15.14
OIP3 (dBm)
Figure 9. OIP3 Distribution at 900 MHz
15.20
15.23
15.26
Figure 11. Gain Distribution at 900 MHz
25
30
25
PERCENTAGE (%)
20
15
10
5
20
15
10
0
19.4
19.5
19.6
19.7
19.8
19.9
20.0
0
3.30
20.1
P1dB (dBm)
06877-012
5
06877-010
PERCENTAGE (%)
15.17
GAIN (dB)
3.36
3.42
3.48
3.54
3.60
3.66
3.72
NOISE FIGURE (dB)
Figure 10. P1dB Distribution at 900 MHz
Figure 12. Noise Figure Distribution at 900 MHz
Rev. 0 | Page 9 of 12
3.78
ADL5541
BASIC CONNECTIONS
4.5
The basic connections for operating the ADL5541 are shown in
Figure 13. Recommended components are listed in Table 5. The
input and output should be ac-coupled with appropriately sized
capacitors (device characterization was performed with 33 pF
capacitors). A 5 V dc bias is supplied to the amplifier via GND
(Pin 6) and through a biasing inductor connected to RFOUT
(Pin 8). The bias voltage should be decoupled using a 1 μF
capacitor, a 1.2 nF capacitor, and two 68 pF capacitors.
NOISE FIGURE (dB)
4.0
3.5
3.0
VCC
C6
1µF
C5
1.2nF
C4
68pF
2.5
ADL5541
C1
33pF
RFIN
C2
33pF
GND 7
3 GND
GND 6
4 CB
100
150
200
250
300
350
400
450
500
FREQUENCY (MHz)
GND
Figure 15. Noise Figure vs. Frequency from 50 MHz to 500 MHz
VPOS 5
VCC
C7
68pF
C3
1µF
06877-013
2 GND
2.0
50
RFOUT
1 RFIN RFOUT 8
06877-015
L1
47nH
Figure 13. Basic Connections
For operation between 50 MHz and 500 MHz, a larger biasing
choke and ac coupling capacitors are necessary (see Table 5).
Figure 14 shows a plot of the input return loss, the output
return loss and the gain with these components. At 100 MHz,
the ADL5541 achieves an OIP3 of 38 dBm (POUT = 0 dBm per
tone). The noise figure performance for operation from 50
MHz to 500 MHz is shown in Figure 15. When operating below
50 MHz, the ADL5541 exhibits gain peaking, and the input and
output match degrade significantly.
17.0
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 16 shows the recommended land pattern for the ADL5541.
To minimize thermal impedance, the exposed paddle on the
package underside should be soldered down to a ground plane
along with Pin 2, Pin 3, Pin 6, and Pin 7. If multiple ground
layers exist, they should be stitched together using vias (a
minimum of five vias is recommended). For more information
on land pattern design and layout, refer to Application Note
AN-772, A Design and Manufacturing Guide for the Lead Frame
Chip Scale Package (LFCSP).
2.03mm
PIN 1
–5
PIN 8
16.5
–10
0.5mm
GAIN (dB)
–15
15.0
14.5
–20
14.0
13.5
S22
RETURN LOSS (dB)
S21
15.5
1.78mm
1.85mm
PIN 4
PIN 5
06877-016
16.0
1.53mm
0.71mm
–25
13.0
Figure 16. Recommended Land Pattern
S11
12.0
50
100
150
200
250
300
350
400
450
–30
500
FREQUENCY (MHz)
06877-014
12.5
Figure 14. Input Return Loss (S11), Output Return Loss (S22), and
Gain (S21) vs. Frequency
Table 5. Recommended Components for Basic Connections
Frequency
50 MHz to 500 MHz
500 MHz to 6000 MHz
C1
0.1 μF
33 pF
C2
0.1 μF
33 pF
C3
1 μF
1 μF
L1
470 nH (Coilcraft 0603LS-471-NX or equivalent)
47 nH (Coilcraft 0603CS-47-NX or equivalent)
Rev. 0 | Page 10 of 12
C4
68 pF
68 pF
C5
1.2 nF
1.2 nF
C6
1 μF
1 μF
C7
68 pF
68 pF
ADL5541
EVALUATION BOARD
Figure 19 shows the schematic for the ADL5541 evaluation
board. The board is powered by a single 5 V supply.
06877-018
The components used on the board are listed in Table 6. Power
can be applied to the board through clip-on leads (VCC and
GND) or through a 2-pin header (W1).
06877-017
Figure 18. Evaluation Board Layout (Top)
Figure 17. Evaluation Board Layout (Bottom)
W1
VCC
C6
1µF
C5
1.2nF
C4
68pF
L1
47nH
RFIN
C2
33pF
RFOUT
1 RFIN RFOUT 8
2 GND
3 GND
4 CB
C3
1µF
GND 7
GND
GND 6
VPOS 5
DUT1
C7
68pF
C8
OPEN
C9
OPEN
VCC
06877-019
C1
33pF
ADL5541
Figure 19. Evaluation Board Schematic
Table 6. Evaluation Board Configuration
Component
DUT1
C1, C2
C3
C4, C5, C6, C7, C8, C9
Function
Gain block
AC coupling capacitors
Low frequency bypass capacitor
Power supply decoupling capacitors
L1
VCC and GND
W1
DC bias inductor
Clip-on terminals for power supply
2-pin header for connection of ground and supply via cable
Rev. 0 | Page 11 of 12
Default Value
ADL5541
33 pF, 0402
1 μF, 0805
C4 and C7 = 68 pF, 0603
C5 = 1.2 nF, 0603
C6 = 1 μF, 0805
C8 and C9 = open
47 nH, 0603 (Coilcraft 0603CS-47-NX or equivalent)
ADL5541
OUTLINE DIMENSIONS
3.25
3.00 SQ
2.75
0.60 MAX
5
2.95
2.75 SQ
2.55
TOP
VIEW
PIN 1
INDICATOR
8
12° MAX
0.50
0.40
0.30
0.70 MAX
0.65 TYP
1.60
1.45
1.30
EXPOSED
PAD
(BOTTOM VIEW)
4
0.90 MAX
0.85 NOM
0.50
BSC
0.60 MAX
1
PIN 1
INDICATOR
1.89
1.74
1.59
0.05 MAX
0.01 NOM
0.20 REF
061507-B
0.30
0.23
0.18
SEATING
PLANE
Figure 20. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
3 mm × 3 mm Body, Very Thin, Dual Lead
(CP-8-2)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADL5541ACPZ-R7 1
ADL5541-EVALZ1
1
Temperature Range
−40°C to +85°C
Package Description
8-Lead LFCSP_VD, Tape and Reel
Evaluation Board
Package Option
CP-8-2
Z = RoHS Compliant Part.
Visit www.analog.com/rfamps for the latest information on the Analog Devices, Inc., entire RF amplifier portfolio.
Visit www.analog.com/rf for the latest information on the Analog Devices entire RF portfolio.
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06877-0-7/07(0)
Rev. 0 | Page 12 of 12
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Q13
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