Renesas HD74HC191RPEL Synchronous up/down decade counter (single clock line) Datasheet

HD74HC190, HD74HC191
Synchronous Up/Down Decade Counter (Single Clock Line)
Synchronous Up/Down 4-bit Binary Counter (Single Clock Line)
REJ03D0587-0300
Rev.3.00
Jan 31, 2006
Description
The HD74HC190 is a 4-bit decade counter and the HD74HC191 is a 4-bit binary counter. Synchronous counting
operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each
other when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally
associated with asynchronous (ripple clock) counters.
The outputs of the four flip-flops are triggered on a low-to-high-level transition of the clock input if the Enable G input
is low. A high at Enable G inhibits counting. The direction of the count is determined by the level of the Down/ Up
(D/U) input. When D/U is low, the counter counts up and when D/U is high, it counts down.
These counters feature a fully independent clock circuit. Changes at the control inputs (D/U) that will modify the
operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter will be
dictated solely by the condition meeting the stable setup and hold times.
These counters are fully programmable; that is, the outputs may each be preset to either level by placing a low on the
load input and entering the desired data at the data inputs. The output will change to agree with the data inputs
independently of the level of the clock input. This feature allows the counters to be used as modulo-N dividers by
simply modifying the count length with the preset inputs.
Two outputs have been made available to perform the cascading function. Ripple clock and maximum/minimum count.
The latter output produces a high-level output pulse with a duration approximately equal to one complete cycle of the
clock while the count is zero (all outputs low) counting down or maximum (9 or 15) counting up. The ripple clock
output produces a low-level output pulse under those same conditions but only while the clock input is low. The
counters can be easily cascaded by feeding the ripple clock output to the enable input of the succeeding counter if
parallel clocking is used, or to the clock input if parallel enabling is used. The maximum/minimum count output can be
used to accomplish look-ahead for high-speed operation.
Features
•
•
•
•
•
•
High Speed Operation: tpd (Clock to Q) = 22 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Ordering Information
Part Name
HD74HC190P
HD74HC191P
HD74HC190FPEL
HD74HC191FPEL
HD74HC190RPEL
HD74HC191RPEL
Package Type
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
DILP-16 pin
PRDP0016AE-B
(DP-16FV)
P
—
SOP-16 pin (JEITA)
PRSP0016DH-B
(FP-16DAV)
FP
EL (2,000 pcs/reel)
SOP-16 pin (JEDEC)
PRSP0016DG-A
(FP-16DNV)
RP
EL (2,500 pcs/reel)
Note: Please consult the sales office for the above package availability.
Rev.3.00, Jan 31, 2006 page 1 of 12
HD74HC190, HD74HC191
Pin Arrangement
Inputs
16 VCC
Data B 1
QB 2
QB
QA 3
QA
B
A
15 Data A
Inputs
Outputs
CK
Ripple
Clock
Enable G 4
G
Down/Up 5
Dn/Up Max/Min
14 Clock
13 Ripple
Clock
Inputs
QC 6
QC
QD 7
QD
Load
Outputs
12 Max/Min
11 Load
Outputs
D
C
9 Data D
GND 8
(Top view)
Rev.3.00, Jan 31, 2006 page 2 of 12
10 Data C
Inputs
HD74HC190, HD74HC191
Timing Chart
HD74HC190
Illustrated below is the following sequence:
1.
2.
3.
4.
Load (preset) to BCD seven.
Count up to eight, nine (maximum), zero, one and two.
Inhibit
Count down to one, zero (minimum), nine, eight and seven.
Load
A
B
C
D
Clock
Down/Up
Enable G
QA
QB
QC
QD
Max/Min
Ripple
Clock
7
8
9
0
Count Up
Load
Rev.3.00, Jan 31, 2006 page 3 of 12
1 2
2 2 1
Inhibit
0
9
8
Count Down
7
HD74HC190, HD74HC191
Timing Chart
HD74HC191
Illustrated below is the following sequence:
1.
2.
3.
4.
Load (preset) to binary thirteen.
Count up to fourteen, fifteen (maximum), zero, one and two.
Inhibit
Count down to one, zero (minimum), fifteen, fourteen and thirteen.
Load
A
Data
Inputs
B
C
D
Clock
Down/Up
Enable G
QA
QB
QC
QD
Max/Min
Ripple
Clock
13 14
15
0
Count Up
Load
Rev.3.00, Jan 31, 2006 page 4 of 12
1
2
Inhibit
2
1
0
15
14 13
Count Down
HD74HC190, HD74HC191
Logic Diagram
HD74HC190
Clock
Ripple
Clock
Max/Min
Output
Down/Up
Input A
Enable G
CK P
CK A
INCL
Q
CK P
CK B
INCL
Q
CK P
CK C
INCL
Q
CK P
CK D
INCL
Q
QA
Q
Input B
QB
Q
Input C
QC
Q
Input D
QD
Q
Load
HD74HC191
Clock
Ripple
Clock
Max/Min
Output
Down/Up
Input A
Enable G
CK P
CK A
INCL
Q
CK P
CK B
INCL
Q
CK P
CK C
INCL
Q
CK P
CK D
INCL
Q
QA
Q
Input B
QB
Q
Input C
QC
Q
Input D
Load
Rev.3.00, Jan 31, 2006 page 5 of 12
Q
QD
HD74HC190, HD74HC191
Absolute Maximum Ratings
Item
Supply voltage range
Input / Output voltage
Input / Output diode current
Output current
VCC, GND current
Power dissipation
Storage temperature
Symbol
VCC
Vin, Vout
IIK, IOK
IO
ICC or IGND
PT
Tstg
Ratings
–0.5 to 7.0
–0.5 to VCC +0.5
±20
±25
±50
500
–65 to +150
Unit
V
V
mA
mA
mA
mW
°C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Recommended Operating Conditions
Item
Supply voltage
Input / Output voltage
Operating temperature
Symbol
VCC
VIN, VOUT
Ta
Input rise / fall time*1
Ratings
2 to 6
0 to VCC
–40 to 85
0 to 1000
0 to 500
tr, tf
Unit
V
V
°C
ns
0 to 400
Note:
Conditions
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Electrical Characteristics
Item
Input voltage
Symbol VCC (V)
VIH
VIL
Output voltage
VOH
VOL
Input current
Quiescent supply
current
Iin
ICC
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
Rev.3.00, Jan 31, 2006 page 6 of 12
Min
1.5
3.15
4.2
—
—
—
1.9
4.4
5.9
4.18
5.68
—
—
—
—
—
—
—
Ta = 25°C
Typ Max
—
—
—
—
—
—
2.0
4.5
6.0
—
—
0.0
0.0
0.0
—
—
—
—
—
—
—
0.5
1.35
1.8
—
—
—
—
—
0.1
0.1
0.1
0.26
0.26
±0.1
4.0
Ta = –40 to+85°C
Unit
Min
Max
1.5
3.15
4.2
—
—
—
1.9
4.4
5.9
4.13
5.63
—
—
—
—
—
—
—
—
—
—
0.5
1.35
1.8
—
—
—
—
—
0.1
0.1
0.1
0.33
0.33
±1.0
40
Test Conditions
V
V
V
V
Vin = VIH or VIL IOH = –20 µA
Vin = VIH or VIL
IOH = –4 mA
IOH = –5.2 mA
IOL = 20 µA
IOL = 4 mA
IOL = 5.2 mA
µA Vin = VCC or GND
µA Vin = VCC or GND, Iout = 0 µA
HD74HC190, HD74HC191
Switching Characteristics
(CL = 50 pF, Input tr = tf = 6 ns)
Item
Maximum clock
frequency
Propagation delay
time
Symbol VCC (V)
fmax
tPLH, tPHL
Pulse width
tw
Hold time
th
Setup time
tsu
Output rise/fall
time
Input capacitance
tTLH, tTHL
Cin
Ta = 25°C
Ta = –40 to +85°C
Unit
Min
Typ Max
Min
Max
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
21
—
—
18
—
—
14
—
—
22
—
—
5
25
29
265
53
45
230
46
39
120
24
20
190
38
32
250
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4
20
24
335
66
56
290
58
49
150
30
26
240
48
41
315
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
—
—
—
—
—
—
—
—
—
—
26
—
—
20
—
—
14
—
—
17
50
43
230
46
39
130
26
22
190
38
—
—
—
—
—
—
—
—
—
—
63
54
290
58
49
165
33
28
240
48
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
—
—
80
16
14
0
0
0
100
20
17
—
—
—
—
—
—
8
–
—
–6
—
—
7
—
—
5
—
5
32
—
—
—
—
—
—
—
—
—
75
15
13
10
—
100
20
17
0
0
0
125
25
21
—
—
—
—
41
—
—
—
—
—
—
—
—
—
95
19
16
10
Rev.3.00, Jan 31, 2006 page 7 of 12
Test Conditions
MHz
ns
Load to Q
ns
Data to Q
ns
Clock to RC
ns
Clock to Q
ns
Clock to max/min
ns
Down/up to RC
ns
G to RC
ns
Down/up to max/min
ns
ns
ns
ns
pF
HD74HC190, HD74HC191
Test Circuit
VCC
VCC
Output
G
Pulse Generator
Zout = 50 Ω
Load
See Function Table
Input
Ripple
Clock
Output
CL = 50 pF
Down/Up
Clock Max/Min
A
Output
CL = 50 pF
B
C
QA to QD
D
CL = 50 pF
Note : 1. CL includes probe and jig capacitance.
Waveforms
• Wavwform – 1
tr
tf
VCC
Data
50%
50%
tsu
0V
tsu
90%
Load
50%
10%
90%
50%
10%
tr
VCC
0V
tr
VOH
Output
VOL
(Corresponding to data input)
Note : 1. Input : PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns
Rev.3.00, Jan 31, 2006 page 8 of 12
HD74HC190, HD74HC191
• Waveform – 2
tf
tf
Load
VCC
90%
50%
90%
50%
10%
90%
Data
(A to D)
10%
0V
VCC
90%
50%
50%
10%
10%
tr
tPLH
tf
0V
tPHL
90%
90%
90%
(Corresponding to data input)
VOH
90%
50%
50%
50%
10% 10%
50%
10%
Output Q
tPHL
tPLH
tTLH
10%
tTLH
tTHL
VOL
tTHL
Notes : 1. Input pulse : PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns
2. Conditions on other inputs are Vcc.
• Waveform – 3
VCC
Load
0V
tr
tf
VCC
90 %
50 % 50 %
Down / Up
10 %
10 %
Clock
0V
tr
tf
90 %
50 %
10 %
VCC
90 %
50 %
10 %
0V
VCC
G
0V
t PHL
t PHL
50 %
50 %
10 %
t THL
t TLH
t PLH
90 %
90 %
90 %
Ripple / Clock
t PHL
90 %
50 % 50 %
10 %
10 %
t THL
t PLH
10 %
VOH
50 %
10 %
t TLH
50 %
10 %
t THL
Notes : 1. Input pulse : PRR ≤ 1 MHz, Zo = 50 Ω, t r ≤ 6 ns, t f ≤ 6 ns
2. All data inputs are GND.
Rev.3.00, Jan 31, 2006 page 9 of 12
VOL
t TLH
t PHL
90 %
Max / Min
VOH
VOL
HD74HC190, HD74HC191
• Waveform – 4
VCC
Load
0V
VCC
Data
(A to D)
0V
VCC
Down / Up
VCC
90%
50%
90%
Clock
0V
tr
tf
50%
10%
0V
tPHL
tPLH
90%
VOH
90%
50%
10%
Q
50%
10%
tTLH
VOL
tTHL
Notes : 1. Input pulse : PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns
2. Enable = GND
• Waveform – 5
VCC
Load
0V
VCC
Data
(A to D)
0V
VCC
0V
VCC
Down / Up
0V
VCC
Clock
50 %
50 %
t PLH
t PHL
90 %
Max / Min
50 %
10 %
t TLH
50 %
50 %
t PLH
VOH
90 % 90 %
90 %
50 %
10 %
t THL
50 %
10 %
t TLH
Notes : 1. Input pulse : PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns
2. Enable = GND
Rev.3.00, Jan 31, 2006 page 10 of 12
0V
t PHL
50 %
10 %
t THL
VOL
HD74HC190, HD74HC191
Package Dimensions
JEITA Package Code
P-DIP16-6.3x19.2-2.54
RENESAS Code
PRDP0016AE-B
MASS[Typ.]
1.05g
Previous Code
DP-16FV
D
9
E
16
1
8
b3
0.89
Z
A1
A
Reference
Symbol
L
e
Nom
c
e1
D
19.2
E
6.3
JEITA Package Code
P-SOP16-3.95x9.9-1.27
RENESAS Code
PRSP0016DG-A
*1
Previous Code
FP-16DNV
7.4
A1
0.51
b
p
0.40
b
3
0.48
0.56
1.30
c
0.19
θ
0°
e
2.29
0.25
0.31
2.54
2.79
15°
1.12
L
2.54
MASS[Typ.]
0.15g
D
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
F
16
20.32
5.06
Z
( Ni/Pd/Au plating )
Max
7.62
1
A
θ
bp
e
Dimension in Millimeters
Min
9
c
*2
Index mark
HE
E
bp
Reference
Symbol
Terminal cross section
( Ni/Pd/Au plating )
Dimension in Millimeters
Min
Nom
Max
D
9.90
10.30
E
3.95
A2
8
1
Z
e
*3
bp
x
A1
0.10
0.14
0.25
0.34
0.40
0.46
0.15
0.20
0.25
6.10
6.20
1.75
A
M
L1
bp
b1
c
A
c
A1
θ
L
y
Detail F
1
θ
0°
HE
5.80
e
1.27
x
0.25
y
0.15
0.635
Z
0.40
L
L
Rev.3.00, Jan 31, 2006 page 11 of 12
8°
1
0.60
1.08
1.27
HD74HC190, HD74HC191
JEITA Package Code
P-SOP16-5.5x10.06-1.27
RENESAS Code
PRSP0016DH-B
*1
Previous Code
FP-16DAV
MASS[Typ.]
0.24g
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
D
F
16
9
c
HE
*2
E
bp
Index mark
Reference
Symbol
Terminal cross section
( Ni/Pd/Au plating )
1
Z
*3
bp
Nom
D
10.06
E
5.50
Max
10.5
A2
8
e
Dimension in Millimeters
Min
x
A1
M
0.00
0.10
0.20
0.34
0.40
0.46
0.15
0.20
0.25
7.80
8.00
2.20
A
L1
bp
b1
c
A
c
A1
θ
y
L
Detail F
1
θ
0°
HE
7.50
1.27
e
x
0.12
y
0.15
0.80
Z
0.50
L
L
Rev.3.00, Jan 31, 2006 page 12 of 12
8°
1
0.70
1.15
0.90
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