Intersil HS9-9008RH-Q Radiation hardened cmos 8-bit flash analog-to-digital converter Datasheet

HS-9008RH
Data Sheet
August 1999
Radiation Hardened CMOS 8-Bit Flash
Analog-to-Digital Converter
The Intersil HS-9008RH is a CMOS 8-Bit Flash Converter
designed for space applications where relatively low power,
exceptional accuracy and very fast conversion speeds are a
necessity.
The HS-9008RH design differs substantially from most other
available Flash Converters as it employs fully differential
analog input sampling networks and amplifiers, as well as
regenerative, offset nulled (error correcting) comparators.
These circuit techniques improve noise performance and
render the circuit much less sensitive to process and
radiation induced device parametric shifts. Outstanding
integral and differential linearity error is achieved through the
use of a metal film resistor network which exhibits >10-bit
linearity without trim. As a result of these innovations, the
device operates with a single fixed reference supply as
opposed to the multiple, adjustable references used in
similar devices.
• Electrically Screened to SMD # 5962-96696
• QML Qualified per MIL-PRF-38535 Requirements
• Excellent Noise Rejection - Fully Differential Design
• Superior Linearity . . . . . . . . . . . . . . . . . . . . . . 0.5 LSB Typ
• Single Reference Supply
• Low Power . . . . . . . . . . . . . . . . . . . . . . . . . . . 330mW Typ
• Sampling Rate (50ns Conversion Time). . . . . . . . . 20MHz
• Total Dose Hardness . . . . . . . . . . . . . . . . . . . . . 300kRAD
• Available with QML Class V or Class Q Screening
Pinouts
HS-9008RH (SBDIP) CDIP2-T28
TOP VIEW
1/ R 1
2
VDDD 2
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
HS1-9008RH-8
-55 to 125
5962F9669601QYC
HS9-9008RH-8
-55 to 125
5962F9669601VXC
HS1-9008RH-Q
-55 to 125
5962F9669601VYC
HS9-9008RH-Q
-55 to 125
HS1-9008RH/Proto
HS1-9008RH/Proto
-55 to 125
HS9-9008RH/Proto
HS0-9008RH-Q
HS0-9008RH-Q
1
VDDD 4
25 VSSA
VSSA 5
24 VREF +
VREF - 6
23 VDDA
22 OF
21 B8 (MSB)
B2 9
20 B7
B3 10
19 B6
B4 11
18 B5
CE1 12
17 VSSA
CE2 13
16 VSSD
VDDA 14
15 VDDD
TEMP. RANGE
(oC)
5962F9669601QXC
HS9-9008RH/Proto
27 VIN
26 VSSD
(LSB) B1 8
Ordering Information
28 VSSD
CLK 3
VDDA 7
Detailed Electrical Specifications for these devices are
contained in SMD 5962-96696. A “hot-link” is provided
on our homepage for downloading.
http://www.intersil.com/spacedefense/space.htm
INTERNAL
MKT. NUMBER
3279.3
Features
This combination of features makes the HS-9008RH one of
the best 8-Bit Flash Converters available in the Commercial,
Military or Rad Hard markets.
ORDERING NUMBER
File Number
-55 to 125
25
HS-900RH (FLATPACK) CDFP3-F28
TOP VIEW
1/ R
2
1
28
VSSD
VDDD
2
27
VIN
CLK
3
26
VSSD
VDDD
4
25
VSSA
VSSA
5
24
VREF +
VREF -
6
23
VDDA
VDDA
7
22
OF
(LSB) B1
8
21
B8 (MSB)
B2
9
20
B3
10
19
B7
B6
B4
11
18
B5
CE1
12
17
VSSA
CE2
13
16
VSSD
VDDA
14
15
VDDD
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
HS-9008RH
Pin Descriptions
TRUTH TABLE
SBDIP/
FLATPACK
PACKAGE PIN
NAME
8
B1
(LSB) Output Data Bits
9
B2
Output Data Bits
10
B3
Output Data Bits
11
B4
Output Data Bits
18
B5
Output Data Bits
19
B6
Output Data Bits
20
B7
Output Data Bits
21
B8
(MSB) Output Data Bits
22
OF
Overflow
16, 26, 28
VSSD
Digital Ground
2, 4, 15
VDDD
Digital Supply
13
CE2
Three-State Output Enable
12
CE1
Three-State Output Enable
6
VREF-
27
VIN
Analog Signal In
5, 17, 25
VSSA
Analog Ground
3
CLK
Clock Input
1
1/2 R
Reference Midpoint
24
VREF+
Positive Reference Input
7, 14, 23
VDDA
Analog Supply
DESCRIPTION
Negative Reference Input
2
CE1
CE2
B1 - B8
OF
0
1
Valid
Valid
1
1
Three-State
Valid
X
0
Three-State
Three-State
HS-9008RH
Functional Diagram
CLOCK GENERATOR
CLK
01
01
L
L
L
L
DSN
cc256
01
AMPS
VIN
DSN
1/ R
2
(MSB)
DSN
cc128
DSN
DSN
cc1
VREF -
AMPS
AMPS
AMPS
AMPS
L
DYNAMIC
LATCH
DYNAMIC
LATCH
DYNAMIC
LATCH
DYNAMIC
LATCH
DYNAMIC
LATCH
L
L
OUTPUT
MFFS
OVERFLOW
OUTPUT
MFFS
BIT 8
(MSB)
OUTPUT
MFFS
BIT 7
OUTPUT
MFFS
BIT 6
OUTPUT
MFFS
BIT 5
OUTPUT
MFFS
BIT 4
OUTPUT
MFFS
BIT 3
OUTPUT
MFFS
BIT 2
OUTPUT
MFFS
BIT 1
(LSB)
MFFS
MFFS
MFFS
PLA
01
VREF+
MFFS
MFFS
CE1
CE2
VREF RESISTOR
LADDER
DIFFERENTIAL
COMPARATOR
ENCODER
THREE-STATE
OUTPUTS
3
HS-9008RH
Die Characteristics
DIE DIMENSIONS:
ASSEMBLY RELATED INFORMATION:
180 mils x 197 mils x 21 ±1 mils
Substrate Potential (Powered Up):
INTERFACE MATERIALS:
VDD
ADDITIONAL INFORMATION:
Glassivation:
Type: SiO2
Thickness: 8kÅ ±1kÅ
Worst Case Current Density:
Metal 1 - Designs using the Intersil AVLSI-1RA process
take advantage of the superior current carrying
capabilities of Moly.TiW. The current density limit
established by Intersil Reliability is 5.0 x 105 A/cm2
Metal 2 - 1.63 x 105 A/cm2
Top Metallization:
Metal 1 - Type: Moly/TiW
Thickness: 5.8kÅ ±10%
Metal 2- Type: Al/Si/Cu
Thickness: 10kÅ ±10%
Process:
Backside Finish:
AVLSI1RA
Silicon
Metallization Mask Layout
HS-9008RH
VDDD2
CLK
VDDD1
1/2R
VSSD1
VIN
VSSD2
VSSA2
VSSA1
VREF-
VREF+
VDDA2
VDDA1
B1
OF
B2
B8
B3
B7
B4
B6
CE1
4
CE2
VDDA3 VDDD3 VSSD3
VSSA3
B5
HS-9008RH
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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5
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