Panasonic MA1150-M Vertical driver lsi for video camera ccd area image sensor Datasheet

For Video Equipment
MN3111H
Vertical Driver LSI for Video Camera CCD Area Image Sensor
Applications
Video cameras
VEE
VHH
OSUB
VL2
VL1
OV1
VM13
OV3
OV2
VM24
OV4
VH
36
35
34
33
32
31
30
29
28
27
26
25
ISUB
CH1
IV1
IV3
CH2
SENSE2
VOUT–
VIN –
GND
N.C.
N.C.
C4 –
37
38
39
40
41
42
43
44
45
46
47
48
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
Features
Single 5 volt power supply
Pin Assignment
OVEE
C3+
GND
C2–
C3 –
C2+
C1+
C1–
VCC1
C4+
OVDD
HD
Overview
The MN3111H is a vertical driver LSI for a two-dimensional interline CCD image sensor. It features a built-in
power supply circuit that, in conjunction with such
external components as four booster capacitors, six voltage stabilization capacitors, eight Schottky barrier diodes,
and two Zener diodes, produces stabilized +15.0V and
–10.0V power supplies from a +5.0V input and HD pulses.
(TOP VIEW)
QFH048-P-0707
VDD
VCC2
IV2
IV4
SENSE1
VOUT+
N.C.
VIN+
CAP3
CAP2
CAP1
TEST
MN3111H
For Video Equipment
VL2
VEE
ISUB
25
VH
OV4
26
VM24
27
OV2
28
29
OV3
VM13
30
OV1
31
VL1
32
34
35
VHH
OSUB
Block Diagram
33
Tristate
driver
36
Tristate
driver
24
37
23
20
43
19
Negative voltage
monitor
Positive voltage
monitor
IV2
IV4
17
16
45
15
14
12
Negative and positive boosting voltage generator
11
OVDD
9
VCC1
10
C4+
C4 –
2
C3+
5
C3 –
C2+
6
4
48
13
C2–
SENSE1
VOUT+
44
7
GND
42
C1+
VIN –
VCC2
41
8
VOUT–
21
C1–
SENSE2
40
GND
CH2
22
3
IV3
38
1
CH1
39
OVEE
IV1
VDD
VIN+
CAP3
CAP2
CAP1
HD
TEST
For Video Equipment
MN3111H
Pin Descriptions
Pin No.
9
Symbol
VCC1
Pin Name
"H" level power supply
23
VCC2
for input block
3
GND
"L" level power supply
25
VH
"H" level power supply
35
VHH
30
VM13
"M" level power supply
45
I/O
I
Function Description
"H" level input for 5 volt circuits
I
"L" level input for 5 volt circuits
I
"H" level input for high-voltage circuits
I
"H" level input for high-voltage circuits
I
"M" level input for high-voltage circuits
I
"L" level input for high-voltage circuits
I
"L" level input for high-voltage circuits
for input block
for vertical driver
"H" level power supply
for SUB driver
27
VM24
for vertical driver
32
VL1
"L" level power supply
33
VL2
24
VDD
Driver power supply 1
I
"H" level for high-voltage circuits
for vertical driver
"L" level power supply
for SUB driver
36
VEE
Driver power supply 2
I
"L" level for high-voltage circuits
17
VIN+
Voltage input for positive
I
Voltage input pin for positive voltage
44
VIN –
13
TEST
voltage monitor
Voltage input for negative
monitor
I
voltage monitor
Test input
Voltage input pin for negative voltage
monitor
I
Test pin (Keep this pin at "H" level.)
12
HD
HD pulse input
I
HD pulse input pin
22
IV2
Transfer pulse input
I
Charge transfer pulse input pin
21
IV4
Transfer pulse input
I
Charge transfer pulse input pin
39
IV1
Transfer pulse input
I
Charge transfer pulse input pin
40
IV3
Transfer pulse input
I
Charge transfer pulse input pin
38
CH1
Charge pulse input
I
Charge readout pulse input pin
41
CH2
Charge pulse input
I
Charge readout pulse input pin
37
ISUB
SUB pulse input
I
Unwanted charge rejection pulse input pin
20
SENSE1
Positive voltage monitor
I
sensing input
42
SENSE2
Negative voltage monitor
I
sensing input
7
C1+
8
C1–
6
C2+
4
C2–
2
C3+
5
C3 –
10
C4+
48
C4 –
C1 connection
Positive voltage monitor control sensing
pin (Leave this pin open.)
Negative voltage monitor control sensing
pin (Leave this pin open.)
O
Booster block voltage charging capacitor
connection pins
C2 connection
O
Booster block voltage charging capacitor
connection pins
C3 connection
O
Booster block voltage charging capacitor
connection pins
C4 connection
O
Booster block voltage charging capacitor
connection pins
MN3111H
For Video Equipment
Pin Descriptions (continued)
Pin No.
11
Symbol
OVDD
Pin Name
Booster block positive
I/O
O
1
OVEE
19
VOUT+
43
VOUT-
26
OV4
28
OV2
29
OV3
31
OV1
34
OSUB
SUB pulse output
O
14
CAP1
Stabilizing capacitor
O
connection
voltage output
Booster block negative
output pin
O
voltage output
Positive regulated voltage
output pin
Positive voltage monitor output pin
O
Negative voltage monitor output pin
O
Binary (VM24 , V L1) transfer pulse
(Leave this pin open.)
output
Binary transfer pulse
(Leave this pin open.)
output
Binary transfer pulse
output pin
O
Binary (VM24 , VL1 ) transfer pulse
O
Tristate (VH , V M13 , V L1) transfer pulse
O
Tristate (VH , V M13 , V L1) transfer pulse
output
Tristate transfer pulse
output pin
output
Tristate transfer pulse
Booster block negative voltage
O
output
Negative regulated voltage
Function Description
Booster block positive voltage
output pin
output
output pin
Unwanted charge (VHH , VL2 ) rejection
pulse input pin
15
CAP2
16
CAP3
18
N.C.
46
47
No connection
Pins for connecting capacitors for internal
voltage stabilization circuits
—
For Video Equipment
MN3111H
Functional Description
Binary transfer pulses (vertical driver block)
IV2
OV2
IV4
H
OV4
L
L
M
Tristate transfer pulses (vertical driver block)
CH1
IV1
OV1
CH2
IV3
H
OV3
L
H
L
L
M
H
L
L
H
*1 IV1, IV2, IV3, IV4, CH1, CH2
H: VCC
L: GND
OV1, OV2, OV3, OV4
H: VH
M: VM13 , or VM24
L: VL1
Unwanted charge rejection pulses (SUB driver block)
ISUB
H
OSUB
L
L
H
*1 ISUB
H: VCC
L: GND
OSUB
H: VHH
L: VL2
MN3111H
For Video Equipment
Electrical Characteristics
(1) DC characteristics
VHH=VH=15.0V, V M13=VM24 =1.0V, GND=0.0V,
VCC1=VCC2=5.0V (=VCC ), VL1=–7.0V, VL2=–10.0V, Ta=+25˚C
Parameter
Quiescent supply current
Symbol
IDDST
Test conditions
VI=GND, V CC
Operating supply current
IDDDYN
VI=GND, V CC
Power supply output pins
Positive voltage stabilization
min
typ
max
4
Unit
mA
11
mA
OVDD , OVEE
VREG+
VI=GND, V CC , IO=7mA
14.5
15.0
15.5
V
VREG-
VI=GND, V CC , IO=–2mA
–10.5
–10.0
–9.5
V
circuit output voltage
Negative voltage stabilization
circuit output voltage
Input pins
IV1, IV2, IV3, IV4, CH1, CH2, ISUB, HD
"H" level voltage
VIH
3.5
VCC
V
"L" level voltage
VIL
GND
1.5
V
Input leak current
ILI
±1
µA
Output pins 1 (Binary output)
VI=0 to 5V
OV2, OV4
Output voltage "M" level
VOM1
VI=GND, V CC , IOM1=–1mA
0.9
VM24
V
Output voltage "L" level
VOL1
VI=GND, V CC , IOL1 =1mA
VL1
–6.9
V
Output on resistance "M" level
RONM1
IOM1=–50mA
40
Ω
Output on resistance "L" level
RONL1
IOL1 =50mA
40
Ω
14.9
VH
V
Output pins 2 (Tristate output)
OV1, OV3
Output voltage "H" level
VOH2
VI=GND, V CC , IOH2= –1mA
Output voltage "M" level
VOM2
VI=GND, V CC , IOM2=–1mA
0.9
VM13
V
Output voltage "L" level
VOL2
VI=GND, V CC , IOL2 =1mA
VL1
–6.9
V
Output on resistance "H" level
RONH2
IOH2=–50mA
50
Ω
Output on resistance "M" level
RONM2
IOM2=±50mA
40
Ω
Output on resistance "L" level
RONL2
IOL2 =50mA
40
Ω
Output pin 3 (SUB output)
OSUB
Output voltage "H" level
V OHH3
Output voltage "L" level
VOL3
Output on resistance "H" level
RONHH3
Output on resistance "L" level
RONL3
VI=GND, V CC , IOHH3=–1mA
14.9
VHH
V
VI=GND, V CC , IOL3 =1mA
VL2
–9.9
V
IONHH3=–50mA
50
Ω
IONL3=50mA
40
Ω
For Video Equipment
MN3111H
(2) AC characteristics
VHH=VH=15.0V, V M13=VM24 =1.0V, GND=0.0V,
VCC1=VCC2=5.0V (=VCC), V L1=–7.0V, VL2=–10.0V, Ta=+25˚C
Parameter
Symbol
Output pins 1 (Binary output)
OV2, OV4
Transmission delay
tPLM
No load
tPML
From "L" level to "M" level
Rise time
tTLM
Fall time
tTML
Output pins 2 (Tristate output)
Transmission delay
Transmission delay
tPLM
No load
tPML
From "L" level to "M" level
tPMH
No load
tPHM
From "M" level to "H" level
tTLM
Fall time
tTML
Rise time
tTMH
Fall time
tTHM
Output pin 3 (SUB output)
min
typ
max
Unit
100
200
ns
200
300
ns
100
200
ns
200
400
ns
200
300
ns
200
300
ns
100
200
ns
200
300
ns
OV1, OV3
Rise time
Transmission delay
Test conditions
OSUB
tPLHH
No load
tPHHL
From "L" level to "H" level
Rise time
tTLHH
Fall time
tTHHL
MN3111H
For Video Equipment
Timing Chart
1. Binary transfer pulses
63.5µs
254µs
63.5µs
2µs
H
L
M
IV2
OV2
L
2. Binary transfer pulses
H
L
M
IV4
OV4
L
3. Tristate transfer pulses
H
L
IV1
3µs
CH1
H
L
H
OV1
M
L
4. Tristate transfer pulses
IV3
H
L
CH2
H
L
OV3
H
M
L
5. SUB pulses
ISUB
H
L
H
OSUB
L
For Video Equipment
MN3111H
Application Circuit Example
Diode with VF=0.7V
C17
*1
R6
to CCD’s
øV pin
34
33
32
31
30
29
28
27
26
25
OSUB
VL2
VL1
OV1
VM13
OV3
OV2
VM24
OV4
VH
42
43
VOUT+
NC
19
18
44
SENSE2
VOUT–
VIN –
45
46
47
48
GND
NC
NC
C4 –
VIN+
CAP3
17
16
CAP2
CAP1
TEST
15
14
13
11 OVDD
5 volt input
+
D6
C5
D5
D3
D4
+
C6
C15
R4
C8
VCC1
9
10 C4+
C1–
8
+
D2
C2+
6
C1+
+
C1
D1
7
C3 –
5
GND
3
C2–
C3+
4
+
C2
+
2
OVEE
C7
D8
1
R2
+
MN3111H
+
C11
21
20
D9
IV4
SENSE1
C10
IV3
CH2
C9
40
41
R1
23
22
D7
CH1
IV1
12 HD
38
39
C12
from clock
generator
R3
35
VHH
24
C3
C13
36
VDD
VCC2
IV2
C4
D10
+
ISUB
37
+
+
VEE
from clock generator
R7
C20
< –7V >
< +15.0V >
R5
+
C14
D13
< –7.9V > to CCD’s
PT pin
D14
C18
+
+
C19
D12
*1
< –10.0V >
D11
Zener diode
C16
to CCD’s source
follower power
supply for OD,
RD, and IS pins
D15
Schottky barrier diode
The booster circuit's electrolytic capacitors must have little impedance fluctuation at low temperatures.
Note *1: These diodes must have a V F of 0.7 V. All other diodes, except the Zener diodes, must be
Schottky barrier diodes (MA723).
MN3111H
For Video Equipment
Package Dimensions (Unit: mm)
QFH048-P-0707
9.0±0.2
7.0±0.2
36
25
24
9.0±0.2
7.0±0.2
(0.75)
37
13
48
1
0.5
(0.75)
12
0.2±0.1
0.1
SEATING PLANE
0.1±0.1
0.15
+0.10
-0.05
2.9 max.
2.5±0.2
(1.0)
0.5±0.2
0 to 10°
For Video Equipment
MN3111H
Usage Notes
External components
1. This product requires eight Schottky barrier diodes and two Zener diodes.
We recommend the following components.
Schottky barrier diodes:
MA723 or equivalents
Zener diodes:
MA1150-M, MA8150-M (for positive regulated voltage) or equivalents
MA1100-M, MA8100-M (for negative regulated voltage) or equivalents
Ta=25˚C
Component
Schottky barrier diodes
Zener diodes
Model number
Typical characteristics
MA723
I F =200mA, VF ≤ 0.55V
MA1150-M
I Z=5mA, 14.6V ≤ VZ ≤ 15.35V
MA8150-M
MA1100-M
MA8100-M
I Z=5mA, 9.75V ≤ VZ ≤ 10.25V
Notes
for positive
regulated voltage
for negative
regulated voltage
The MN3111H will not operate properly if the components do not satisfy the above specifications.
2. Always use the specified components for peripheral circuits so as to ensure that OVEE and VL do not reverse
potentials when the power is turned off.
Normal operation
Faulty operation
GND
GND
0.7V or higher
VL1/VL2
VL1/VL2
OVEE
OVEE
OFF
Reversal
OFF
As the above sketch illustrates, allowing OVEE to exceed V L1 and VL2 by more than 0.7 V produces the risk
of applying a forward bias to the PN junction, turning on the parasitic transistor, and generating an
overcurrent that produces latch-up.
If this phenomenon arises, increase the size of capacitor C7 or decrease the size of capacitor C13 to increase
the OVEE time constant.
(See the sample application circuit for the locations of C7 and C13.)
Similar pages