Renesas HD74LS645P Octal bus transceivers (non-inverted 3-state outputs) Datasheet

HD74LS645
Octal Bus Transceivers (non-inverted 3-state outputs)
REJ03D0491–0200
Rev.2.00
Feb.18.2005
This octal bus transceivers is designed for asynchronous two-way communication between data buses. The devices
transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction
control (DIR) input. The enable input (G) can be used to disable the device so that the buses are effectively isolated.
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LS645P
DILP-20 pin
PRDP0020AC-B
(DP-20NEV)
P
—
PRSP0020DD-B
FP
(FP-20DAV)
Note: Please consult the sales office for the above package availability.
HD74LS645FPEL
SOP-20 pin (JEITA)
EL (2,000 pcs/reel)
Pin Arrangement
DIR
1
20
VCC
1A
2
19
Enable G
2A
3
18
1B
3A
4
17
2B
4A
5
16
3B
5A
6
15
4B
6A
7
14
5B
7A
8
13
6B
8A
9
12
7B
GND
10
11
8B
(Top view)
Function Table
Enable
G
L
L
H
Note: H; high level, L; low level, X; irrelevant
Rev.2.00, Feb.18.2005, page 1 of 6
Direction Control
DIR
Operation
L
H
X
B data to A bus
A data to B bus
Isolation
HD74LS645
Block Diagram
Enable G
Transceiver (1/8)
B
A
Direction
Control DIR
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage
VCC
7
V
Input voltage
VIN
7
V
PT
400
mW
Tstg
–65 to +150
°C
Power dissipation
Storage temperature
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item
Supply voltage
Output current
Operating temperature
Rev.2.00, Feb.18.2005, page 2 of 6
Symbol
Min
Typ
Max
Unit
VCC
4.75
5.00
5.25
V
IOH
—
—
–15
mA
IOL
—
—
24
mA
Topr
–20
25
75
°C
HD74LS645
Electrical Characteristics
(Ta = –20 to +75 °C)
Item
Input voltage
Hysteresis
Symbol
VIH
VIL
VT+ – VT–
VOH
Output voltage
VOL
IOZH
IOZL
IIH
IIL
Output current
Input
current
A or B
DIR or G
Short-circuit output current
Supply current**
II
IOS***
ICCH
ICCL
ICCZ
VIK
min.
2.0
—
0.2
2.4
2
—
—
—
—
—
—
—
—
typ.*
—
—
—
—
—
—
—
—
—
—
—
—
—
max.
—
0.8
—
—
—
0.4
0.5
20
–400
20
–400
0.1
0.1
Unit
Condition
–40
—
—
—
—
48
62
64
–225
70
90
95
mA
VCC = 4.75 V
IOH = –3 mA
VCC = 4.75 V,
V
IH = 2 V, VIL = 0.8 V
IOH = –15 mA
IOL = 12 mA
VCC = 4.75 V,
V
IOL = 24 mA
IH = 2 V, VIL = 0.8 V
VO = 2.7 V
VCC = 5.25 V,
G input = 2 V
VO = 0.4 V
VCC = 5.25 V, VI = 2.7 V
VCC = 5.25 V, VI = 0.4 V
VI = 5.5 V
VCC = 5.25 V
VI = 7 V
VCC = 5.25 V
mA
VCC = 5.25 V, Output open
V
V
V
V
µA
µA
µA
mA
Input clamp voltage
—
—
–1.5
V
VCC = 4.75 V, IIN = –18 mA
Notes: * VCC = 5 V, Ta = 25°C
** ICC is measured with all outputs open.
*** Not more than one output shall be shorted at a time. the duration of the short circuit shall not exceed one
second.
Switching Characteristics
(VCC = 5 V, Ta = 25°C)
Item
Symbol
tPLH
Propagation delay time
tPHL
tZL
Output enable time
tZH
tLZ
Output disable time
tHZ
Rev.2.00, Feb.18.2005, page 3 of 6
Inputs
A
B
A
Outputs
B
A
B
min.
—
—
—
typ.
8
8
11
max.
15
15
15
Unit
ns
ns
ns
Condition
B
G
A
A
—
—
11
31
15
40
ns
ns
CL = 45 pF,
RL = 667 Ω
G
G
B
A
—
—
31
26
40
40
ns
ns
G
G
B
A
—
—
26
15
40
25
ns
ns
G
G
B
A
—
—
15
15
25
25
ns
ns
G
B
—
15
25
ns
CL = 5 pF,
RL = 667 Ω
HD74LS645
Testing Method
Test Circuit
VCC
4.5V
RL
G
See Testing Table
Output
Input
P.G.
Zout = 50Ω
S1
1A
S3
1B
5kΩ
DIR
S2
CL
Notes:
1.
2.
3.
4.
CL includes prove and jig capacitance.
2A-2B, 3A-3B, 4A-4B, 5A-5B, 6A-6B, 7A-7B, 8A-8B, are identical to abobe load circuit.
S3 is a input-output switch.
All diodes are 1S2074(H).
Waveforms 1
tTLH
tTHL
90 %
Input A
(or B)
10 %
3V
90 %
1.3 V
1.3 V
10 %
0V
tPLH
Output B
(or A)
VOH
1.3 V
S1, S2 close
Note:
Input pulse: tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, duty cycle 50%
Rev.2.00, Feb.18.2005, page 4 of 6
tPHL
1.3 V
VOL
HD74LS645
Waveforms 2
tTHL
G
tTLH
3V
90 %
3V
90 %
1.3 V
1.3 V
10 %
0V
10 %
0V
tZL
Waveform-a
S1 close
S2 open
~
~ 4.5 V
tLZ
1.3 V
VOL
S1, S2 close
0.5 V
~ 1.5 V
~
VOL
tHZ
tZH
Waveform-b
S1 open
S2 close
0.5 V
1.3 V
~
~0V
Notes:
VOH
VOH
S1, S2 close
~ 1.5 V
~
1. Input pulse: tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, duty cycle 50%
2. Waveform a is an output by internal conditions like "L" except for the case where an output is
disabled by output control.
3. Waveform b is an output by internal conditions like "H" except for the case where an output is
disabled by output control.
Rev.2.00, Feb.18.2005, page 5 of 6
HD74LS645
Package Dimensions
JEITA Package Code
P-DIP20-6.3x24.5-2.54
RENESAS Code
PRDP0020AC-B
Previous Code
DP-20NEV
MASS[Typ.]
1.26g
D
11
E
20
1
10
b3
0.89
Z
Dimension in Millimeters
Min
Nom
Max
A
Reference
Symbol
A1
e
D
24.50
E
6.30
L
θ
c
e1
A1
0.51
b
p
0.40
b
3
JEITA Package Code
P-SOP20-5.5x12.6-1.27
RENESAS Code
PRSP0020DD-B
*1
Previous Code
FP-20DAV
0.48
0.56
c
0.19
θ
0°
e
2.29
0.25
0.31
2.54
2.79
15°
1.27
L
2.54
MASS[Typ.]
0.31g
D
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
F
20
7.00
1.30
Z
( Ni/Pd/Au plating )
25.40
5.08
A
bp
e
7.62
1
11
c
HE
*2
E
bp
Index mark
Reference
Symbol
Terminal cross section
( Ni/Pd/Au plating )
Z
e
*3
bp
Nom
Max
D
12.60
13.0
E
5.50
A2
10
1
A1
x
Dimension in Millimeters
Min
M
0.00
0.10
0.20
0.34
0.40
0.46
0.15
0.20
0.25
7.80
8.00
2.20
A
L1
bp
b1
c
A
c
1
θ
0°
HE
A1
θ
y
L
Detail F
e
8°
1.27
x
0.12
y
0.15
0.80
Z
0.50
L
L
Rev.2.00, Feb.18.2005, page 6 of 6
7.50
1
0.70
1.15
0.90
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Keep safety first in your circuit designs!
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble
may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits,
(ii) use of nonflammable material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's
application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party.
2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data,
diagrams, charts, programs, algorithms, or circuit application examples contained in these materials.
3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of
publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is
therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product
information before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor
home page (http://www.renesas.com).
4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to
evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes
no responsibility for any damage, liability or other loss resulting from the information contained herein.
5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life
is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a
product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater
use.
6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials.
7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and
cannot be imported into a country other than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited.
8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
http://www.renesas.com
RENESAS SALES OFFICES
Refer to "http://www.renesas.com/en/network" for the latest and detailed information.
Renesas Technology America, Inc.
450 Holger Way, San Jose, CA 95134-1368, U.S.A
Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501
Renesas Technology Europe Limited
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K.
Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900
Renesas Technology Hong Kong Ltd.
7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong
Tel: <852> 2265-6688, Fax: <852> 2730-6071
Renesas Technology Taiwan Co., Ltd.
10th Floor, No.99, Fushing North Road, Taipei, Taiwan
Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999
Renesas Technology (Shanghai) Co., Ltd.
Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China
Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952
Renesas Technology Singapore Pte. Ltd.
1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632
Tel: <65> 6213-0200, Fax: <65> 6278-8001
© 2005. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .2.0
Similar pages