Kersemi IRFR220TR Power mosfet Datasheet

IRFR220, IRFU220, SiHFR220, SiHFU220
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Dynamic dV/dt Rating
200
RDS(on) (Ω)
VGS = 10 V
0.80
Available
• Repetitive Avalanche Rated
Qg (Max.) (nC)
14
• Surface Mount (IRFR220/SiHFR220)
Qgs (nC)
3.0
• Straight Lead (IRFU220/SiHFU220)
Qgd (nC)
7.9
• Available in Tape and Reel
Configuration
RoHS*
COMPLIANT
• Fast Switching
Single
• Ease of Paralleling
D
• Lead (Pb)-free Available
DPAK
(TO-252)
IPAK
(TO-251)
DESCRIPTION
G
S
N-Channel MOSFET
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The DPAK is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU/SiHFU series) is for through-hole
mounting applications. Power dissipation levels up to 1.5 W
are possible in typical surcace mount applications.
ORDERING INFORMATION
Package
Lead (Pb)-free
SnPb
DPAK (TO-252)
IRFR220PbF
SiHFR220-E3
IRFR220
SiHFR220
DPAK (TO-252)
IRFR220TRLPbFa
SiHFR220TL-E3a
IRFR220TRLa
SiHFR220TLa
DPAK (TO-252)
IRFR220TRPbFa
SiHFR220T-E3a
IRFR220TRa
SiHFR220Ta
DPAK (TO-252)
IRFR220TRRPbFa
SiHFR220TR-E3a
IRFR220TRRa
SiHFR220TRa
IPAK (TO-251)
IRFU220PbF
SiHFU220-E3
IRFU220
SiHFU220
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
VGS at 10 V
TC = 25 °C
TC = 100 °C
SYMBOL
LIMIT
VDS
VGS
200
± 20
4.8
3.0
19
0.33
0.020
230
4.8
4.2
42
2.5
5.0
- 55 to + 150
260d
ID
Pulsed Drain Currenta
IDM
Linear Derating Factor
Linear Derating Factor (PCB Mount)e
Single Pulse Avalanche Energyb
EAS
Repetitive Avalanche Currenta
IAR
Repetitive Avalanche Energya
EAR
Maximum Power Dissipation
TC = 25 °C
PD
TA = 25 °C
Maximum Power Dissipation (PCB Mount)e
Peak Diode Recovery dV/dtc
dV/dt
Operating Junction and Storage Temperature Range
TJ, Tstg
Soldering Recommendations (Peak Temperature)
for 10 s
Notes
b. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
c. VDD = 50 V, starting TJ = 25 °C, L = 14 mH, RG = 25 Ω, IAS = 4.8 A (see fig. 12).
d. ISD ≤ 5.2 A, dI/dt ≤ 95 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
e. 1.6 mm from case.
f. When mounted on 1" square PCB (FR-4 or G-10 material).
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
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IRFR220, IRFU220, SiHFR220, SiHFU220
THERMAL RESISTANCE RATINGS
SYMBOL
MIN.
TYP.
MAX.
Maximum Junction-to-Ambient
PARAMETER
RthJA
-
-
110
Maximum Junction-to-Ambient
(PCB Mount)a
RthJA
-
-
50
Maximum Junction-to-Case (Drain)
RthJC
-
-
3.0
UNIT
°C/W
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
VDS
VGS = 0 V, ID = 250 µA
200
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.29
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
2.0
-
4.0
V
nA
IGSS
IDSS
RDS(on)
gfs
VGS = ± 20 V
-
-
± 100
VDS = 200 V, VGS = 0 V
-
-
25
VDS = 160 V, VGS = 0 V, TJ = 125 °C
-
-
250
-
-
0.80
Ω
1.7
-
-
S
ID = 2.9 Ab
VGS = 10 V
VDS = 50 V, ID = 2.9
Ab
µA
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
VGS = 10 V
ID = 4.8 A, VDS = 160 V,
see fig. 6 and 13b
-
260
-
-
100
-
-
30
-
-
-
14
-
-
3.0
pF
nC
Gate-Drain Charge
Qgd
-
-
7.9
Turn-On Delay Time
td(on)
-
7.2
-
-
22
-
-
19
-
-
13
-
-
4.5
-
-
7.5
-
-
-
4.8
-
-
19
-
-
1.8
V
-
150
300
ns
-
0.91
1.8
µC
Rise Time
Turn-Off Delay Time
Fall Time
tr
td(off)
VDD = 100 V, ID = 4.8 A,
RG = 18 Ω, RD = 20 Ω, see fig. 10b
tf
Internal Drain Inductance
LD
Internal Source Inductance
LS
Between lead,
6 mm (0.25") from
package and center of
die contact
ns
D
nH
G
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
A
G
S
TJ = 25 °C, IS = 4.8 A, VGS = 0 Vb
TJ = 25 °C, IF = 4.8 A, dI/dt = 100 A/µsb
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
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D
IRFR220, IRFU220, SiHFR220, SiHFU220
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFR220, IRFU220, SiHFR220, SiHFU220
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
IRFR220, IRFU220, SiHFR220, SiHFU220
RD
VDS
VGS
D.U.T.
RG
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
tr
td(off) tf
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFR220, IRFU220, SiHFR220, SiHFU220
L
Vary tp to obtain
required IAS
VDS
VDS
tp
VDD
D.U.T
RG
+
-
I AS
V DD
VDS
10 V
0.01 Ω
tp
Fig. 12a - Unclamped Inductive Test Circuit
IAS
Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
VGS
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
IRFR220, IRFU220, SiHFR220, SiHFU220
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
RG
+
• dV/dt controlled by RG
• ISD controlled by duty factor "D"
• D.U.T. - device under test
Driver gate drive
P.W.
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Body diode
VDD
Forward Drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level and 3 V drive devices
Fig. 14 - For N-Channel
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