PHILIPS BUK7107-55AIE N-channel trenchplus standard level fet Datasheet

BUK7107-55AIE
N-channel TrenchPLUS standard level FET
Rev. 02 — 10 February 2009
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. The devices include TrenchPLUS current sensing
and diodes for ElectroStatic Discharge (ESD) protection. This product has been designed
and qualified to the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
„ Electrostatically robust due to
integrated protection diodes
„ Reduced component count due to
integrated current sensor
„ Low conduction losses due to low
on-state resistance
„ Suitable for standard level gate drive
sources
„ Q101 compliant
1.3 Applications
„ Electrical Power Assisted Steering
(EPAS)
„ Variable Valve Timing for engines
1.4 Quick reference data
Table 1.
Quick reference
Symbol Parameter
Conditions
VDS
drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C
ID
drain current
VGS = 10 V; Tmb = 25 °C;
see Figure 2; see Figure 3
[1]
Min
Typ
Max
Unit
-
-
55
V
-
-
140
A
mΩ
Static characteristics
RDSon
drain-source
on-state resistance
VGS = 10 V; ID = 50 A;
Tj = 25 °C; see Figure 7;
see Figure 8
-
5.8
7
ID/Isense
ratio of drain current
to sense current
Tj > -55 °C; Tj < 175 °C;
VGS > 10 V
450
500
550
[1]
Current is limited by power dissipation chip rating.
BUK7107-55AIE
NXP Semiconductors
N-channel TrenchPLUS standard level FET
2. Pinning information
Table 2.
Pinning information
Pin
Symbol
Description
Simplified outline
1
G
gate
2
ISENSE
Sense current
3
D
drain
4
KS
Kelvin source
5
S
source
mb
D
mounting base; connected to
drain
Graphic symbol
d
mb
g
3
1 2
45
SOT426
(D2PAK)
MBL368
Isense
s
Kelvin source
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
BUK7107-55AIE
D2PAK
plastic single-ended surface-mounted package (D2PAK); 5 leads (one
lead cropped)
BUK7107-55AIE_2
Product data sheet
Version
SOT426
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 10 February 2009
2 of 14
BUK7107-55AIE
NXP Semiconductors
N-channel TrenchPLUS standard level FET
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
55
V
VGS
gate-source voltage
ID
drain current
-20
20
V
Tmb = 25 °C; VGS = 10 V; see Figure 2;
see Figure 3
[1]
-
140
A
[2]
-
75
A
Tmb = 100 °C; VGS = 10 V; see Figure 2
[2]
-
75
A
IDM
peak drain current
Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3
-
560
A
Ptot
total power dissipation
Tmb = 25 °C; see Figure 1
-
272
W
IGS(CL)
gate-source clamping
current
continuous
-
10
mA
pulsed; tp = 5 ms; δ = 0.01
-
50
mA
Tstg
storage temperature
-55
175
°C
Tj
junction temperature
-55
175
°C
VDGS
drain-gate voltage
-
55
V
[1]
-
140
A
[2]
-
75
A
-
560
A
-
460
mJ
-
6
kV
IDG = 250 µA
Source-drain diode
IS
ISM
source current
Tmb = 25 °C;
peak source current
tp ≤ 10 µs; pulsed; Tmb = 25 °C
Avalanche ruggedness
EDS(AL)S
non-repetitive
ID = 68 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 10 V;
drain-source avalanche Tj(init) = 25 °C; unclamped
energy
Electrostatic Discharge
Vesd
electrostatic discharge
voltage
HBM; C = 100 pF; R = 1.5 kΩ
[1]
Current is limited by power dissipation chip rating.
[2]
Continuous current is limited by package.
BUK7107-55AIE_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 10 February 2009
3 of 14
BUK7107-55AIE
NXP Semiconductors
N-channel TrenchPLUS standard level FET
03na19
120
03ni63
160
ID
(A)
Pder
(%)
120
80
80
40
Capped at 75A due to package
40
0
0
0
50
100
150
200
0
Tmb (°C)
Fig 2.
Fig 1.
Normalized total power dissipation as a
function of mounting base temperature
50
100
150
200
Tmb (°C)
Normalized continuous drain current as a
function of mounting base temperature
03nf55
103
ID
(A)
Limit RDSon = VDS/ID
tp = 10 μs
102
100 μs
Capped at 75 A due to package
1 ms
DC
10 ms
10
100 ms
1
1
102
10
VDS (V)
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK7107-55AIE_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 10 February 2009
4 of 14
BUK7107-55AIE
NXP Semiconductors
N-channel TrenchPLUS standard level FET
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Rth(j-a)
Rth(j-mb)
Conditions
Min
Typ
Max
Unit
thermal resistance from minimum footprint; mounted on a
junction to ambient
printed-circuit board
-
50
-
K/W
thermal resistance from see Figure 4
junction to mounting
base
-
-
0.55
K/W
03ni29
1
Zth(j-mb)
(K/W)
δ = 0.5
0.2
10−1
0.1
0.05
0.02
10−2
δ=
P
tp
T
single shot
t
tp
T
10−3
10−6
10−5
10−4
10−3
10−2
10−1
1
10
tp (s)
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK7107-55AIE_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 10 February 2009
5 of 14
BUK7107-55AIE
NXP Semiconductors
N-channel TrenchPLUS standard level FET
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
drain-source
breakdown voltage
ID = 0.25 mA; VGS = 0 V; Tj = 25 °C
55
ID = 0.25 mA; VGS = 0 V; Tj = -55 °C
50
gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 9
2
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 9
Typ
Max
Unit
-
-
V
-
-
V
3
4
V
1
-
-
V
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 9
-
-
4.4
V
VDS = 55 V; VGS = 0 V; Tj = 25 °C
-
0.1
10
µA
VDS = 55 V; VGS = 0 V; Tj = 175 °C
-
-
250
µA
20
22
-
V
IG = -1 mA; VDS = 0 V; Tj < 175 °C;
Tj > -55 °C
20
22
-
V
VDS = 0 V; VGS = 10 V; Tj = 25 °C
-
22
1000
nA
VDS = 0 V; VGS = -10 V; Tj = 25 °C
-
22
1000
nA
VDS = 0 V; VGS = 10 V; Tj = 175 °C
-
-
10
µA
VDS = 0 V; VGS = -10 V; Tj = 175 °C
-
-
10
µA
VGS = 10 V; ID = 50 A; Tj = 25 °C;
see Figure 7; see Figure 8
-
5.8
7
mΩ
VGS = 10 V; ID = 50 A; Tj = 175 °C;
see Figure 7; see Figure 8
-
-
14
mΩ
VGS > 10 V; Tj > -55 °C; Tj < 175 °C
450
500
550
ID = 25 A; VDS = 44 V; VGS = 10 V;
Tj = 25 °C; see Figure 14
-
116
-
nC
-
19
-
nC
-
50
-
nC
Static characteristics
V(BR)DSS
VGS(th)
IDSS
V(BR)GSS
IGSS
RDSon
ID/Isense
drain leakage current
gate-source breakdown IG = 1 mA; VDS = 0 V; Tj < 175 °C;
voltage
Tj > -55 °C
gate leakage current
drain-source on-state
resistance
ratio of drain current to
sense current
Dynamic characteristics
QG(tot)
total gate charge
QGS
gate-source charge
QGD
gate-drain charge
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer
capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C; see Figure 12
VDS = 30 V; RL = 1.2 Ω; VGS = 10 V;
RG(ext) = 10 Ω; Tj = 25 °C
-
4500
-
pF
-
960
-
pF
-
510
-
pF
-
36
-
ns
-
115
-
ns
turn-off delay time
-
159
-
ns
tf
fall time
-
111
-
ns
LD
internal drain
inductance
from upper edge of drain mounting base to
centre of die; Tj = 25 °C
-
2.5
-
nH
LS
internal source
inductance
from source lead to source bond pad;
Tj = 25 °C
-
7.5
-
nH
td(on)
turn-on delay time
tr
rise time
td(off)
BUK7107-55AIE_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 10 February 2009
6 of 14
BUK7107-55AIE
NXP Semiconductors
N-channel TrenchPLUS standard level FET
Table 6.
Symbol
Characteristics …continued
Parameter
Conditions
Min
Typ
Max
Unit
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C;
see Figure 16
-
0.85
1.2
V
trr
reverse recovery time
-
80
-
ns
Qr
recovered charge
IS = 20 A; dIS/dt = -100 A/µs; VGS = -10 V;
VDS = 30 V; Tj = 25 °C
-
200
-
nC
BUK7107-55AIE_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 10 February 2009
7 of 14
BUK7107-55AIE
NXP Semiconductors
N-channel TrenchPLUS standard level FET
03ni66
8
03ni65
400
10
12
ID
8.5
RDSon
(mΩ)
(A)
7
8
20
300
VGS (V) = 7.5
6
7
200
6.5
5
6
100
5.5
4
4.5
4
5
0
0
2
4
6
8
15
20
VGS (V)
10
VDS (V)
Fig 6.
Fig 5.
10
Drain-source on-state resistance as a function
of gate-source voltage; typical values
Output characteristics: drain current as a
function of drain-source voltage; typical values
03ne89
2
03ni67
12
RDSon
(mΩ)
10
a
VGS (V) = 5.5
1.5
6
6.5
8
7
1
8
10
6
4
0.5
2
0
-60
0
0
Fig 7.
20
40
60
80
60
120
Tj (°C)
180
100
120
ID (A)
Drain-source on-state resistance as a function
of drain current; typical values
Fig 8.
Normalized drain-source on-state resistance
factor as a function of junction temperature
BUK7107-55AIE_2
Product data sheet
0
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 10 February 2009
8 of 14
BUK7107-55AIE
NXP Semiconductors
N-channel TrenchPLUS standard level FET
03aa32
5
ID
(A)
VGS(th)
(V)
4
typ
max
10−3
typ
2
min
10−2
max
3
10−4
min
10−5
1
10−6
0
−60
Fig 9.
03aa35
10−1
0
60
120
180
0
2
4
Tj (°C)
Gate-source threshold voltage as a function of
junction temperature
03ni68
80
gfs
(S)
6
VGS (V)
Fig 10. Sub-threshold drain current as a function of
gate-source voltage
03ni69
8000
C
(pF)
C iss
6000
60
4000
Coss
Crss
40
2000
20
0
10-2
0
0
20
40
60
1
10 V
102
DS (V)
80 I (A) 100
D
Fig 11. Forward transconductance as a function of
drain current; typical values
Fig 12. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
BUK7107-55AIE_2
Product data sheet
10-1
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 10 February 2009
9 of 14
BUK7107-55AIE
NXP Semiconductors
N-channel TrenchPLUS standard level FET
120
ID
(A)
100
03nf25
10
VGS
03ni70
(V)
8
VDS = 14 V
6
80
VDS = 44 V
60
4
40
175 °C
2
Tj = 25 °C
20
0
0
0
0
2
4
VGS (V)
40
80
QG (nC)
120
6
Fig 13. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Fig 14. Gate-source voltage as a function of turn-on
gate charge; typical values
03nj27
600
03ni72
100
ID/Isense
IS
(A)
80
550
60
500
40
450
175 °C
20
Tj = 25 °C
400
4
8
12
16
VGS (V)
20
0
0.0
Fig 15. Drain-sense current as a function of
gate-source voltage; typical values
0.4
0.6
0.8
1.0
VSD (V)
Fig 16. Reverse diode current as a function of reverse
diode voltage; typical values
BUK7107-55AIE_2
Product data sheet
0.2
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 10 February 2009
10 of 14
BUK7107-55AIE
NXP Semiconductors
N-channel TrenchPLUS standard level FET
7. Package outline
Plastic single-ended surface-mounted package (D2PAK); 5 leads (one lead cropped)
SOT426
A
A1
E
D1
mounting
base
D
HD
3
1
2
4
e
e
Lp
5
b
e
c
e
Q
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
b
c
D
max.
D1
E
e
Lp
HD
Q
mm
4.50
4.10
1.40
1.27
0.85
0.60
0.64
0.46
11
1.60
1.20
10.30
9.70
1.70
2.90
2.10
15.80
14.80
2.60
2.20
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
05-03-09
06-03-16
SOT426
Fig 17. Package outline SOT426 (D2PAK)
BUK7107-55AIE_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 10 February 2009
11 of 14
BUK7107-55AIE
NXP Semiconductors
N-channel TrenchPLUS standard level FET
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BUK7107-55AIE_2
20090210
Product data sheet
-
BUK71_7907_55AIE-01
Modifications:
BUK71_7907_55AIE-01
(9397 750 09877)
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
•
Legal texts have been adapted to the new company name where appropriate.
Type number BUK7107-55AIE separated from data sheet BUK71_7907_55AIE-01.
20020812
Product data sheet
-
BUK7107-55AIE_2
Product data sheet
-
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 10 February 2009
12 of 14
BUK7107-55AIE
NXP Semiconductors
N-channel TrenchPLUS standard level FET
9. Legal information
9.1
Data sheet status
Document status [1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term 'short data sheet' is explained in section "Definitions".
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
9.3
Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
TrenchMOS — is a trademark of NXP B.V.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
BUK7107-55AIE_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 10 February 2009
13 of 14
BUK7107-55AIE
NXP Semiconductors
N-channel TrenchPLUS standard level FET
11. Contents
1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
9
9.1
9.2
9.3
9.4
10
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits . . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
Ordering information . . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .5
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . .12
Legal information. . . . . . . . . . . . . . . . . . . . . . . .13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Contact information. . . . . . . . . . . . . . . . . . . . . .13
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: Rev. 02 — 10 February 2009
Document identifier: BUK7107-55AIE_2
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