MITSUBISHI M64821FP

MITSUBISHI ICs (COMMUNICATION)
M64821FP
1 CHIP SYNTHESIZER & MODULATOR FOR PHS
DESCRIPTION
PIN CONFIGURATION (TOP VIEW)
The M64821FP is a semiconductor consisting of
PLL and Modulator.
Using Bi-CMOS technology, it contains dual PLL
(1.8GHz, 550MHz), a mixer for 2nd IF, transistor
for VCO , modulator and Up-convertor on chip.
FEATURES
• Built-in 2nd mixer and RSSI
• Vcc=2.7 to 3.6V
• Icc= TYP.41mA (TX.), TYP.23mA (RX.)
• Built-in high accuracy phase shifter (CR type)
• Large Output (-13dBm type)
• Attenuator for Gain Control
• Gain characteristics with temperature dependent
• Built-in transistor and Buffer for 2nd Local VCO
Outline
• Built-in Buffer for 1.6GHz VCO
48P6D
• Small Package (48pin QFP, lead pitch 0.5mm)
APPLICATION
27
26
18
25
11
6
7
to BBIC
to BBIC
(Demod.)
32
9
8
RSSI
LIMOUT
Vcc(VCO)
B
19
GND(VCO)
20
L,C
Osc. Cir.
E
21
CP2 Charge pump output
4
CPS Clock
3
GND(CP)
Q signal input
2
to CINpin
IB signal input
1
QB signal input
I signal input
from BBIC
Control signals of
PLL(from BBIC)
LE Load enable
LPF
SI Serial Data
VCO1
LOCK Lock Det. output
to 1stMIX
CP1 Charge pump output
Vcc(CP)
BLOCK DIAGRAM
LPF
Digital cordless phone (PHS)
ON/OFFControl
(from BBIC)
33
17 CTL1(MainPLL)
16 CTL2(LocalPLL)
Vcc(MOD)
GND(MOD)
5
CP1
Lock
Det
Decoder
CP2
2nd Local
VCO
15 CTL3(MOD&Up-Conv.)
14 CTL4(LIM&2ndMIX)
Ø
48
13 CTL5(X'tal osc)
GND(SUB)
PLL1
(1st Local)
38
PLL2
(2nd Local)
31 GND(LIM)
from BBIC
Prescaler
47
1/2
36
fREF2
fREF1
DECOUPLE
LIM IN
35
TX OUT
45
BPF
BPF
34 Vcc(LIM)
100KHz
300KHz
GAIN CONT
RSSI
Up
Conv.
2nd
MIX
OSC
37
to BBIC
MITSUBISHI
ELECTRIC
39
MIX2IN
40
41
GND
43
GND
42
Vcc(MIX)
10
GND(MIX)
X'tal
12
Vdd(PLL)
22
GND(PLL)
23
XBO
24
XIN
Vcc(Prescaler)
28
XOUT
Vcc(UPCON)
30
CIN
29
GND(Prescaler)
44
from VCO1
46
GND(UPCON)
to RFIC
MIX2OUT
Matching
Cir.
BPF
1stIF
1