NJRC NJU7505XD Band pass filter for audio spectrum analyzer display Datasheet

NJU7505
BAND PASS FILTER FOR AUDIO SPECTRUM ANALYZER DISPLAY
! GENERAL DESCRIPTION
The NJU7505 is a band pass filter for audio spectrum
analyzer display.
It consists of high and low band pass filters, CR oscillation
circuit, control circuit and DC transfer circuit.
Each band pass filter using the switched capacitor filter
technology operates at the shared time by 5 bands which
filter constant is switched by the internal clock.
Therefore, the audio signal shared of 5 bands is output from
a serial output terminal.
The 10 bands version using the double by the cascade
connection is prepared.
! PACKAGE OUTLINE
NJU7505XD
! FEATURES
" BPF for the audio spectrum analyzer display of the 5 bands
" 10 bands extension is available by the cascade connection
(Version of A: For 5-band application by the single)
(Version of B: For 10-band application by the double)
" BPF using the switched capacitor filter technology
" CR oscillation circuit on chip
(External clock input is available)
" Power-on initialization circuit on chip
(External reset input is available)
" C-MOS Technology
" Package Outline
DIP8, DMP8
NJU7505XM
! PIN CONFIGURATION
OSC1
1
5
VDD
OSC2
2
6
AIN
RST/CLKO
3
7
AOUT
RD
4
8
VSS
! BLOCK DIAGRAM
Audi o Signal
RST/CLKO
Control Signa
RD
Crock Signal
OSC1
OSC2
f OSC
f OSC/16
f OSC/4
iH
BPF
High Band
AIN
VDD
Power-on
Initialize
Cont rol Circuit
OSC
Input BUF
iL
RL
RH
ΦL
High Band
Peak Detector
Lev el Shif ter
&
Out Put BUF
LPF
VDD
ΦH
BPF
Low Band
AOUT
Low Band
Peak Detector
AGND
VSS
Ver.2004-06-04
VSS
-1-
NJU7505
! TERMINAL DESCRIPTION
NO.
SYMBOL
FUNCTION
1
OSC1
External Resistor connecting terminal.
2
OSC2
External Resistor connecting terminal or External clock input terminal.
Both as Reset input terminal
3
RST/CLKO
and the clock of (2/3)*fosc output terminal.
4
RD
Trigger signal for reading-out the AOUT of each band output terminal.
5
VSS
GND
0V
VDD
8
Positive power supply +5.0 V
6
AOUT
Peak voltage of each band output terminal.
7
AIN
Audio signal input terminal.
! VERSION LINEUP AND PEAK FREQUENCY
The NJU7505 prepares two version of A and B which are different of the peak frequency of each bands.
The version of A is recommended for the 5 bands application using the single and the version of B is
recommended for the 10 bands using the double by the cascade connection, however, the version of A can be
used for the 10 bands using the double and the version of B can be used for the 5 bands using the single.
Peak Frequency ( Hz )
Using the single
Using the double
Version of A
Version of B
Version of A
Version of B
12k
18k
12k
18k
8k
12k
3.5k
5.3k
3.5k
5.3k
2.3k
3.5k
1k
1.5k
1k
1.5k
670
1k
250
375
250
375
165
250
63
95
63
95
*
42
63
Band
f1a
f1b
f2a
f2b
f3a
f3b
f4a
f4b
f5a
f5b
Note 1) The bands of f1a, f2a, ... f5a correspond to the master side and the bands of f1b, f2b, ... f5b correspond
to the slave side at the cascade connection of the double.
Note 2) It may not be output along the expectation at the peak frequency of * marking, since the sampling time is
not enough.
The example of using the single
OSC1
AOUT
The example of using the double
f 1a to f5a
-2-
OSC2
AOUT
f 1a to f5a
NJU7505
Master
NJU7505
f OSC
OSC1
f OSC
RST/CLKO
OSC1
AOUT
f 1b to f5b
NJU7505
Slave
2/3 * f OSC
OSC2
Ver.2004-06-04
NJU7505
! FUNCTIONAL DESCRIPTION
# Interface to external controller
The example of the interface between the NJU7505 and the external controller is shown below;
(1) Example of the interface to the external controller ( Using the single )
After the RST signal from the external controller is input and then the internal circuit is initialized, each band data
is output as shown below timing chart;
Since the RD signal is output before each band is switched, the external controller is to count the number of the
RD signal and is to recognize the status of the band and is to read the output data from the AOUT terminal through
the external A/D converter.
The output type of the external controller connected to the RST/CLKO terminal as the RST input should be the
N-channel and open-drain type or the diode should be connected between the RST/CLKO terminal and the
output terminal of the external controller, so that the voltage of the RST/CLKO terminal is not gotten over the VSS
level.
A IN
OSC1
NJU7505
OSC2
fOSC
A OUT
A/D
CONVERTER
V SS
RD
RST/CLKO
µ COM
3*214 / fOSC
A OUT
f1
f2
f1
f3
f2
f5
f3
f1
f5
f2
f1
f4
f2
f3
f4
f1
f3
f1
f2
f3
f2
f1
RD
RST
248 / fosc
Since the RD signal is output before 248/fOSC of each
band switched, the output data should be read out
within the limited time as shown right;
A OUT
RD
8 / fosc
Available Period
of Read-out
A OUT
If the RST signal which pulse width is more than
4/fOSC is input, the internal circuit is initialized and the
data of f1 band is output from the AOUT terminal after
52/fOSC of the rise edge of the RST signal.
Ver.2004-06-04
fn
f1
4/ fosc[MIN] 52/ f osc
RST
-3-
NJU7505
(2) Example of the interface to the external controller (Using the double)
The 10 bands application is available using the cascade connection of the double NJU7505 as shown blow.
After the RST signals from the external controller are input to each of the master and the slave of the NJU7505
and then each internal circuit is initialized, each band data is output as shown below timing chart;
Since the RD signals are output from the master and the slave before each band is switched, the external
controller is to count the number of the RD signals and is to recognize the status of the band and is to read the
output data from each AOUT terminals through the external A/D converter.
The master clock for the slave is provided with the output signal from the RST/CLKO terminal of the master. The
master clock for the slave is stopped when the RST signal is input from the external controller to the master, so
that the RST/CLKO terminal of the master is used both as the RST input of the master and the master clock for
the slave.
The output type of the external controller connected to each RST/CLKO terminal as the RST input should be the
N-channel and open-drain type or the diode's should be connected between each RST/CLKO terminal and the
output terminals of the external controller, so that the voltage of each RST/CLKO terminal is not gotten over the
VSS level.
AIN
AIN
OSC1
OSC2
AOUT
A/D
CONVERTER
NJU7505
Slave
AOUT
NJU7505 OSC2
Master
VSS
RST/CLKO
RD
RST/CLKO
RD
µ COM
3*214 / fOSC
Master
A OUT
f1
f2
f1
f5
f3
f2
f3
f1
f5
f2
f1
f4
f2
f3
f3
f4
f1
f3
f2
f1
f2
f2
f1
f3
f1
RD
RST
Slave
A OUT
3*214 / fOSC * 3/2
f2
f1
f1
f2
f3
f5
f3
f1
f5
f2
f1
f4
f2
f3
f4
f1
f3
f2
f1
RD
RST
-4-
Ver.2004-06-04
NJU7505
248 / fosc
(248/ fosc*3/2)
Since each RD signal of the master and the slave is
output before 248/fOSC (248/fOSC*3/2) of each band
switched, the output data should be read out within the
limited time as shown right;
* The "( )" is corresponded to the slave.
If the RST signal which pulse width is more than
4/fOSC is input to the master, the internal circuit is
initialized and the data of f1 band is output from the
AOUT terminal of the master after 52/fOSC of the rise
edge of the RST signal.
The RST signal for the slave should be set to "L" level
while the RST signal for the master is "L" level and
should keep "L" level more than 6/fOSC. So the slave
operates as same as the master after 78/fOSC of the
rise edge of the RST signal for the slave.
Ver.2004-06-04
A OUT
8 / fosc
(8/ fosc*3/2)
RD
Available Period
of Read-out
A OUT
(Master)
fn
4/fosc[MIN]
f1
52/ fsoc
RST
(Master)
RST
(Slave)
6/fosc[MIN]
A OUT
(Slave)
f n’
78/ fsoc
f 1’
-5-
NJU7505
! ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATINGS
Supply Voltage
VDD
-0.3 to +7
VIN
-0.3 to VDD+0.3
Input Voltage
VIO
-0.3 to 0
Output Voltage
VOUT
-0.3 to VDD+0.3
Power Dissipation
PD
500(DIP), 300(DMP)
Operating
Topr
-30 to 85
Temperature
Storage Temperature
Tstg
-55 to 125
UNIT
V
V
(Ta=25°C)
NOTE
7
5, 8
V
mW
°C
°C
Note 3) If the IC are used on condition above the absolute maximum ratings, the IC may be destroyed. Using the
IC within electric characteristic conditions will cause malfunction and poor reliability.
Note 4) All voltage values are specified as VSS = 0V.
Note 5) When the voltage of the RST/CLKO terminal is gotten over the VSS level, the diode should be connected
between the RST/CLKO terminal and the external.
Note 6) Decoupling capacitor should be connected between the VDD terminal and the VSS due to the stabilization
of the operation.
Note 7) Applied to the AIN or the OSC2 terminals.
Note 8) Applied to the RST/CLKO terminal.
! ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS
PARAMETER
Operating Voltage
Operating Current
MIN
TYP
MAX UNIT NOTE
4.5
5.0
6.0
V
VDD TERMINAL
6.0
12
mA
VIL1=0V
-0.1
-0.05 -0.033
mA
Input Leak Current 1
AIN TERMINAL
0.1
VIH1=5V 0.033 0.05
Input Leak Current 2
RST/CLKO TERMINAL VIH2=0V
-0.2
-0.1
-0.05
mA
External Clock
0
1.5
OSC2 TERMINAL
V
Input Voltage
3.5
5.0
IOL1=100µA
0
0.5
V
Output Voltage 1
RD TERMINAL
4.5
5.0
IOH1=-100µA
RST/CLKO
IOL1=100µA
0
0.5
Output Voltage 2
V
TERMINAL
4.25
4.5
4.75
IOH1=-5µA
Output Offset Voltage
AOUT TERMINAL
AIN:OPEN
300
mV
26.0
dB
9,10,11
AOUT TERMINAL Sine Wave Input
BPF Output Voltage
VOUT
VIN=200mVp-p
fIN=f1 to f5
3.5
V
9,10
Note 9) This specification is tested on condition of fCLK=400KHz (The external clock is input to the OSC2 terminal
through the capacitor for AC coupling.
Note 10) Each input frequency of f1 to f5 is referred to the table of the " VERSION LINEUP AND PEAK
FREQUENCY ".
Note 11) This specification is calculated from " VOUT / VIN ".
-6-
SYMBOL
VDD
IDD
IIL1
IIH1
IIL2
VILC
VIHC
VOL1
VOH1
VOL2
VOH2
VOS
(VDD=5V, VSS= 0V, Ta=25°C)
CONDITITONS
Ver.2004-06-04
NJU7505
! AC CHARACTERISTICS
( VDD=4.5 to 6.0V, VSS=0V, Ta=25°C)
PARAMETER
Oscillation Clock Freq
SYMBOL
CONDITIONS
fOSC
RST/CLKO Terminal
VDD=5V
RST/CLKO Terminal
VILC=0V
External Clock Frequency
fCLK
VIHC=VDD
MIN
360
tPWRD
MAX
440
UNIT NOTE
KHz
12
400
800
KHz
13
µs
14
µs
15
nA
15
8/fOSC
8/fCLK
12/fOS
Master
RD Pulse Width
TYP
400
RD Terminal
Slave
C
12/fCLK
Master
RST Pulse Width
tPWRS
RST/CLKO Terminal
Slave
RST Rise/Fall Time
tr, tf
RST/CLKO Terminal
Note 12) The example for the CR Oscillation
OSC1
4/fOSC
4/fCLK
6/fOSC
6/fCLK
100
RT: 13KΩ(±2%)
CT: 220pF(±5%)
RT
OSC2
CT
*The oscillation clock frequency is calculated from the
output frequency of the RST/CLKO terminal by 3/2.
VSS
Note 13) The example for the external clock input
Open
Oscillator
OSC1
The input signal for the OSC2 terminal should be the
condition of the pulse of DUTY50%±10%.
* The oscillation clock frequency is calculated
from the output frequency of the RST/CLKO terminal
by 3/2.
OSC2
Note 14) The output wave form of the RD terminal.
0.8VDD
0.8VDD
tPWRD
Note 15) The input wave form of the RST terminal.
tf
Ver.2004-06-04
TPWRS
tr
0.8VDD
0.8V DD
0.2VDD
0.2VDD
-7-
NJU7505
! APPLICATION CIRCUIT (1)
AUDIO IN
AUDIO IN
Lch
Rch
AUDIO OUT
AUDIO OUT
RESONANCE
CIRCUIT
RESONANCE
CIRCUIT
NJU7305
*1
ATT.
*2
A IN
OSC1
13K
OSC2
NJU7505
220pF
VSS
RD
RST/CLKO
AOUT
*3
A/D
µCOM
DISPLAY DRIVER
DISPLAY
*1 ) The capacitor for AC coupling connected to the AIN terminal should be needed.
*2 ) Connecting the attenuator, the dynamic range of the display can be changed.
*3 ) When the voltage of the output terminal of the µCOM gets over the VSS level, the diode should be connected between
the RST/CLKO terminal and the output of the µCOM.
-8-
Ver.2004-06-04
NJU7505
! APPLICATION CIRCUIT (2)
AUDIO IN
AUDIO IN
Lch
Rch
AUDIO OUT
AUDIO OUT
RESONANCE
CIRCUIT
RESONANCE
CIRCUIT
NJU7305
*1
ATT.
A IN
ATT.
*2
*2
A IN
OSC1
13K
NJU7505
OSC2
NJU7505
OSC2
220pF
VSS
RD
RST/CLKO
AOUT
RST/CLKO
*3
*3
A/D
RD
AOUT
A/D
µCOM
DISPLAY DRIVER
DISPLAY
*1 ) The capacitor for AC coupling connected to the AIN terminal should be needed.
*2 ) Connecting the attenuator, the dynamic range of the display can be changed.
*3 ) When the voltage of the output terminal of the µCOM gets over the VSS level,
the diode should be connected between the RST/CLKO terminal and the output
of the µCOM.
Ver.2004-06-04
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
-9-
Similar pages