IRF IRF2903ZPBF Advanced process technology Datasheet

PD -96097A
IRF2903ZPbF
HEXFET® Power MOSFET
Features
l
l
l
l
l
l
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
D
VDSS = 30V
RDS(on) = 2.4mΩ
G
ID = 75A
S
Description
This HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These features combine
to make this design an extremely efficient and
reliable device for use in a wide variety of
applications.
D
G
D
S
TO-220AB
IRF2903ZPbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
EAS (Thermally limited)
EAS (Tested )
IAR
EAR
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Package Limited)
260
180
75
1020
290
2.0
± 20
290
820
See Fig.12a, 12b, 15, 16
c
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
d
c
g
i
Thermal Resistance
RθJC
RθCS
RθJA
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j
Parameter
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
ij
i
h
Units
A
W
W/°C
V
mJ
A
mJ
-55 to + 175
°C
300 (1.6mm from case )
10 lbf in (1.1N m)
y
y
Typ.
Max.
Units
–––
0.50
–––
0.51
–––
62
°C/W
1
07/22/10
IRF2903ZPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
V(BR)DSS
∆V(BR)DSS/∆TJ
RDS(on)
VGS(th)
gfs
IDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
IGSS
Min. Typ. Max. Units
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LD
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
30
–––
–––
2.0
120
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
0.021
1.9
–––
–––
–––
–––
–––
–––
160
51
58
24
100
48
37
4.5
–––
–––
2.4
4.0
–––
20
250
200
-200
240
–––
–––
–––
–––
–––
–––
–––
LS
Internal Source Inductance
–––
7.5
–––
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
–––
–––
–––
–––
6320
1980
1100
5930
2010
3050
–––
–––
–––
–––
–––
–––
V
V/°C
mΩ
V
S
µA
nA
nC
ns
nH
pF
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 75A
VDS = VGS, ID = 150µA
VDS = 10V, ID = 75A
VDS = 30V, VGS = 0V
VDS = 30V, VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
ID = 75A
VDS = 24V
VGS = 10V
VDD = 15V
ID = 75A
RG = 3.2 Ω
VGS = 10V
e
e
e
Between lead,
6mm (0.25in.)
from package
and center of die contact
VGS = 0V
VDS = 25V
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 24V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 24V
f
Source-Drain Ratings and Characteristics
Parameter
IS
ISM
VSD
trr
Qrr
ton
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
c
Min. Typ. Max. Units
–––
–––
75
–––
–––
1020
–––
–––
–––
–––
34
29
1.3
51
44
A
V
ns
nC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 75A, VGS = 0V
TJ = 25°C, IF = 75A, VDD = 15V
di/dt = 100A/µs
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by max. junction
temperature. (See fig. 11).
‚ Limited by TJmax, starting TJ = 25°C, L = 0.10mH RG = 25Ω,
IAS = 75A, VGS =10V. Part not recommended for use above
this value.
ƒ Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
„ Coss eff. is a fixed capacitance that gives the same charging time
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical
repetitive avalanche performance.
† This value determined from sample failure population. 100%
tested to this value in production.
‡ This is only applied to TO-220AB pakcage.
ˆ Rθ is measured at T J approximately 90°C
as Coss while VDS is rising from 0 to 80% VDSS .
2
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IRF2903ZPbF
1000
1000
ID, Drain-to-Source Current (A)
TOP
100
BOTTOM
10
4.5V
TOP
ID, Drain-to-Source Current (A)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
BOTTOM
100
4.5V
≤ 60µs PULSE WIDTH
Tj = 25°C
≤ 60µs PULSE WIDTH
Tj = 175°C
1
10
0.1
1
10
100
1000
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
240
100.0
Gfs, Forward Transconductance (S)
1000.0
ID, Drain-to-Source Current(Α)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TJ = 175°C
10.0
TJ = 25°C
1.0
VDS = 25V
≤ 60µs PULSE WIDTH
3.0
4.0
5.0
6.0
7.0
8.0
9.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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200
TJ = 175°C
160
120
80
40
VDS = 10V
380µs PULSE WIDTH
0.1
2.0
TJ = 25°C
10.0
0
0
20
40
60
80 100 120 140 160 180
ID, Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
Vs. Drain Current
3
IRF2903ZPbF
12000
20
10000
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
C, Capacitance (pF)
Coss = Cds + Cgd
8000
Ciss
6000
4000
Coss
2000
Crss
ID= 75A
16
12
8
4
0
0
1
10
0
100
40
1000.0
10000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
120
160
200
240
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
TJ = 175°C
100.0
80
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
10.0
TJ = 25°C
1.0
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
1msec
100µsec
100
LIMITED BY PACKAGE
10
1
VGS = 0V
10msec
DC
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
0.1
0.0
0.4
0.8
1.2
1.6
2.0
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
VDS = 24V
VDS= 15V
2.4
0.1
1.0
10.0
100.0
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF2903ZPbF
300
RDS(on) , Drain-to-Source On Resistance
(Normalized)
2.0
LIMITED BY PACKAGE
ID , Drain Current (A)
250
200
150
100
50
0
25
50
75
100
125
150
ID = 75A
VGS = 10V
1.5
1.0
0.5
175
-60 -40 -20
TC , Case Temperature (°C)
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
Vs. Temperature
Fig 9. Maximum Drain Current Vs.
Case Temperature
Thermal Response ( ZthJC )
1
D = 0.50
0.20
0.1
0.10
0.05
τJ
0.02
0.01
0.01
R1
R1
τJ
τ1
R2
R2
τ2
τ1
τ2
Ci= τi/Ri
Ci i/Ri
R3
R3
τ3
τC
τ
τ3
Ri (°C/W) τi (sec)
0.08133 0.000044
0.2408 0.000971
0.18658 0.008723
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
15V
DRIVER
L
VDS
D.U.T
RG
20V
VGS
+
V
- DD
IAS
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS, Single Pulse Avalanche Energy (mJ)
IRF2903ZPbF
1200
I D
26A
42A
BOTTOM 75A
TOP
1000
800
600
400
200
0
25
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
QGS
QGD
4.5
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
+
V
- DS
VGS(th) Gate threshold Voltage (V)
10 V
ID = 1.0A
ID = 1.0mA
ID = 250µA
ID = 150µA
4.0
3.5
3.0
2.5
2.0
1.5
1.0
-75 -50 -25
VGS
0
25
50
75
100 125 150 175
TJ , Temperature ( °C )
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
Fig 14. Threshold Voltage Vs. Temperature
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IRF2903ZPbF
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
100
0.05
0.10
10
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
300
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 75A
250
200
150
100
50
0
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
IRF2903ZPbF
D.U.T
Driver Gate Drive
ƒ
+
‚
„
•
•
•
•
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
*

RG
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
Period
P.W.
+
VDD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V DS
VGS
RG
RD
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
8
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IRF2903ZPbF
TO-220AB Package Outline(Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
AS S EMBLED ON WW 19, 2000
IN T HE AS S EMBLY LINE "C"
Note: "P" in as sembly line pos ition
indicates "Lead - Free"
INT ERNAT IONAL
RECTIFIER
LOGO
AS S EMBLY
LOT CODE
PART NUMBER
DAT E CODE
YEAR 0 = 2000
WEEK 19
LINE C
TO-220AB package is not recommended for Surface Mount Application.
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 07/2010
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9
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