MOTOROLA MC74LVX240DT Low-voltage cmo Datasheet

 SEMICONDUCTOR TECHNICAL DATA
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#! ! ! "!
LVX
The MC74LVX240 is an advanced high speed CMOS inverting 3–state
octal bus buffer and has two active low output enables. It is also designed
to work with 3–state memory address drivers, etc. The inputs tolerate
voltages up to 7V, allowing the interface of 5V systems to 3V systems.
•
•
•
•
•
•
•
•
High Speed: tPD = 4.3ns (Typ) at VCC = 3.3V
LOW–VOLTAGE CMOS
Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Low Noise: VOLP = 0.8V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
DW SUFFIX
20–LEAD SOIC PACKAGE
CASE 751D–04
VCC
2OE
1O0
2D0
1O1
2D1
1O2
2D2
1O3
2D3
20
19
18
17
16
15
14
13
12
11
DT SUFFIX
20–LEAD TSSOP PACKAGE
CASE 948E–02
1
2
3
4
5
6
7
8
9
10
1OE
1D0
2O0
1D1
2O1
1D2
2O2
1D3
2O3
GND
Figure 1. 20–Lead Pinout (Top View)
M SUFFIX
20–LEAD SOIC EIAJ PACKAGE
CASE 967–01
1OE
1D0
1D1
1D2
1
19
2OE
2
18
4
16
6
14
8
12
1O0
2D0
1O1
2D1
1O2
2D2
17
3
15
5
13
7
11
9
PIN NAMES
2O0
2O1
Pins
Function
nOE
1Dn, 2Dn
1On, 2On
Output Enable Inputs
Data Inputs
3–State Outputs
2O2
FUNCTION TABLE
1D3
1O3
2D3
Figure 2. Logic Diagram
INPUTS
2O3
1OE, 2OE
1Dn, 2Dn
1On, 2On
L
L
H
L
H
X
L
H
Z
6/97
 Motorola, Inc. 1997
1
OUTPUTS
REV 0
MC74LVX240
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MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage
–0.5 to +7.0
V
Vin
DC Input Voltage
–0.5 to +7.0
V
Vout
DC Output Voltage
–0.5 to VCC +0.5
V
IIK
Input Diode Current
–20
mA
IOK
Output Diode Current
±20
mA
Iout
DC Output Current, per Pin
±25
mA
ICC
DC Supply Current, VCC and GND Pins
±75
mA
PD
Power Dissipation
180
mW
Tstg
Storage Temperature
–65 to +150
_C
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is
not implied.
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RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage
2.0
3.6
V
Vin
DC Input Voltage
0
5.5
V
Vout
DC Output Voltage
0
VCC
V
TA
Operating Temperature, All Package Types
–40
+85
_C
∆t/∆V
Input Rise and Fall Time
0
100
ns/V
DC ELECTRICAL CHARACTERISTICS
S b l
Symbol
P
Parameter
T
Test
C
Conditions
di i
Min
1.5
2.0
2.4
VIH
High–Level Input Voltage
2.0
3.0
3.6
VIL
Low–Level Input Voltage
2.0
3.0
3.6
VOH
High–Level Output Voltage
(Vin = VIH or VIL)
IOH = –50µA
IOH = –50µA
IOH = –4mA
2.0
3.0
3.0
VOL
Low–Level Output Voltage
(Vin = VIH or VIL)
IOL = 50µA
IOL = 50µA
IOL = 4mA
2.0
3.0
3.0
Iin
Input Leakage Current
Vin = 5.5V or GND
IOZ
Maximum Three–State
Leakage Current
ICC
Quiescent Supply Current
MOTOROLA
TA = 25°C
VCC
V
Typ
TA = – 40 to 85°C
Max
Min
1.5
2.0
2.4
0.5
0.8
0.8
1.9
2.9
2.58
Max
2.0
3.0
V
0.5
0.8
0.8
1.9
2.9
2.48
V
V
0.1
0.1
0.36
0.1
0.1
0.44
V
3.6
±0.1
±1.0
µA
Vin = VIL or VIH
Vout = VCC or GND
3.6
±0.25
±2.5
µA
Vin = VCC or GND
3.6
4.0
40.0
µA
2
0.0
0.0
U i
Unit
LVX Data — Low–Voltage CMOS Logic
BR1492 — Rev 0
MC74LVX240
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AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
TA = 25°C
S b l
Symbol
tPLH,
tPHL
tPZL,
tPZH
tPLZ,
tPHZ
tOSHL
tOSLH
P
Parameter
Propagation Delay
Input to Output
Output Enable Time to
High and Low Level
Output Disable Time From
High and Low Level
Output–to–Output Skew
(Note 1.)
T
Test
C
Conditions
di i
Min
TA = – 40 to 85°C
Typ
Max
Min
Max
U i
Unit
ns
VCC = 2.7V
CL = 15pF
CL = 50pF
5.7
8.2
10.1
13.6
1.0
1.0
12.5
16.0
VCC = 3.3 ± 0.3V
CL = 15pF
CL = 50pF
4.3
6.8
6.2
9.7
1.0
1.0
7.5
11.0
VCC = 2.7V
RL = 1kΩ
CL = 15pF
CL = 50pF
7.1
9.6
13.8
17.3
1.0
1.0
16.5
20.0
VCC = 3.3 ± 0.3V
RL = 1kΩ
CL = 15pF
CL = 50pF
5.5
8.0
8.8
12.3
1.0
1.0
10.5
14.0
VCC = 2.7V
RL = 1kΩ
CL = 50pF
11.6
16.0
1.0
19.0
VCC = 3.3 ± 0.3V
RL = 1kΩ
CL = 50pF
9.7
11.4
1.0
13.0
VCC = 2.7V
VCC = 3.3 ±0.3V
CL = 50pF
CL = 50pF
1.5
1.5
1.5
1.5
ns
ns
ns
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter
guaranteed by design.
CAPACITIVE CHARACTERISTICS
TA = 25°C
S b l
Symbol
P
Parameter
Min
TA = – 40 to 85°C
Typ
Max
10
Min
Max
U i
Unit
10
pF
Cin
Input Capacitance
4
Cout
Maximum Three–State Output Capacitance
6
pF
CPD
Power Dissipation Capacitance (Note 2.)
19
pF
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 8 (per bit). CPD is used to determine the no–load
dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 3.3V, Measured in SOIC Package)
TA = 25°C
S b l
Symbol
Ch
Characteristic
i i
Typ
Max
U i
Unit
VOLP
Quiet Output Maximum Dynamic VOL
0.5
0.8
V
VOLV
Quiet Output Minimum Dynamic VOL
–0.5
–0.8
V
VIHD
Minimum High Level Dynamic Input Voltage
2.0
V
VILD
Maximum Low Level Dynamic Input Voltage
0.8
V
LVX Data — Low–Voltage CMOS Logic
BR1492 — Rev 0
3
MOTOROLA
MC74LVX240
SWITCHING WAVEFORMS
VCC
VCC
1Dn, 2Dn
1OE, 2OE
50%
50%
GND
GND
tPHL
1On, 2On
tPZL
tPLH
1On, 2On
50% VCC
HIGH
IMPEDANCE
50% VCC
tPZH
1On, 2On
tPLZ
tPHZ
VOL +0.3V
VOH –0.3V
50% VCC
Figure 3.
HIGH
IMPEDANCE
Figure 4.
TEST CIRCUITS
TEST POINT
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
OUTPUT
DEVICE
UNDER
TEST
CL*
* Includes all probe and jig capacitance
CL*
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
* Includes all probe and jig capacitance
Figure 5. Propagation Delay Test Circuit
MOTOROLA
1 kΩ
Figure 6. Three–State Test Circuit
4
LVX Data — Low–Voltage CMOS Logic
BR1492 — Rev 0
MC74LVX240
OUTLINE DIMENSIONS
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
–A–
20
11
–B–
10X
P
0.010 (0.25)
1
M
B
M
10
20X
D
0.010 (0.25)
T A
M
B
S
DIM
A
B
C
D
F
G
J
K
M
P
R
J
S
F
R X 45 _
C
–T–
G
18X
SEATING
PLANE
MILLIMETERS
MIN
MAX
12.65
12.95
7.40
7.60
2.35
2.65
0.35
0.49
0.50
0.90
1.27 BSC
0.25
0.32
0.10
0.25
0_
7_
10.05
10.55
0.25
0.75
INCHES
MIN
MAX
0.499
0.510
0.292
0.299
0.093
0.104
0.014
0.019
0.020
0.035
0.050 BSC
0.010
0.012
0.004
0.009
0_
7_
0.395
0.415
0.010
0.029
M
K
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948E–02
ISSUE A
20X
0.15 (0.006) T U
K REF
0.10 (0.004)
S
M
T U
S
V
S
ÍÍÍÍ
ÍÍÍÍ
ÍÍÍÍ
K
K1
2X
L/2
20
11
J J1
B
–U–
L
PIN 1
IDENT
SECTION N–N
1
10
0.25 (0.010)
N
0.15 (0.006) T U
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.
M
A
–V–
N
F
DETAIL E
–W–
C
D
G
H
DETAIL E
0.100 (0.004)
–T– SEATING
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
6.40
6.60
4.30
4.50
–––
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.27
0.37
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN
MAX
0.252
0.260
0.169
0.177
–––
0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.011
0.015
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0_
8_
PLANE
LVX Data — Low–Voltage CMOS Logic
BR1492 — Rev 0
5
MOTOROLA
MC74LVX240
OUTLINE DIMENSIONS
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 967–01
ISSUE O
20
NOTES:
1 DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2 CONTROLLING DIMENSION: MILLIMETER.
3 DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4 TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5 THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
LE
11
Q1
E HE
1
M_
L
10
DETAIL P
Z
D
VIEW P
e
A
c
A1
b
0.13 (0.005)
M
0.10 (0.004)
DIM
A
A1
b
c
D
E
e
HE
L
LE
M
Q1
Z
MILLIMETERS
MIN
MAX
–––
2.05
0.05
0.20
0.35
0.50
0.18
0.27
12.35
12.80
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 _
0_
0.70
0.90
–––
0.81
INCHES
MIN
MAX
–––
0.081
0.002
0.008
0.014
0.020
0.007
0.011
0.486
0.504
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 _
0_
0.028
0.035
–––
0.032
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
Mfax is a trademark of Motorola, Inc.
How to reach us:
USA / EUROPE / Locations Not Listed: Motorola Literature Distribution;
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INTERNET: http://motorola.com/sps
MOTOROLA
◊
6
MC74LVX240/D
LVX Data — Low–Voltage CMOS Logic
BR1492 — Rev 0
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