MITSUBISHI SEMICONDUCTORS <HVIC> M81700FP RY INA ELIM on. ange. ificati h l spec ct to c a finaare subje t o n is its is m h li T tric e: Notice parame Som PR HIGH VOLTAGE HALF BRIDGE DRIVER DESCRIPTION M81700FP is high voltage Power MOSFET and IGBT module driver for half bridge applications. PIN CONFIGURATION (TOP VIEW) FEATURES LO 1 ¡FLOATING SUPPLY VOLTAGE ................................. 600V ¡OUTPUT CURRENT .................................................... ±2A ¡HALF BRIDGE DRIVER ¡SOP-16 16 NC LGND 2 15 GND VCC 3 14 LIN NC 4 13 SD NC 5 12 HIN VS 6 11 VDD VB 7 10 NC HO 8 9 APPLICATIONS PDP. HID lamp. MOSFET and IGBT module inverter driver for refrigerator, air-conditioner, washing machine, servomotor and general purpose. NC NC:NO CONNECTION PACKAGE TYPE 16P2N BLOCK DIAGRAM VDD HIN 11 12 SD 13 LIN 14 GND HV LEVEL SHIFT 15 VDD/VCC LEVEL SHIFT S VDD/VCC LEVEL SHIFT VDD/VCC LEVEL SHIFT 8 HO 6 3 VS VCC 1 LO 2 LGND R S PULSE GEN UV DETECT FILTER UV signal S RQ VB R Q INTER LOCK RQ 7 UV DETECT FILTER DELAY RQ S Mar. 2002 MITSUBISHI SEMICONDUCTORS <HVIC> RY M81700FP INA ELIM on. ange. ificati h l spec ct to c a finaare subje t o n is its is m h li T e: tric Notice parame Som PR HIGH VOLTAGE HALF BRIDGE DRIVER ABSOLUTE MAXIMUM RATINGS Symbol VB VS VBS –VS VHO VCC VLO VDD VIN SD LGND dVS/dt Pd Kq Rth(j-c) Tj Topr Tstg Parameter High Side Floating Supply Absolute Voltage High Side Floating Supply Offset Voltage High Side Floating Supply Voltage Allowable Offset Supply Voltage minus serge High Side Output Voltage Low Side Fixed Supply Voltage Low Side Output Voltage Logic Supply Voltage Logic Input Voltage Shut Down Input Voltage Low Side Return Offset Voltage Allowable Offset Supply Voltage Transient Package Power Dissipation Linear Derating Factor Junction-Case Thermal Resistance Conditions VBS = VB-VS PW < 1µs Ratings –0.5 ~ 624 –0.5 ~ 600 –0.5 ~ 24 Unit V V V –5 VS–0.5 ~ VB+0.5 –0.5 ~ 24 –0.5 ~ VCC+0.5 V V V V –0.5 ~ 24 –0.5 ~ VDD+0.5 –0.5 ~ VDD+0.5 –5 ~ VCC+0.5 V V V V ±50 0.88 –8.8 50 –20 ~ 125 V/ns W mW/°C °C/W °C –20 ~ 75 –40 ~ 125 °C °C HIN, LIN VCC-LGND < 24V Ta = 25°C, On Board Ta > 25°C, On Board Junction Temperature Operation Temperature Storage Temperature RECOMMENDED OPERATING CONDITIONS Symbol VB VS VBS VCC VDD VIN SD LGND Parameter Test Conditions High Side Floating Supply Absolute Voltage High Side Floating Supply Offset Voltage High Side Floating Supply Voltage Low Side Fixed Supply Voltage Logic Supply Voltage Logic Input Voltage Shut Down Input Voltage Low Side Return Offset Voltage VBS = VB-VS HIN, LIN Min. VS+10 0 Limits Typ. — — Max. VS+20 500 10 10 — — 20 20 V V 5 0 — — 20 VDD V V 0 –5 — — VDD 5 V V Unit V V PERFORMANCE CURVES Thermal Derating Factor Characteristics 2.0 1.5 1.0 0.5 0 0 25 50 75 Temperature [ 100 125 ] Mar. 2002 MITSUBISHI SEMICONDUCTORS <HVIC> RY M81700FP INA ELIM on. ange. ificati h l spec ct to c a finaare subje t o n is its is m h li T e: tric Notice parame Som PR HIGH VOLTAGE HALF BRIDGE DRIVER ELECTRICAL CHARACTERISTICS (Ta=25°C, VCC=VBS (=VB–VS)=VDD=15V, LGND=0V unless otherwise specified) Symbol Parameter Test conditions VB=VS=600V Min. — Limits Typ. — Max. 1 Unit µA IFS Floating Supply Leakage Current IBS VBS standby Current — 0.4 0.7 mA ICC VCC standby Current — 0.75 1.5 mA IDD VOH VDD standby Current High Level Output Voltage — IO=0A, LO, HO 13.8 — 14.4 10 — µA V VOL Low Level Output Voltage IO=0A, LO, HO — — 0.1 V VIH15 High Level Input Threshold Voltage HIN, LIN — 8.4 9.5 V VIL15 VIH5 Low Level Input Threshold Voltage High Level Input Threshold Voltage HIN, LIN HIN, LIN (VDD=5V) 6.0 — 6.8 3.1 — 4.1 V V VIL5 Low Level Input Threshold Voltage HIN, LIN (VDD=5V) 1.4 2.4 — V VISDH15 Shutdown High Level Input Threshold Voltage SD — 8.4 9.5 V VISDL15 Shutdown Low Level Input Threshold Voltage 6.0 6.8 — V VISDH5 VISDL5 Shutdown High Level Input Threshold Voltage SD (VDD=5V) Shutdown Low Level Input Threshold Voltage SD (VDD=5V) — 1.4 3.1 2.4 4.1 — V IIH High Level Input Bias Current VIN=15V — 75 150 µA IIL Low Level Input Bias Current VIN=0V — — 1.0 µA VBSuvr VBS Supply UV Reset Voltage 7.5 8.6 9.7 V VBSuvh tVBSuv VBS Supply UV Hysteresis Voltage VBS Supply UV Filter Time 0.1 0.7 V — 0.4 10 — µs VCCuvr VCC Supply UV Reset Voltage 7.5 8.6 9.7 V VCCuvh VCC Supply UV Hysteresis Voltage 0.1 0.4 0.7 V tVCCuv IOH VCC Supply UV Filter Time Output High Level Short Circuit Pulsed Current — VO=0V, VIN=15V, PW<10µs — 10 –2.5 — — µs A IOL Output Low Level Short Circuit Pulsed Current VO=15V, VIN=0V, PW<10µs — 2.5 — A ROH Output High Level On resistance IO=–200mA, ROH=(VOH-VO)/IO — 10 13 Ω ROL Output Low Level On resistance IO=200mA, ROL=VO/IO — 2.5 3 Ω tdLH(HO) tdHL(HO) High Side Turn-On Propagation Delay High Side Turn-Off Propagation Delay CL=1000pF between HO – VS CL=1000pF between HO – VS — — — — 350 330 ns ns trH High Side Turn-On Rise Time CL=1000pF between HO – VS — — 60 ns tfH High Side Turn-Off Fall Time CL=1000pF between HO – VS — — 30 ns tdLH(LO) tdHL(LO) Low Side Turn-On Propagation Delay CL=1000pF between LO – GND — Low Side Turn-Off Propagation Delay CL=1000pF between LO – GND — — — 350 330 ns ns trL Low Side Turn-On Rise Time CL=1000pF between LO – GND — — 60 ns tfL Low Side Turn-Off Fall Time CL=1000pF between LO – GND — — 30 ns ∆tdLH Delay Matching, High Side and Low Side Turn-On |tdLH(HO)-tdLH(LO)| — — 30 ns ∆tdHL Delay Matching, High Side and Low Side Turn-Off |tdHL(HO)-tdHL(LO)| — — 30 ns — — 350 ns tSD Shutdown Propagation Delay SD CL=1000pF between HO – VS V CL=1000pF between LO – GND Mar. 2002 MITSUBISHI SEMICONDUCTORS <HVIC> RY M81700FP INA ELIM on. ange. ificati h l spec ct to c a finaare subje t o n is its is m h li T e: tric Notice parame Som PR HIGH VOLTAGE HALF BRIDGE DRIVER FUNCTION TABLE (X: H or L) HIN LIN VBS UV VCC UV HO LO SD L L H L H L H L H X X X H H H H L L H H H H H H H H H L L H L L H * L L L L L L H L * L H L L L L L L L L L L L H H X X L H X Behavioral state LO = OFF, HO = OFF LO = ON, HO = OFF LO = OFF, HO = ON LO = OFF, HO = OFF, VBS UV tripped LO = ON, HO = OFF, VBS UV tripped LO = OFF, HO = OFF, VCC UV tripped LO = OFF, HO = OFF, VCC UV tripped LO = OFF, HO = OFF, SD = ON Note : “L” state of VBS UV and VCC UV means that UV trip voltage. * If both input signals are “H”, refer to TIMING DIAGRAM. TIMING DIAGRAM 1.Input/Output Timing Diagram When input signal (HIN or LIN) is “H”, then output signal (HO or LO) is “H”. In the case of both input signals (HIN and LIN) are “H”, first coming input signal (HIN or LIN) “H” is only accepted. Corresponding this signal, output signal (HO or LO) becomes “H”. Corresponding the other signal (LIN or HIN), output signal (LO or HO) keeps “L”. HIN LIN HO LO 2.Shutdown Input Timing Diagram When shutdown input signal (SD) is “H”, then output signals (HO and LO) are “L”. Output signals (HO and LO) keep “L” by shutdown input signal (SD) is “L” until next input signal (HIN or LIN) is “H”. Mar. 2002 MITSUBISHI SEMICONDUCTORS <HVIC> RY M81700FP INA ELIM on. ange. ificati h l spec ct to c a finaare subje t o n is its is m h li T e: tric Notice parame Som PR HIGH VOLTAGE HALF BRIDGE DRIVER 3.VCC (VBS) Supply Under Voltage Lockout Timing Diagram VCCuvh (VBSuvh) VCC (VBS) VCCuvr (VBSuvr) VCCuvt (VBSuvt) tVCCuv (tVBSuv) LO (HO) LIN (HIN) 4.Allowable supply voltage transient Allowable high side floating supply voltage (VBS) transient or low side fixed supply voltage (VCC) transient are below 50V/ms. In case VBS or VCC are started more than 50V/ms, output signal (HO or LO) may be “H”. 9 1 8 1.27 7.62 0.76 1.27 MIN 16 5.3±0.1 7.8±0.3 PACKAGE OUTLINE F 2.1 MAX 10.1±0.1 G 0.1±0.1 1.8 0.25 MAX M +0.10 0.4 –0.05 1.25 4°±4° 0.1 MAX 0.6±0.2 1.27 +0.05 0.2 –0.02 0.755 MAX 0.605 Detail G Detail F Mar. 2002