AD ADG1308 4- and 8-channel -15 v/12 v multiplexer Datasheet

4- and 8-Channel
±15 V/+12 V Multiplexers
ADG1308/ADG1309
FEATURES
APPLICATIONS
Audio and video routing
Test equipment
Data acquisition systems
Battery-powered systems
Communication systems
Signal routing
FUNCTIONAL BLOCK DIAGRAMS
ADG1308
ADG1309
S1
S1A
DA
S4A
D
S1B
DB
S8
S4B
1-OF-8
DECODER
1-OF-4
DECODER
A0 A1 A2 EN
A0
A1
EN
06009-001
33 V supply range
130 Ω on resistance
Fully specified at ±15 V/+12 V
3 V logic-compatible inputs
Rail-to-rail operation
Break-before-make switching action
16-lead TSSOP and 16-lead SOIC_N
Upgrade for the ADG508A/ADG509A
Figure 1.
GENERAL DESCRIPTION
The ADG1308 and ADG1309 are monolithic analog multiplexers consisting of eight single channels and four differential
channels, respectively. The ADG1308 switches one of eight
inputs to a common output as determined by the 3-bit binary
address lines A0, A1, and A2. The ADG1309 switches one of
four differential inputs to a common differential output as
determined by the 2-bit binary address lines A0 and A1. An EN
input on both devices is used to enable or disable the device.
When disabled, all channels are switched off.
When the switches are on, each switch conducts equally well
in both directions and has an input signal range that extends to
the power supplies. In the off condition, signal levels up to the
supplies are blocked. All switches exhibit break-before-make
switching action for use in multiplexer applications. Inherent in
the design is the low charge injection for minimum transients
when switching the digital inputs.
Fast switching speed coupled with high signal bandwidth makes
the parts suitable for video signal switching. CMOS
construction ensures ultra low power dissipation, making the
parts ideally suited for portable and battery-powered
instruments.
PRODUCT HIGHLIGHTS
1. 16-lead TSSOP and 16-lead SOIC_N available.
2. Pin compatible with the ADG508AKR and the
ADG509AKR devices.
3. 3 V, logic-compatible digital input where:
VIH = 2.0 V and VIL = 0.8 V.
4. VL logic power supply not required.
5. Low power consumption.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
ADG1308/ADG1309
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................6
Applications....................................................................................... 1
Pin Configurations and Function Descriptions ............................7
Functional Block Diagrams............................................................. 1
ADG1308 Truth Table ..................................................................7
General Description ......................................................................... 1
ADG1309 Truth Table ..................................................................8
Product Highlights ........................................................................... 1
Typical Performance Characteristics ..............................................9
Revision History ............................................................................... 2
Test Circuits..................................................................................... 11
Specifications..................................................................................... 3
Terminology .................................................................................... 13
Dual Supply ................................................................................... 3
Outline Dimensions ....................................................................... 14
Single Supply ................................................................................. 5
Ordering Guide .......................................................................... 14
Absolute Maximum Ratings............................................................ 6
REVISION HISTORY
4/06—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADG1308/ADG1309
SPECIFICATIONS
DUAL SUPPLY
VDD = +15 V ± 10%, VSS = –15 V ± 10%, GND = 0 V, unless otherwise noted. 1
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On Resistance Match Between Channels, ∆RON
On Resistance Flatness, RFLAT (On)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
+25ºC
130
210
5
10
25
70
−40ºC to +105ºC
Unit
VSS to VDD
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
300
±1
±50
Drain Off Leakage, ID (Off )
±1
±50
Channel On Leakage, ID, IS (On)
±1
±50
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
2.0
0.8
tON (EN)
tOFF (EN)
Break-Before-Make Time Delay, tBBM
VS = −5 V, 0 V, +5 V, IS = −1 mA
VD = ±10 V, VS = −10 V; see Figure 14
VS = 1 V, 10 V; VD = 10 V, 1 V; see Figure 14
VS = VD = ±10 V; see Figure 15
VIN = VINL or VINH
2
80
80
500
5
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
RL = 300 Ω, CL = 35 pF
VS = 10 V; see Figure 16
RL = 300 Ω, CL = 35 pF
VS = 10 V; see Figure 18
RL = 300 Ω, CL = 35 pF
VS = 10 V; see Figure 18
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 10 V; see Figure 17
VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 21
RL = 50 Ω, CL = 5 pF; see Figure 22
f = 1 MHz, VS = 0 V
15
10
pF typ
pF typ
f = 1 MHz, VS = 0 V
f = 1 MHz, VS = 0 V
20
15
pF typ
pF typ
f = 1 MHz, VS = 0 V
f = 1 MHz, VS = 0 V
±0.005
5
80
130
80
100
85
100
25
190
120
150
10
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
CS (Off )
CD (Off )
ADG1308
ADG1309
CD, CS (On)
ADG1308
ADG1309
VS = ±10 V, IS = −1 mA; see Figure 13
VDD = +13.5 V, VSS = −13.5 V
VS = ±10 V, IS = −1 mA
V min
V max
μA max
μA max
pF typ
±0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS 2
Transition Time, tTRANSITION
nA typ
nA max
nA typ
nA max
nA typ
nA max
Test Conditions/Comments
Rev. 0 | Page 3 of 16
ADG1308/ADG1309
Parameter
POWER REQUIREMENTS
IDD
+25ºC
−40ºC to +105ºC
0.002
1.0
IDD
220
320
ISS
VDD/VSS
1
2
0.002
1.0
±5/±16.5
Temperature range for B version is –40°C to +105°C.
Guaranteed by design; not subject to production test.
Rev. 0 | Page 4 of 16
Unit
μA typ
μA max
μA typ
μA max
μA typ
μA max
Test Conditions/Comments
VDD = +16.5 V, VSS = −16.5 V
Digital inputs = 0 V or VDD
Digital inputs = 5 V
Digital inputs = 0 V or VDD or 5 V
V min/V max |VDD| = |VSS|
ADG1308/ADG1309
SINGLE SUPPLY
VDD = 12 V, V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. 1
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On Resistance Match Between Channels, ∆RON
On Resistance Flatness, RFLAT (On)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Drain Off Leakage, ID (Off )
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS 2
Transition Time, tTRANSITION
tON (EN)
tOFF (EN)
Break-Before-Make Time Delay, tBBM
+25ºC
−40ºC to +105ºC Unit
0 to VDD
325
500
10
20
65
660
±1
nA typ
VDD
1
2
VS = 3 V, 6 V, 9 V, IS = −1 mA
VDD = 13.2 V
VS = 1 V/10 V, VD = 10 V/1 V; see Figure 14
nA max
±50
nA max
±50
nA max
2.0
0.8
V min
V max
±0.1
μA max
pF typ
VIN = VINL or VINH
ns typ
5
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
RL = 300 Ω, CL = 35 pF
VS = 8 V; see Figure 16
RL = 300 Ω, CL = 35 pF
VS = 8 V; see Figure 18
RL = 300 Ω, CL = 35 pF
VS = 8 V; see Figure 18
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 8 V; see Figure 17
VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 19
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 21
RL = 50 Ω, CL = 5 pF; see Figure 22
f = 1 MHz, VS = 6 V
10
15
pF typ
pF typ
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
20
15
pF typ
pF typ
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
VDD = 13.2 V
Digital inputs = 0 V or VDD
±1
nA typ
±1
nA typ
VS = 1 V/10 V, VD = 10 V/1 V; see Figure 14
VS = VD = 1 V or 10 V; see Figure 15
±0.001
3
100
170
90
110
105
130
45
240
ns typ
170
ns typ
180
2
80
80
500
0.002
1.0
IDD
VS = 0 V to 10 V, IS = −1 mA; see Figure 13
VDD = 10.8 V, VSS = 0 V
VS = 0 V to 10 V, IS = −1 mA
±50
20
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
CS (Off )
CD (Off )
ADG1308
ADG1309
CD, CS (On)
ADG1308
ADG1309
POWER REQUIREMENTS
IDD
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Test Conditions/Comments
220
320
5/16.5
Temperature range for the B version is –40°C to +105°C.
Guaranteed by design; not subject to production test.
Rev. 0 | Page 5 of 16
μA typ
μA max
μA typ
μA max
V min/V max
Digital inputs = 5
VSS = 0 V, GND = 0 V
ADG1308/ADG1309
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
VDD to VSS
VDD to GND
VSS to GND
Analog, Digital Inputs 1
Continuous Current, S or D pins
Peak Current, S or D pins
(Pulsed at 1 ms, 10% Duty
Cycle Maximum)
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature
TSSOP, θJA,
Thermal Impedance
16-Lead SOIC, θJA,
Thermal Impedance
Reflow Soldering Peak
Temperature (Pb-free)
1
Rating
35 V
−0.3 V to +25 V
+0.3 V to −25 V
VSS − 0.3 V to VDD + 0.3 V or
30 mA (whichever occurs first)
30 mA
100 mA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
–40°C to +105°C
–65°C to +150°C
150°C
112°C/W
77°C/W
260 (+0/−5)°C
Overvoltages at A, EN, S, or D pins are clamped by internal diodes. Current
should be limited to the maximum ratings provided.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 6 of 16
ADG1308/ADG1309
A0 1
16
A1
EN 2
15
A2
ADG1308
14
GND
TOP VIEW
(Not to Scale)
13
VDD
12
S5
S3 6
11
S6
S4 7
10
S7
D 8
9
S8
VSS
3
S1 4
S2 5
06009-002
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 2. ADG1308 Pin Configuration (TSSOP and SOIC_N)
Table 4. ADG1308 Pin Function Descriptions
Pin Number
1
2
Mnemonic
A0
EN
3
VSS
4
5
6
7
8
9
10
11
12
13
14
15
16
S1
S2
S3
S4
D
S8
S7
S6
S5
VDD
GND
A2
A1
Description
Logic Control Input A0.
Active High Digital Input. When low, the device is disabled and all switches are off.
When high, Ax logic inputs determine on switches.
Most Negative Power Supply Potential. In single supply applications, this pin can be
connected to ground.
Source Terminal 1. Can be an input or an output.
Source Terminal 2. Can be an input or an output.
Source Terminal 3. Can be an input or an output.
Source Terminal 4. Can be an input or an output.
Drain Terminal. Can be an input or an output.
Source Terminal 8. Can be an input or an output.
Source Terminal 7. Can be an input or an output.
Source Terminal 6. Can be an input or an output.
Source Terminal 5. Can be an input or an output.
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Logic Control Input A2.
Logic Control Input A1.
ADG1308 TRUTH TABLE
Table 5.
A2
X1
0
0
0
0
1
1
1
1
1
A1
X1
0
0
1
1
0
0
1
1
A0
X1
0
1
0
1
0
1
0
1
EN
0
1
1
1
1
1
1
1
1
X = Don’t care.
Rev. 0 | Page 7 of 16
ON SWITCH
NONE
1
2
3
4
5
6
7
8
A0 1
16
A1
EN 2
15
GND
VSS 3
ADG1309
14
VDD
S1A 4
TOP VIEW
(Not to Scale)
13
S1B
12
S2B
S3A 6
11
S3B
S4A 7
10
S4B
DA 8
9
S2A 5
DB
06009-003
ADG1308/ADG1309
Figure 3. ADG1309 Pin Configuration (TSSOP and SOIC_N)
Table 6. ADG1309 Pin Function Descriptions
Pin Number
SOIC/TSSOP
1
2
Mnemonic
A0
EN
3
VSS
4
5
6
7
8
9
10
11
12
13
14
15
16
S1A
S2A
S3A
S4A
DA
DB
S4B
S3B
S2B
S1B
VDD
GND
A1
Description
Logic Control Input A0.
Active High Digital Input. When low, the device is disabled and all switches are off.
When high, Ax logic inputs determine on switches.
Most Negative Power Supply Potential. In single supply applications, this pin can be
connected to ground.
Source Terminal 1A. Can be an input or an output.
Source Terminal 2A. Can be an input or an output.
Source Terminal 3A. Can be an input or an output.
Source Terminal 4A. Can be an input or an output.
Drain Terminal A. Can be an input or an output.
Drain Terminal B. Can be an input or an output.
Source Terminal 4B. Can be an input or an output.
Source Terminal 3B. Can be an input or an output.
Source Terminal 2B. Can be an input or an output.
Source Terminal 1B. Can be an input or an output.
Most Positive Power Supply Potential.
Ground (0 V) Reference.
Logic Control Input A1.
ADG1309 TRUTH TABLE
Table 7.
Al
X1
0
0
1
1
1
A0
X1
0
1
0
1
EN
0
1
1
1
1
ON SWITCH PAIR
NONE
1
2
3
4
X = Don’t care.
Rev. 0 | Page 8 of 16
ADG1308/ADG1309
TYPICAL PERFORMANCE CHARACTERISTICS
200
600
TA = 25°C
180
VDD = 12V
VSS = 0V
500
TA = +85°C
VDD = +15V
VSS = –15V
140
ON RESISTANCE (Ω)
ON RESISTANCE (Ω)
160
120
100
80
60
400
300
200
TA = –40°C
40
TA = +25°C
100
–12
–9
–6
–3
0
3
6
9
SOURCE OR DRAIN VOLTAGE (V)
12
15
0
06009-004
0
–15
Figure 4. On Resistance as a Function of VD (VS ) for Dual Supply
0
2
4
6
8
SOURCE OR DRAIN VOLTAGE (V)
10
12
06009-007
20
Figure 7. On Resistance as a Function of VD (VS ) for Different Temperatures,
Single Supply
450
6
TA = 25°C
TA = 25°C
VDD = +15V
VSS = –15V
400
4
CHARGE INJECTION (pC)
ON RESISTANCE (Ω)
350
300
VDD = 12V
VSS = 0V
250
200
150
100
VDD = +5V
VSS = –5V
2
0
VDD = +12V
VSS = 0V
–2
–4
0
2
4
6
8
SOURCE OR DRAIN VOLTAGE (V)
10
12
–6
–15
06009-005
0
Figure 5. On Resistance as a Function of VD (VS ) for Single Supply
250
–10
–5
5
10
15
Figure 8. Charge Injection vs. Source Voltage
160
VDD = +15V
VSS = –15V
140
VDD = +15V
VSS = –15V
200
TON
120
100
150
TIME (ns)
ON RESISTANCE (Ω)
0
VS (V)
06009-008
50
TA = +85°C
100
TA = –40°C
TOFF
80
60
TA = +25°C
40
50
–10
–5
0
5
SOURCE OR DRAIN VOLTAGE (V)
10
15
Figure 6. On Resistance as a Function of VD (VS ) for Different Temperatures,
Dual Supply
Rev. 0 | Page 9 of 16
0
–40
–20
0
20
40
TEMPERATURE (°C)
60
Figure 9. TON/TOFF Time vs. Temperature
80
06009-009
0
–15
06009-006
20
ADG1308/ADG1309
0
–10
VDD = +15V
VSS = –15V
TA = 25°C
–20
–30
–30
CROSSTALK (dB)
–40
–50
–60
–70
–40
SxA – SxB
–50
–60
–70
S1x – S2x
–80
–80
–90
–90
–110
10k
100k
1M
10M
FREQUENCY (Hz)
100M
1G
06009-010
–100
Figure 10. Off Isolation vs. Frequency
12
SOURCE/DRAIN ON
6
DRAIN OFF
4
2
0
–15
SOURCE OFF
–10
–5
0
VBIAS (V)
5
10
15
06009-012
CAPACITANCE (pF)
8
100k
1M
10M
FREQUENCY (Hz)
Figure 12. Crosstalk vs. Frequency
VDD = +15V
VSS = –15V
TA = 25°C
10
–100
10k
Figure 11. ADG1308 Capacitance vs. Source Voltage, ±15 V Dual Supply
Rev. 0 | Page 10 of 16
100M
1G
06009-011
OFF ISOLATION (dB)
–20
–10
VDD = +15V
VSS = –15V
TA = 25°C
ADG1308/ADG1309
TEST CIRCUITS
S
D
S
D
A
VS
NC
VD
IDS
06009-013
VS
ID (ON)
ID (OFF)
S
D
A
VD
NC = NO CONNECT
Figure 14. Off Leakage
Figure 15. On Leakage
Figure 13. On Resistance
3V
ADDRESS
DRIVE (VIN)
50%
50%
tr < 20ns
tf < 20ns
VDD
VSS
VDD
VSS
A0
0V
VIN
S1
A1
50Ω
A2
tTRANSITION
VS1
S2–S7
tTRANSITION
VS8
S8
ADG13081
90%
2.4V
OUTPUT
OUTPUT
D
EN
300Ω
GND
35pF
06009-016
90%
1SIMILAR CONNECTION FOR ADG1309.
Figure 16. Address to Output Switching Times, tTRANSITION
3V
ADDRESS
DRIVE (VIN)
VDD
VSS
VDD
VSS
A0
VIN
0V
S1
A1
50Ω
VS
S2–S7
A2
S8
80%
ADG13081
80%
OUTPUT
2.4V
OUTPUT
D
EN
300Ω
GND
35pF
06009-017
tBBM
1SIMILAR CONNECTION FOR ADG1309.
Figure 17. Break-Before-Make Delay, tBBM
3V
50%
VDD
VSS
A0
50%
S1
A1
0V
ADG13081
tOFF (EN)
0.9VO
0.9VO
50Ω
OUTPUT
D
EN
VIN
VS
S2–S8
A2
tON (EN)
OUTPUT
VSS
GND
300Ω
1SIMILAR CONNECTION FOR ADG1309.
Figure 18. Enable Delay, tON (EN), tOFF (EN)
Rev. 0 | Page 11 of 16
35pF
06009-018
ENABLE
DRIVE (VIN)
VDD
06009-015
A
06009-014
IS (OFF)
V
ADG1308/ADG1309
3V
VDD
VSS
VDD
VSS
A0
A1
VIN
A2
ADG13081
VOUT
RS
ΔVOUT
S
D
EN
VS
QINJ = CL × ΔVOUT
GND
VOUT
CL
1nF
1SIMILAR
06009-019
VIN
CONNECTION FOR ADG1309.
Figure 19. Charge Injection
VSS
VDD
0.1µF
VDD
NETWORK
ANALYZER
VSS
S
50Ω
50Ω
RL
50Ω
50Ω
VS
D
VOUT
RL
50Ω
VOUT
VS
06009-020
GND
OFF ISOLATION = 20 log
Figure 20. Off Isolation
VDD
VSS
0.1µF
VDD
VSS
S1
D
S2
R
50Ω
VS
VOUT
VS
06009-022
GND
CHANNEL-TO-CHANNEL CROSSTALK = 20 log
INSERTION LOSS = 20 log
Figure 21. Channel-to-Channel Crosstalk
Rev. 0 | Page 12 of 16
VOUT
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
Figure 22. Bandwidth
0.1µF
RL
50Ω
NETWORK
ANALYZER
VSS
S
VS
GND
VOUT
0.1µF
VDD
D
NETWORK
ANALYZER
VSS
0.1µF
06009-021
VDD
0.1µF
ADG1308/ADG1309
TERMINOLOGY
RON
tTRANSITION
Ohmic resistance between D and S.
Delay time between the 50% and 90% points of the digital
inputs and the switch on condition when switching from one
address state to another.
ΔRON
Difference between the RON of any two channels.
TBBM
Off time measured between the 80% point of both switches
when switching from one address state to another.
IS (Off)
Source leakage current when the switch is off.
ID (Off)
Drain leakage current when the switch is off.
VINL
Maximum input voltage for Logic 0.
ID, IS (On)
Channel leakage current when the switch is on.
VINH
Minimum input voltage for Logic 1.
VD (VS)
Analog voltage on Terminal D and Terminal S.
IINL (IINH)
Input current of the digital input.
CS (Off)
Channel input capacitance for off condition.
IDD
Positive supply current.
CD (Off)
Channel output capacitance for off condition.
ISS
Negative supply current.
CD, CS (On)
On switch capacitance.
Off Isolation
A measure of unwanted signal coupling through an off channel.
CIN
Digital input capacitance.
tON (EN)
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Delay time between the 50% and 90% points of the digital input
and switch on condition.
Bandwidth
The frequency at which the output is attenuated by 3 dB.
tOFF (EN)
Delay time between the 50% and 90% points of the digital input
and switch off condition.
On Response
The frequency response of the on switch.
Rev. 0 | Page 13 of 16
ADG1308/ADG1309
OUTLINE DIMENSIONS
5.10
5.00
4.90
16
9
4.50
4.40
4.30
6.40
BSC
1
8
PIN 1
1.20
MAX
0.15
0.05
0.30
0.19
0.65
BSC
COPLANARITY
0.10
0.20
0.09
SEATING
PLANE
0.75
0.60
0.45
8°
0°
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 23. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
10.00 (0.3937)
9.80 (0.3858)
4.00 (0.1575)
3.80 (0.1496)
16
9
1
8
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0039)
COPLANARITY
0.10
6.20 (0.2441)
5.80 (0.2283)
1.75 (0.0689)
1.35 (0.0531)
0.50 (0.0197)
× 45°
0.25 (0.0098)
8°
0.51 (0.0201) SEATING
0.25 (0.0098) 0° 1.27 (0.0500)
PLANE
0.31 (0.0122)
0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 24. 16-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
ADG1308BRUZ 1
ADG1308BRUZ-REEL71
ADG1308BRZ1
ADG1308BRZ-REEL71
ADG1309BRUZ1
ADG1309BRUZ-REEL71
ADG1309BRZ1
ADG1309BRZ-REEL71
1
Temperature Range
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
Package Description
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Narrow Body Small Outline Package [SOIC_N]
16-Lead Narrow Body Small Outline Package [SOIC_N]
Z = Pb-free part.
Rev. 0 | Page 14 of 16
Package Option
RU-16
RU-16
R-16
R-16
RU-16
RU-16
R-16
R-16
ADG1308/ADG1309
NOTES
Rev. 0 | Page 15 of 16
ADG1308/ADG1309
NOTES
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06009-0-4/06(0)
Rev. 0 | Page 16 of 16
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