LT1055/LT1056 Precision, High Speed, JFET Input Operational Amplifiers U DESCRIPTION FEATURES ■ ■ ■ ■ Guaranteed Offset Voltage –55°C to 125°C Guaranteed Drift Guaranteed Bias Current 70°C 125°C Guaranteed Slew Rate 150µV Max 500µV Max 4µV/°C Max The LT1055/LT1056 JFET input operational amplifiers combine precision specifications with high speed performance. 150pA Max 2.5nA Max 12V/µs Min For the first time, 16V/µs slew rate and 6.5MHz gain-banwidth product are simultaneously achieved with offset voltage of typically 50µV, 1.2µV/°C drift, bias currents of 40pA at 70°C and 500pA at 125°C. The 150µV maximum offset voltage specification is the best available on any JFET input operational amplifier. U APPLICATIONS ■ ■ ■ ■ ■ ■ ■ The LT1055 and LT1056 are differentiated by their operating currents. The lower power dissipation LT1055 achieves lower bias and offset currents and offset voltage. The additional power dissipation of the LT1056 permits higher slew rate, bandwidth and faster settling time with a slight sacrifice in DC performance. Precision, High Speed Instrumentation Logarithmic Amplifiers D/A Output Amplifiers Photodiode Amplifiers Voltage-to-Frequency Converters Frequency-to-Voltage Converters Fast, Precision Sample-and-Hold The voltage-to-frequency converter shown below is one of the many applications which utilize both the precision and high speed of the LT1055/LT1056. For a JFET input op amp with 23V/µs guaranteed slew rate, refer to the LT1022 data sheet. and LTC are registered trademarks and LT is a trademark of Linear Technology Corporation. U TYPICAL APPLICATION 0kHz to 10kHz Voltage-to-Frequency Converter 4.7k Distribution of Input Offset Voltage (H Package) 3M 15V 140 0.001 (POLYSTYRENE) 2 0.1µF 22k 15V 7 + 6 LT1056 3 – 1.5k OUTPUT 1Hz TO 10kHz 0.005% LINEARITY 4 –15V 33pF 3.3M VS = ±15V TA = 25°C 634 UNITS TESTED FROM THREE RUNS 50% TO ±60µV 100 80 60 40 LM329 2N3906 20 0.1µF = 1N4148 *1% FILM NUMBER OF UNITS 0V TO 10V INPUT 10kHZ TRIM 5k 120 0 –15V THE LOW OFFSET VOLTAGE OF LT1056 CONTRIBUTES ONLY 0.1Hz OF ERROR WHILE ITS HIGH SLEW RATE PERMITS 10kHz OPERATION. –400 –200 200 400 0 INPUT OFFSET VOLTAGE (µV) LT1055/56 TA02 LT1055/56 TA01 1 LT1055/LT1056 W U U W W W Supply Voltage ...................................................... ±20V Differential Input Voltage ....................................... ±40V Input Voltage ......................................................... ±20V Output Short-Circuit Duration .......................... Indefinite Operating Temperature Range LT1055AM/LT1055M/LT1056AM/ LT1056M ......................................... –55°C to 125°C LT1055AC/LT1055C/LT1056AC/ LT1056C ................................................ 0°C to 70°C Storage Temperature Range All Devices ...................................... – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C U ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION TOP VIEW NC 8 BALANCE 1 7 ORDER PART NUMBER V+ 6 OUT –IN 2 5 BALANCE +IN 3 4 V– H PACKAGE 8-LEAD TO-5 METAL CAN TJMAX = 150°C, θJA = 150°C/ W, θJC = 45°C/ W LT1055ACH LT1055CH LT1055AMH LT1055MH LT1056ACH LT1056CH LT1056AMH LT1056MH TOP VIEW BAL 1 8 N/C –IN 2 7 V+ +IN 3 6 OUT V– 4 5 BAL LT1055CN8 LT1056CN8 N8 PACKAGE 8-LEAD PLASTIC DIP TJMAX = 100°C, θJA = 130°C/ W Consult factory for Industrial grade parts. ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOS Input Offset Voltage (Note1) IOS IB en In AVOL CMRR PSRR VOUT SR GBW IS 2 Input Offset Current Input Bias Current VS = ±15V, TA = 25°C, VCM = 0V unless otherwise noted. CONDITIONS LT1055 H Package LT1056 H Package LT1055 N8 Package LT1056 N8 Package Fully Warmed Up Fully Warmed Up VCM = 10V Input Resistance:Differential Common Mode VCM = – 11V to 8V VCM = 8V to 11V Input Capacitance Input Noise Voltage 0.1Hz to 10Hz LT1055 LT1056 Input Noise Voltage Density f0 = 10Hz (Note 2) f0 = 1kHz (Note 3) Input Noise Current Density f0 = 10Hz, 1kHz (Note 4) Large-Signal Voltage Gain V0 = ±10V RL = 2k RL = 1k Input Voltage Range Common-Mode Rejection Ratio VCM = ±11V Power Supply Rejection Ratio VS = ±10V to ±18V Output Voltage Swing RL = 2k Slew Rate LT1055 LT1056 Gain-Bandwidth Product f = 1MHz LT1055 LT1056 Supply Current LT1055 LT1056 Offset Voltage Adjustment Range RPOT = 100k LT1055AM/LT1056AM LT1055AC/LT1056AC MIN TYP MAX — 50 150 — 50 180 — — — — — — — 2 10 — ±10 ±50 — 30 130 — — 1012 — 1012 — — 1011 — — 4 — — 1.8 — — 2.5 — — 28 50 — 14 20 — 1.8 4 150 400 — 130 300 — ±11 ±12 — 86 100 — 90 106 — ±12 ±13.2 — 10 13 — 12 16 — — 5.0 — — 6.5 — — 2.8 4.0 — 5.0 6.5 — ±5 — LT1055M/LT1056M LT1055CH/LT1056CH LT1055CN8/LT1056CN8 MIN TYP MAX — 70 400 — 70 450 — 120 700 — 140 800 — 2 20 — ±10 ±50 — 30 150 — 1012 — — 1012 — — 1011 — — 4 — — 2.0 — — 2.8 — — 30 60 — 15 22 — 1.8 4 120 400 — 100 300 — ±11 ±12 — 83 98 — 88 104 — ±12 ±13.2 — 7.5 12 — 9.0 14 — — 4.5 — — 5.5 — — 2.8 4.0 — 5.0 7.0 — ±5 — UNITS µV µV µV µV pA pA pA Ω Ω Ω pF µVP-P µVP-P nV/√ Hz nV/ √ Hz fA/ √ Hz V/mV V/mV V dB dB V V/µs V/µs MHz MHz mA mA mV LT1055/LT1056 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOS Input Offset Voltage (Note1) IOS Average Temperature Coefficient of Input Offset Voltage Input Offset Current IB Input Bias Current AVOL CMRR PSRR VOUT Large-Signal Voltage Gain Common-Mode Rejection Ratio Power Supply Rejection Ratio Output Voltage Swing VS = ±15V, VCM = 0V, 0°C ≤ TA ≤ 70°C unless otherwise noted. CONDITIONS LT1055 H Package LT1056 H Package LT1055 N8 Package LT1056 N8 Package H Package (Note 5) N8 Package (Note 5) Warmed Up LT1055 TA = 70°C LT1056 Warmed Up LT1055 TA = 70°C LT1056 VO = ±10V, RL = 2k VCm = ±10.5V VS = ±10V to ±18V RL = 2k ● ● ● ● ● ● ● ● ● ● ● ● ● ● MIN — — — — — — LT1055AC LT1056AC TYP 100 100 — — 1.2 — MAX 330 360 — — 4.0 — LT1055CH/LT1056CH LT1055CN8/LT1056CN8 MIN TYP MAX — 140 750 — 140 800 — 250 1250 — 280 1350 — 1.6 8.0 — 3.0 12.0 — — — — 80 85 89 ±12 10 14 ±30 ±40 250 100 105 ±13.1 50 70 ±150 ±80 — — — — — — — — 60 82 87 ±12 16 18 ±40 ±50 250 98 103 ±13.1 UNITS µV µV µV µV µV/°C µV/°C 80 100 ±200 ±240 — — — — pA pA pA pA V/mV dB dB V LT1055M LT1056M TYP MAX 250 1200 250 1250 1.8 8.0 UNITS µV µV µV/°C VS = ±15V, VCM = 0V, –55°C ≤ TA ≤ 125°C unless otherwise noted. SYMBOL PARAMETER VOS Input Offset Voltage (Note1) IOS Average Temperature Coefficient of Input Offset Voltage Input Offset Current IB Input Bias Current AVOL CMRR PSRR VOUT Large-Signal Voltage Gain Common-Mode Rejection Ratio Power Supply Rejection Ratio Output Voltage Swing CONDITIONS LT1055 LT1056 ● ● (Note 5) ● Warmed Up LT1055 TA = 125°C LT1056 Warmed Up LT1055 TA = 125°C LT1056 VO = ±10V, RL = 2k VCM = ±10.5V VS = ±10V to ±17V RL = 2k ● ● The ● denotes specifications which apply over the full operating temperature range. For MIL-STD components, please refer to LTC883 data sheet for test listing and parameters. Note 1: Offset voltage is measured under two different conditions: (a) approximately 0.5 seconds after application of power; (b) at TA = 25°C only, with the chip heated to approximately 38°C for the LT1055 and to 45°C for the LT1056, to account for chip temperature rise when the device is fully warmed up. Note 2: 10Hz noise voltage density is sample tested on every lot of A grades. Devices 100% tested at 10Hz are available on request. ● ● ● ● ● ● LT1055AM LT1056AM MIN TYP MAX — 180 500 — 180 550 — 1.3 4.0 MIN — — — — — — — 40 85 88 ±12 — — — — 35 82 86 ±12 0.20 0.25 ±0.4 ±0.5 120 100 104 ±12.9 1.2 1.5 ±2.5 ±3.0 — — — — 0.25 0.30 ±0.5 ±0.6 120 98 102 ±12.9 1.8 2.4 ±4.0 ±5.0 — — — — nA nA nA nA V/mV dB dB V Note 3: This parameter is tested on a sample basis only. Note 4: Current noise is calculated from the formula: in = (2qlB)1/2, where q = 1.6 × 10 –19 coulomb. The noise of source resistors up to 1GΩ swamps the contribution of current noise. Note 5: Offset voltage drift with temperature is practically unchanged when the offset voltage is trimmed to zero with a 100k potentiometer between the balance terminals and the wiper tied to V +. Devices tested to tighter drift specifications are available on request. 3 LT1055/LT1056 U W TYPICAL PERFORMANCE CHARACTERISTICS Input Bias and Offset Currents vs Temperature BIAS OR OFFSET CURRENTS MAY BE POSITIVE OR NEGATIVE 100 BIAS CURRENT 30 10 OFFSET CURRENT 3 0 25 75 100 50 AMBIENT TEMPERATURE (°C) 125 VS = ±15V WARMED UP 800 80 TA = 125°C TA = 70°C 40 TA = 25°C 0 A 0 – 400 – 40 TA = 70°C –80 TA = 125°C –800 B A = POSITIVE INPUT CURRENT B = NEGATIVE INPUT CURRENT B –120 –15 –5 0 5 10 –10 COMMON-MODE INPUT VOLTAGE (V) LT1055/56 G01 BATTERY VOLTAGE (V) 120 50% TO ±1.5µV/°C 100 80 60 40 20 50% YIELD TO ±140µV 80 60 40 20 –1200 0 –800 –600 –400 –200 0 200 400 600 800 INPUT OFFSET VOLTAGE (µV) 15 LT1055/56 G03 Long Term Drift of Representative Units Warm-Up Drift 100 CHANGE IN OFFSET VOLTAGE (µV) VS = ±15V 634 UNITS TESTED FROM THREE RUNS VS = ±15V TA = 25°C 140 550 UNITS TESTED FROM 120 TWO RUNS (LT1056) 100 LT1055/56 G02 Distribution of Offset Voltage Drift with Temperature (H Package)* 140 400 A 160 50 VS = ±15V TA = 25°C 80 60 LT1056CN8 40 LT1055CN8 LT1056 H PACKAGE 20 LT1055 H PACKAGE 0 0 –10 –8 –6 –4 –2 0 2 4 6 8 10 OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) VS = ±15V TA = 25°C 40 OFFSET VOLTAGE CHANGE µV) 300 1200 120 NUMBER OF INPUTS INPUT BIAS CURRENT, TA = 25°C, TA = 70°C (pA) VS = ±15V VCM = 0V WARMED UP INPUT BIAS CURRENT, TA = 125°C (pA) INPUT BIAS AND OFFSET CURRENT (pA) 1000 Distribution of Input Offset Voltage (N8 Package) Input Bias Current Over the Common-Mode Range 30 20 10 0 –10 –20 –30 –40 –50 0 1 3 4 2 TIME AFTER POWER ON (MINUTES) 5 1 0 3 2 TIME (MONTHS) 4 LT1055/56 G05 *DISTRIBUTION IN THE PLASTIC (N8) PACKAGE IS SIGNIFICANTLY WIDER. 5 LT1055/56 GO6 LT1055/56 G04 LT1056 LT1055 0 2 6 4 TIME (SECONDS) 8 10 LT1055/56 GO7 4 Voltage Noise vs Frequency 100 7 70 PEAK-TO-PEAK NOISE 5 50 3 30 f0 = 10kHz 2 20 f0 = 1kHz 1 10 20 30 50 60 40 CHIP TEMPERATURE (°C) 70 10 80 LT1055/56 G08 1000 RMS NOISE VOLTAGE DENSITY (nV/√Hz) 0.1Hz TO 10Hz PEAK-TO-PEAK NOISE (µV/P-P) Noise vs Chip Temperature 10 RMS NOISE VOLTAGE DENSITY (nV/√Hz) NOISE VOLTAGE (1µV/DIVISION) 0.1Hz to 10Hz Noise VS = ±15V TA = 25°C 300 100 LT1056 1/f CORNER = 28HZ 30 LT1055 1/f CORNER = 20HZ 10 1 3 10 100 30 FREQUENCY (Hz) 300 1000 LT1055/56 G09 LT1055/LT1056 U W TYPICAL PERFORMANCE CHARACTERISTICS LT1055 Large-Signal Response 20mV/DIV 5V/DIV Small-Signal Response 5V/DIV LT1056 Large-Signal Response AV = 1, CL = 100pF, 0.5µs/DIV AV = 1, CL = 100pF, 0.5µs/DIV LT1055/56 G10 LT1055/56 G12 AV = 1, CL = 100pF, 0.2µs/DIV LT1055/56 G11 Undistorted Output Swing vs Frequency Slew Rate, Gain-Bandwidth vs Temperature SLEW RATE (V/µS) 24 18 LT1056 12 LT1055 GBW 20 6 4 LT1056 SLEW 10 2 LT1055 SLEW 6 VS = ±15V f0 = 1MHz FOR GBW 0 0 0.1 1 FREQUENCY (MHz) –25 10 VS = ±15V TA = 25°C 20 GAIN (dB) GAIN (dB) LT1056 LT1056 120 GAIN 140 LT1055 LT1056 –10 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) LT1055/56 G16 1000 1 VS = ±15V VO = ±10V 300 RL = 1k 100 30 160 VS = ±15V TA = 25°C 0 100 1000 Voltage Gain vs Temperature 0 10 10 100 FREQUENCY (kHz) LT1055/56 G15 10 40 20 LT1056 AV = 1 1 PHASE SHIFT (DEGREES) 60 LT1055 PHASE LT1055 1 1 LT1056 RL = 2k 100 –20 AV = 10 LT1055 Gain, Phase Shift vs Frequency 80 LT1056 0.1 100 LT1055 LT1055 LT1055/56 G14 Gain vs Frequency 120 AV = 100 10 125 25 75 TEMPERATURE (˚C) LT1055/56 G13 140 VS = ±15V TA = 25°C VOLTAGE GAIN (V/mV) LT1055 8 LT1056 GBW OUTPUT IMPEDANCE (Ω) VS = ±15V TA = 25°C 100 GAIN-BANDWIDTH PRODUCT (MHz) PEAK-TO-PEAK OUTPUT SWING (V) Output Impedence vs Frequency 10 30 30 4 2 FREQUENCY (MHz) 6 8 10 LT1055/56 G17 10 –75 –25 25 75 TEMPERATURE (°C) 125 LT1055/56 G18 5 LT1055/LT1056 U W TYPICAL PERFORMANCE CHARACTERISTICS LT1055 Settling Time 10 0.5mV 5 5mV 1mV 0 5mV 2mV –5 10mV 1mV 0.5mV VS = ±15V TA = 25°C 1 0 2 14 10mV 0.5mV 5mV 1mV VS = ±15V TA = 25°C 0 5mV –5 10mV 1 0 2 3 CMRR (dB) CMRR, PSRR (dB) 140 VS = ±15V TA = 25°C 100 60 40 100 20 90 0 125 10 1M 1k 10k 100k FREQUENCY (Hz) 100 Supply Current vs Supply Voltage 25°C 4 TA = 125°C LT1055 25°C 2 TA = – 55°C TA = 125°C 0 ±10 ±15 ±5 SUPPLY VOLTAGE (V) ±20 LT1055/56 G25 40 20 100 100k 10k 1k FREQUENCY (Hz) Short-Circuit Current vs Time TA = –25°C TA = –125°C VS = ±15V –3 TA = –25°C –9 –15 0.1 TA = – 55°C 40 0 –6 10M LT1055/56 G24 TA = – 55°C 6 3 1M 50 9 –12 0 NEGATIVE SUPPLY 60 10 SHORT-CIRCUIT CURRENT (mA) OUTPUT VOLTAGE SWING (V) SUPPLY CURRENT (mA) 12 TA = – 55°C POSITIVE SUPPLY 80 0 10M 15 LT1056 TA = 25°C 100 Output Swing vs Load Resistance 8 100 120 LT1055/56 G23 LT1055/56 G22 6 –12 Power Supply Rejection Ratio vs Frequency 80 25 75 TEMPERATURE (˚C) ≈ LT1055/56 G21 120 110 –25 ≈ –11 Common-Mode Rejection Ratio vs Frequency VS = ±10V TO ±17V FOR PSRR VS = ±15V, VCM = ±10.5V FOR CMRR CMRR ±10 LT1055/56 G20 Common-Mode and Power Supply Rejections vs Temperature PSRR 11 –14 VS = ±15V –15 50 0 –50 TEMPERATURE (°C) SETTLING TIME (µS) LT1055/56 G19 12 –13 0.5mV 2mV 1mV SETTLING TIME (µS) 120 13 5 –10 3 2mV POWER SUPPLY REJECTION RATIO (dB) 10mV 15 BATTERY VOLTAGE (V) 2mV OUTPUT VOLTAGE SWING FROM 0V (V) OUTPUT VOLTAGE SWING FROM 0V (V) 10 –10 Common-Mode Range vs Temperature LT1056 Settling Time TA = –125°C TA = – 55°C 0.3 1 3 LOAD RESISTANCE (kΩ) TA = 25°C 30 TA = 125°C 20 10 0 VS = ±15V –10 SINKING –20 TA = 125°C –30 TA = 25°C –40 10 LT1055/56 G26 TA = – 55°C –50 0 2 1 3 TIME FROM OUTPUT SHORT TO GROUND (MINUTES) LT1055/56 G27 6 LT1055/LT1056 U U W U APPLICATIONS INFORMATION The LT1055/LT1056 may be inserted directly into LF155A/ LT355A, LF156A/LT356A, OP-15 and OP-16 sockets. Offset nulling will be compatible with these devices with the wiper of the potentiometer tied to the positive supply. N/C OFFSET TRIM V+ 7 OUTPUT Offset Nulling 8 1 6 V+ 3 LT1055 LT1056 + 6 V– GUARD LT1055/56 AI2 LT1055/56 AI1 No appreciable change in offset voltage drift with temperature will occur when the device is nulled with a potentiometer, RP, ranging from 10k to 200k. The LT1055/LT1056 can also be used in LF351, LF411, AD547, AD611, OPA-111, and TL081 sockets, provided that the nulling cicuitry is removed. Because of the LT1055/ LT1056’s low offset voltage, nulling will not be necessary in most applications. Achieving Picoampere/Microvolt Performance In order to realize the picoampere-microvolt level accuracy of the LT1055/LT1056 proper care must be exercised. For example, leakage currents in circuitry external to the op amp can significantly degrade performance. High quality insulation should be used (e.g. Teflon™, Kel-F); cleaning of all insulating surfaces to remove fluxes and other residues will probably be required. Surface coating may be necessary to provide a moisture barrier in high humidity environments. Board leakage can be minimized by encircling the input circuitry with a guard ring operated at a potential close to that of the inputs: in inverting configurations the guard ring should be tied to ground, in noninverting connnections to the inverting input at pin 2. Guarding both sides of the printed circuit board is required. Bulk leakage reduction depends on the guard ring width. Teflon is a trademark of Dupont. 3 OUT 4 V– 4 7 PU TS 5 – IN 2 2 5 OFFSET TRIM 1 RP The LT1055/LT1056 has the lowest offset voltage of any JFET input op amp available today. However, the offset voltage and its drift with time and temperature are still not as good as on the best bipolar amplifiers because the transconductance of FETs is considerably lower than that of bipolar transistors. Conversely, this lower transconductance is the main cause of the significantly faster speed performance of FET input op amps. Offset voltage also changes somewhat with temperature cycling. The AM grades show a typical 20µV hysteresis (30µV on the M grades) when cycled over the –55°C to 125°C temperature range. Temperature cycling from 0°C to 70°C has a negligible (less than 10µV) hysteresis effect. The offset voltage and drift performance are also affected by packaging. In the plastic N8 package the molding compound is in direct contact with the chip, exerting pressure on the surface. While NPN input transistors are largely unaffected by this pressure, JFET device matching and drift are degraded. Consequently, for best DC performance, as shown in the typical performance distribution plots, the TO-5 H package is recommended. Noise Performance The current noise of the LT1055/LT1056 is practically immeasurable at 1.8fA/√Hz. At 25°C it is negligible up to 1G of source resistance, RS (compound to the noise of RS). Even at 125°C it is negligible to 100M of RS. 7 LT1055/LT1056 U W U U APPLICATIONS INFORMATION The voltage noise spectrum is characterized by a low 1/f corner in the 20Hz to 30Hz range, significantly lower than on other competitive JFET input op amps. Of particular interest is the fact that with any JFET IC amplifier, the frequency location of the 1/f corner is proportional to the square root of the internal gate leakage currents and, therefore, noise doubles every 20°C. Furthermore, as illustrated in the noise versus chip temperature curves, the 0.1Hz to 10Hz peak-to-peak noise is a strong function of temperature, while wideband noise (f0 = 1kHz) is practically unaffected by temperature. capacitance is isolated from the “false summing” node, and (2) it does not require a “flat top” input pulse since the input pulse is merely used to steer current through the diode bridges. For more details, please see Application Note 10. As with most high speed amplifiers, care should be taken with supply decoupling, lead dress and component placement. When the feedback around the op amp is resistive (RF), a pole will be created with RF, the source resistance and capacitance (RS, CS), and the amplifier input capacitance (CIN ≈ 4pF). In low closed-loop gain configurations and with RS and RF in the kilohm range, this pole can create excess phase shift and even oscillation. A small capacitor (CF) in parallel with RF eliminates this problem. With RS (CS + CIN) = RFCF, the effect of the feedback pole is CF completely removed. Consequently, for optimum low frequency noise, chip temperature should be minimized. For example, operating an LT1056 at ±5V supplies or with a 20°C/W case-toambient heat sink reduces 0.1Hz to 10Hz noise from typically 2.5µVP-P (±15V, free-air) to 1.5µVP-P. Similiarly, the noise of an LT1055 will be 1.8µVP-P typically because of its lower power dissipation and chip temperature. RF High Speed Operation Settling time is measured in the test circuit shown. This test configuration has two features which eliminate problems common to settling time measurments: (1) probe – RS CIN CS OUTPUT + LT1055/56 AI03 Settling Time Test Circuit 15V 0.01 DISC + 15k 10pF (TYPICAL) 10µF SOLID TANTALUM 10k – –15V 15k 0.01 DISC + 2k 50Ω 2W 15V + 10µF SOLID TANTALUM 2k + PULSE GEN INPUT (5V MIN STEP) 10µF SOLID TANTALUM 15k 0.01 DISC LT1055 LT1056 AUT OUTPUT 4.7k + AMPLIFIER UNDER TEST 10k 2N3866 15V HP5082-8210 HEWLETT PACKARD 1/2 U440 50Ω –15V 100Ω DC ZERO 15k + 8 2N160 3Ω –15V OUTPUT TO SCOPE 15V 1/2 U440 0.01 DISC 15V 10µF SOLID TANTALUM = 1N4148 –15V 3Ω 2N3866 2N5160 4.7k –15V LT1055/56 AI04 LT1055/LT1056 U U W U APPLICATIONS INFORMATION Voltage Follower with Input Exceeding the Negative Common-Mode Range Phase Reversal Protection Most industry standard JFET input op amps (e.g., LF155/ LF156, LF351, LF411, OP15/16) exhibit phase reversal at the output when the negitive common-mode limit at the input is exceeded (i.e., from –12V to –15V with ±15V supplies). This can cause lock-up in servo systems. As shown below, the LT1055/LT1056 does not have this problem due to unique phase reversal protection circuitry (Q1 on simplified schematic). 15V 2 7 – LT1055/56 INPUT ±15V SINE WAVE 3 + 4 2k LT1055/56 AI05 Output LT1055/LT1056 10V/DIV 10V/DIV 10V/DIV OUTPUT –15V Output (LF155/LF56, LF441, OP-15/OP-16) Input 6 0.5ms/DIV 0.5ms/DIV 0.5ms/DIV LT1055/56 AI06 LT1055/56 AI07 LT1055/56 AI08 U TYPICAL APPLICATIONS † Exponential Voltage-to-Frequency Converter for Music Synthesizers INPUT 0V TO 10V EXPONENT TRIM 2500Ω* 11.3k* 500pF POLYSTYRENE 15V 5 6 3.57k* ZERO TRIM 4 2 2N3906 2N3904 7 – 500k 3 + SAWTOOTH OUTPUT –15V 1.1k 4.7k 500Ω* 6 LT1055 1k* 562Ω* 15V LM329 4.7k 10k* 10k* 2 15V 7 – LM301A 1k* 3 1 2 SCALE FACTOR 1V IN OCTAVE OUT *1% METAL FILM RESISTOR PIN NUMBERED TRANSISTORS = CA3096 ARRAY 3 15V 6 1 4 0.01µF 8 13 8 + 9 3k 1N148 14 15 2.2k 7 33Ω –15V †For ten additional applications utilizing the LT1055 and LT1056, please see the LTC1043 data sheet and Application Note 3. TEMPERATURE CONTROL LOOP LT1055/56 TA03 9 LT1055/LT1056 U TYPICAL APPLICATIONS 12-Bit Charge Balance A/D Converter Fast “No Trims” 12-Bit Multiplying CMOS DAC Amplifier 74C00 RFEEDBACK 28k REFERENCE IN 0.003µF 14k 0.01 2 6 249k* + 1N4148 D 4 –15V 1N4148 10k OUTPUT LT1055 IOUT2 10k LT1055 3 – CLK OUTPUT (B) 15V 7 – IOUT1 TYPICAL 12-BIT CMOS DAC + OUTPUT (A) CLK Q 74C74 Q P CL LT1055/56 TA05 2N3904 1N4148 15V 0V TO 10V INPUT 33k LM329 Fast, 16-Bit Current Comparator 10k 15V COUPLE THERMALLY 6 33k 15V 7 – 2 4 + 3 * = 1% FILM RESISTOR 15V –15V 4.7k 15V 1N4148 DELAY = 250ns HP5082-2810 CIRCUIT OUTPUT fOUT (A) RATIO fCLK (B) LT1001 50k* 2 15V – 100k* LT1055/56 TA04 INPUT 7 6 LT1056 3 LT1009 2.5V + 2 4 3 –15V 3k 8 + 7 LT1011 OUTPUT 1 – 4 –15V LT1055/56 TA06 Temperature-to-Frequency Converter 560Ω 1k* 1k* 15V 15V 2N2222 10k 2N2907 6.2k* LM329 2k 100°C ADJ 500Ω 0°C ADJ 6.2k* 0.01µF POLYSTYRENE 510pF TTL OUTPUT 0kHz TO 1kHz = 0°C TO 100°C 2.7k 2N2222 15V 2 3 – LT1055 + 820Ω* 10k 7 6 4 –15V LM134 510Ω 2V 137Ω* *1% FILM RESISTOR LT1055/56 TA07 10 4.7k LT1055/LT1056 U TYPICAL APPLICATIONS 100kHz Voltage Controlled Oscillator 15V 2 *1% FILM RESISTOR =1N4148 22.1k + 1k 68k FINE DISTORTION TRIMS – 15pF –15V 7 6 2N4391 2N4391 5k* LT1056 3 + 4 –15V 2.5k* 2 + 2N4391 4 VR Y1 Y2 GT UP –V +15V SINE OUT 2VRMS 0kHs TO 100kHs –15 10k 10k* 22k 6 LT1056 3 +V CC W Z1 Z2 15V 15V 7 – X1 X2 U1 U2 AD639 COM 5k FREQUENCY TRIM 68k POLYSTYRENE 500pF 22M 10k 15V 2 4 4.5k –15V 15V 50k 10Hz DISTORTION TRIM –15V 100kHz DISTORTION TRIM 2k 9.09k* 10k* 6 LT1056 3 FREQUENCY LINEARITY = 0.1% FREQUENCY STABILITY = 150ppm/°C SETTLING TIME = 1.7µs DISTORTION = 0.25% AT 100kHz, 0.07% AT 10zHz 0V TO 10V INPUT 7 – 2 HP50822810 + 1k 8 LT1011 3 –15V 1k 7 1 – 4 20pF 0.01µF –15V 10k LM329 4.7k 4.7k –15V 15V LT1055/56 TA08 ±120V Output Precision Op Amp 12-Bit Voltage Output D/A Converter 125V 12-BIT CURRENT OUTPUT D/A CONVERTER (e.g., 6012,565 OR DAC-80) CF 2 0 TO 2 OR 4mA CF = 15pF TO 33pF SETTLING TIME TO 2mV (0.8 LSB) = 1.5µs TO 2µs – + 330Ω 510Ω 10k 2N5415 1N965 15V 7 100pF 10k 6 LT1056 3 1µF ±25mA OUTPUT HEAT SINK OUTPUT TRANSISTORS 2N3440 50k OUTPUT 4 0V TO 10V 2 –15V LT1055/56 TA09 10k INPUT 3 – 2N2222 1k 27Ω 1N4148 7 6 LT1055 + 1M OUTPUT 4 27Ω 1N4148 1k 50k 2N2907 1M 2N5415 2N3440 1N965 10k 100k 33pF 510Ω 330Ω 1µF –125V LT1055/56 TA10 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LT1055/LT1056 W W SI PLIFIED SCHEMATIC NULL 5 7 V+ 7k Q8 7k Q7 NULL 1 J5 J6 J7 –INPUT 2 300Ω 7.5pF Q9 +INPUT 3 J1 J2 Q15 Q12 20Ω Q10 Q11 6 OUTPUT J3 J8 Q13 Q2 Q1 Q14 Q5 8k 200Ω 14k Q3 120µA* (160) 9pF 14k J4 120µA* (160) 800µA* (1000) Q16 400µA* (1100) 3k Q4 50Ω 4 V– *CURRENTS AS SHOWN FOR LT1055. (X) = CURRENTS FOR LT1056. LT1055/56 SCHM U PACKAGE DESCRIPTION Dimension in inches (millimeters) unless otherwise noted. N8 Package 8-Lead Plastic H Package Metal Can 0.335 – 0.370 (8.509 – 9.398) DIA 0.305 – 0.335 (7.747 – 8.509) 0.040 (1.016) MAX 0.400* (10.160) MAX 0.050 (1.270) MAX SEATING PLANE 0.165 – 0.185 (4.191 – 4.699) GAUGE PLANE 0.010 – 0.045 (0.254 – 1.143) 8 7 6 5 1 2 3 4 0.250 ± 0.010* (6.350 ± 0.254) REFERENCE PLANE 0.500 – 0.750 (12.700 – 19.050) 0.016 – 0.021 (0.406 – 0.533) 0.300 – 0.320 (7.620 – 8.128) 0.045 – 0.065 (1.143 – 1.651) 0.130 ± 0.005 (3.302 ± 0.127) 0.027 – 0.045 (0.686 – 1.143) 45°TYP 0.027 – 0.034 (0.686 – 0.864) 0.200 – 0.230 (5.080 – 5.842) BSC 0.009 – 0.015 (0.229 – 0.381) ( 0.110 – 0.160 (2.794 – 4.064) INSULATING STANDOFF NOTE: LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE AND SEATING PLANE. +0.025 0.325 –0.015 +0.635 8.255 –0.381 ) 0.065 (1.651) TYP 0.125 (3.175) MIN 0.045 ± 0.015 (1.143 ± 0.381) 0.100 ± 0.010 (2.540 ± 0.254) 0.018 ± 0.003 (0.457 ± 0.076) 0.020 (0.508) MIN N8 0594 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTURSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm). H8(5) 0592 12 Linear Technology Corporation LT/GP 0894 2K REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7487 (408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977 LINEAR TECHNOLOGY CORPORATION 1994