DATASHEET EL7571 FN7298 Rev 1.00 October 25, 2004 Programmable PWM Controller The EL7571 is a flexible, high efficiency, current mode, PWM step down controller. It incorporates five bit DAC adjustable output voltage control which conforms to the Intel Voltage Regulation Module (VRM) Specification for Pentium® II and Pentium® Pro class processors. The controller employs synchronous rectification to deliver efficiencies greater than 90% over a wide range of supply voltages and load conditions. The on-board oscillator frequency is externally adjustable, or may be slaved to a system clock, allowing optimization of RFI performance in critical applications. In single supply operation, the high side FET driver supports boot-strapped operation. For maximum flexibility, system operation is possible from either a 5V rail, a single 12V rail, or dual supply rails with the controller operating from 12V and the power FETs from 5V. Features Pinout • Pulse by Pulse Current Limiting • Pentium® II Compatible • 5 bit DAC Controlled Output Voltage • Greater than 90% Efficiency • 4.5V to 12.6V Input Range • Dual NMOS Power FET Drivers • Fixed frequency, Current Mode Control • Adjustable Oscillator with External Sync. Capability • Synchronous Switching • Internal Soft-Start • User Adjustable Slope Compensation • 1% Typical Output Accuracy R2 5 D1 ENABLE 1 OTEN VH1 20 2 CSLOPE HSD 19 C3 240pF • Power Good Signal Q1 C3 240pF 3 COSC 1.4V C3 4 REF 5 PWRGD Voltage I.D. (VID (0:4)) L2 C8 C1 1.5µH 1µF 1000µ F x3 LX 18 VIN 17 0.1µF POWER GOOD • Output Power Down C6 0.1µF VINP 16 C7 1µF 6 VIDO LSD 15 7 VID1 GNDP 14 8 VID2 GND 13 9 VID3 CS 12 10 VID4 FB 11 Q2 D2 L1 R2 5.1µH 5 4.5V to 12.6V VOUT 1.3V to 3.5V • Over Voltage Protection • Pb-Free Available (RoHS Compliant) Applications C2 • Pentium® II Voltage Regulation Modules (VRMs) 1000µF x6 • PC Motherboards • DC/DC Converters • GTL Bus Termination • Secondary Regulation Q1, Q2: Siliconix, Si4410, x2 C1: Sanyo, 16MV 1000GX, 1000µF x3 C2: Sanyo, 6MV 1000GX, 1000µF x6 L1: Pulse Engineering, PE-53700, 5.1µH L2: Micrometals, T30-26, 7T AWG #20, 1.5µH R1: Dale, WSL-25-12, 15m, x2 D1: BAV99 D2: IR, 32CTQ030 Ordering Information PART NUMBER PACKAGE TAPE AND REEL PKG. DWG. # EL7571CM 20-Pin SO - MDP0027 EL7571CM-T13 20-Pin SO 13” MDP0027 EL7571CMZ (See Note) 20-Pin SO (Pb-free) - MDP0027 EL7571CMZ-T13 (See Note) 20-Pin SO (Pb-free) 13” MDP0027 NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C. FN7298 Rev 1.00 October 25, 2004 Page 1 of 19 EL7571 Absolute Maximum Ratings (TA = 25°C) Operating Temperature Range:. . . . . . . . . . . . . . . . . . 0°C to +70°C Operating Junction Temperature: . . . . . . . . . . . . . . . . . . . . . . 125°C Peak Output Current:. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3A Power Dissipation: . . . . . . . . . . . . . . . . . . . . . . . . . . . .SO20 500mW Supply Voltage: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 14V Input Pin Voltage:. . . . . . . . . -.03 below Ground, +0.3 above Supply VHI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 27V Storage Temperature Range: . . . . . . . . . . . . . . . . . 65°C to +150°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA DC Electrical Specifications PARAMETER TA = 25°C, VIN = 5V, COSC = 330pF, CSLOPE = 390pF, RSENSE = 7.5m unless otherwise specified. DESCRIPTION CONDITION MIN TYP 4.5 MAX UNIT VIN Input Voltage Range 12.6 V VUVLO HI Input Under Voltage Lock out Upper Limit Positive going input voltage 3.6 4 4.4 V VUVLO LO Input Under Voltage Lock out Lower Limit Negative going input voltage 3.15 3.5 3.85 V VOUT RANGE Output Voltage Range See VID table 1.3 3.5 V VOUT 1 Steady State Output Voltage Accuracy, VID = 10111 IL = 6.5A, VOUT = 2.8V 2.74 2.82 2.90 V VOUT 2 Steady State Output Voltage Accuracy, VID = 00101 IL = 6.5A, VOUT =1.8V 1.74 1.81 1.9 V VREF Reference Voltage 1.396 1.41 1.424 V VILIM Current Limit Voltage VILIM = (VCS-VFB) 125 154 185 mV VIREV Current Reversal Threshold VIREV = (VCS-VFB) -40 -5 20 mV VOUT PG Output Voltage Power Good Lower Level VOUT = 2.05V -18 -14 -10 % Output Voltage Power Good Upper Level 8 12 16 % VOVP Over-Voltage Protection Threshold +9 +13 +17 % VOTEN LO Power Down Input Low Level VOTEN HI Power Down Input High Level VID LO Voltage I.D. Input Low Level VID HI Voltage I.D. Input High Level VOSC Oscillator Voltage Swing VPWRGD LO Power Good Output Low Level IOUT = 1mA RDS ON HSD, LSD Switch On-Resistance VIN, VINP = 12V, IOUT = 100mA, (VHI-LX) = 12V RFB FB Input Impedance 9.5 k RCS CS Input Impedance 115 k IVIN Quiescent Supply Current VOTEN>(VIN-0.5)V 1.2 2 mA 1 mA VIN = -10uA 1.5 (VIN-1.5) V V 1.5 (VIN-1.5) V V 0.85 4.8 VP-P 0.5 V 6 IVIN DIS Supply Current in Output Disable Mode VOTEN<1.5V 0.76 ISOURCE/SINK Peak Driver Output Current VIN,VINP = 12V, Measured at HSD, LSD, (VHI-LX) = 12V 2.5 IRAMP CSLOPE Ramp Current High Side Switch Active IOSC CHARGE Oscillator Charge Current 1.2>VOSC>0.35V 50 µA 1.2>VOSC>0.35V 2 mA IOSC DISCHARGE Oscillator Discharge Current IREFMAX VREF Output Current FN7298 Rev 1.00 October 25, 2004 8.5 14 A 20 25 µA µA Page 2 of 19 EL7571 DC Electrical Specifications TA = 25°C, VIN = 5V, COSC = 330pF, CSLOPE = 390pF, RSENSE = 7.5m unless otherwise specified. (Continued) PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT IVID VID Input Pull up Current 3 5 7 µA IOTEN OTEN Input Pull up Current 3 5 7 µA MAX UNIT AC Electrical Specifications PARAMETER TA = 25°C, VIN = 5V, COSC = 330pF, CSLOPE = 390pF unless otherwise specified. DESCRIPTION CONDITIONS fOSC Nominal Oscillator Frequency fCLK Clock Frequency COSC = 330pF tOTEN Shutdown Delay VOTEN>1.5V tSYNC Oscillator Sync. Pulse Width Oscillator i/p (COSC) driven with HCMOS gate TSTART Soft-start Period VOUT = 3.5V DMAX Maximum Duty Cycle MIN TYP 140 190 240 kHz 50 500 1000 kHz 100 ns 20 800 ns 100/fCLK us 97 % Pin Descriptions PIN NO. PIN NAME PIN TYPE (NOTE 1) 1 OTEN I Chip enable input, internal pull up (5mA typical). Active high. 2 CSLOPE I With a capacitor attached from CSLOPE to GND, generates the voltage ramp compensation for the PWM current mode controller. Slope rate is determined by an internal 14uA pull up and the CSLOPE capacitor value. VCSLOPE is reset to ground at the termination of the high side cycle. 3 COSC I Multi-function pin: with a timing capacitor attached, sets the internal oscillator rate fS (kHz) = 57/COSC (µF); when pulsed low for a duration tSYNC synchronizes device to an external clock. 4 REF O Band gap reference output. Decouple to GND with 0.1uF. 5 PWRGD O Power good, open drain output. Set low whenever the output voltage is not within ±13% of the programmed value. 6 VID0 I Bit 0 of the output voltage select DAC. Internal pull up sets input high when not driven. 7 VID1 I Bit 1 of the output voltage select DAC. Internal pull up sets input high when not driven. 8 VID2 I Bit 2 of the output voltage select DAC. Internal pull up sets input high when not driven. 9 VID3 I Bit 3 of the output voltage select DAC. Internal pull up sets input high when not driven. 10 VID4 I Bit 4 of the output voltage select DAC. Internal pull up sets input high when not driven. FUNCTION 11 FB I Voltage regulation feedback input. Tie to VOUT for normal operation. 12 CS I Current sense. Current feedback input of PWM controller and over current capacitor input. Current limit threshold set at +154mV with respect to FB. Connect sense resistor between CS and FB for normal operation. 13 GND S Ground 14 GNDP S Power ground for low side FET driver. Tie to GND for normal operation. 15 LSD O Low side gate drive output. 16 VINP S Input supply voltage for low side FET driver. Tie to VIN for normal operation. 17 VIN S Input supply voltage for control unit. 18 LX S Negative supply input for high side FET driver. 19 HSD O High side gate drive output. Driver ground referenced to LX. Driver supply may be bootstrapped to enhance low controller input voltage operation. 20 VH1 S Positive supply input for high side FET driver. NOTE: Pin designators: I = Input, O = Output, S = Supply FN7298 Rev 1.00 October 25, 2004 Page 3 of 19 EL7571 Typical Performance Curves 5V Supply Line Regulation 0.004 0.30 0.003 0.20 0.002 0.10 Line Regulation (%) Line Regulation (%) +12V Supply Sync Line Regulation 0.001 0 -0.001 -0.002 0.00 -0.10 -0.20 -0.30 -0.003 13.5 13.0 12.5 12.0 11.5 11.0 10.5 -0.40 5.50 10.0 5.25 5.00 +12V Supply Sync Load Regulation 4.50 VRM +5V Supply +12V Controller Sync w/o Schottky Load Regulation 0.04 6.00 5.00 0.03 VOUT = 1.8V 4.00 VOUT = 2.1V 0.02 Load Regulation (%) Load Regulation (%) 4.75 VIN (V) VIN (V) VOUT = 2.8V 0.01 0 3.00 2.00 VOUT = 2.8V 1.00 VOUT = 3.5V 0 VOUT = 1.3V -0.01 -1.00 VOUT = 1.8V -0.02 -2.00 0 1 3 5 7 9 11 0 13 1 3 IOUT (A) 5 7 9 11 13 11 13 IOUT (A) +5V Supply Non-Sync Load Regulation +12V Supply Sync Efficiency 5.00 1.0 4.00 0.9 VOUT = 1.8V 2.00 Efficiency (%) Load Regulation (%) VOUT = 1.3V 3.00 VOUT = 2.8V VOUT = 3.5V 1.00 0.8 VOUT = 3.5V VOUT = 2.8V 0.7 0 0.6 VOUT = 1.8V -1.00 -2.00 0.5 0 1 3 5 7 IOUT (A) FN7298 Rev 1.00 October 25, 2004 9 11 13 0 1 3 5 7 9 IOUT (A) Page 4 of 19 EL7571 Typical Performance Curves (Continued) +5V Supply Sync with Schottky Load +5V Supply +12V Controller Sync w/o Schottky VRM Efficiency 2.5 1.0 VOUT = 3.5V 0.9 VOUT = 2.8V 0.5 Efficiency (X) Load Regulation (%) 1.5 0 VOUT = 1.8V -0.5 VOUT = 1.3V -1.5 1 3 5 7 VOUT = 3.5V 0.7 VOUT = 1.8V VOUT = 2.8V 0.6 -2.5 0 0.8 9 11 VOUT = 1.3V 0.5 0.02 13 1.02 3.04 5.04 IOUT (A) 1.0 1.0 0.9 0.9 0.8 VOUT = 3.5V VOUT = 2.8V VOUT = 1.8V 0.6 9.04 11.04 13.04 +5V Supply Sync with Schottky VRM Efficiency Efficiency (%) Efficiency (%) +5V Supply Non-Sync VRM Efficiency 0.7 7.04 IOUT (A) 0.8 VOUT = 3.5V 0.7 VOUT = 2.8V VOUT = 1.8V 0.6 VOUT = 1.3V 0.5 VOUT = 1.3V 0.5 0 1 3 5 7 9 11 13 0 IOUT (A) FN7298 Rev 1.00 October 25, 2004 3 5 7 9 11 13 IOUT (A) 12V Transient Response 1 1 5V Non-sync Transient Response 1 Page 5 of 19 EL7571 Typical Performance Curves (Continued) 5V Sync Transient Response 5V Input 12V Controller Transient Response 1 1 VREF vs Temperature 92.6 1.425 92.5 1.420 1.415 92.4 VREF (V) Efficiency (%) Efficiency vs Temperature 92.2 92.0 1.410 1.405 1.400 91.8 1.395 91.6 -45 -30 -15 0 15 30 45 60 Temperature (°C) 1.390 -45 -30 -15 0 15 30 45 60 Temperature (°C) Frequency vs Temperature 280 270 Frequency (kHz) 260 250 240 230 220 210 200 -45 -30 -15 0 15 30 45 60 Temperature (°C) FN7298 Rev 1.00 October 25, 2004 Page 6 of 19 EL7571 Applications Information Circuit Description General The EL7571 is a fixed frequency, current mode, pulse width modulated (PWM) controller with an integrated high precision reference and a 5 bit Digital-to-Analog Converter (DAC). The device incorporates all the active circuitry required to implement a synchronous step down (buck) converter which conforms to the Intel Pentium® II VRM specification. Complementary switching outputs are provided to drive dual NMOS power FET’s in either synchronous or non-synchronous configurations, enabling the user to realize a variety of high efficiency and low cost converters. Reference A precision, temperature compensated band gap reference forms the basis of the EL7571. The reference is trimmed during manufacturing and provides 1% set point accuracy for the overall regulator. AC rejection of the reference is optimized using an external bypass capacitor CREF. Main Loop A current mode PWM control loop is implemented in the EL7571 (see block diagram). This configuration employs dual feedback loops which provide both output voltage and current feedback to the controller. The resulting system offers several advantages over tradititional voltage control systems, including simpler loop design, pulse by pulse current limiting, rapid response to line variaion and good load step response. Current feedback is performed by sensing voltage across an external shunt resistor. Selection of the shunt resistance value sets the level of current feedback and thereby the load regulation and current limit levels. Consequently, operation over a wide range of output currents is possible. The reference output is fed to a 5 bit DAC with step weighing conforming to the Intel VRM Specification. Each DAC input includes an internal current pull up which directly interfaces to the VID output of a Pentium® II class microprocessor. The heart of the controller is a tripleinput direct summing differential comparator, which sums voltage feedback, current feedback and compensating ramp signals together. The relative gains of the comparator input stages are weighed. The ratio of voltage feedback to current feedback to compensating ramp defines the load regulation and open loop voltage gain for the system, respectively. The compensating ramp is required to maintain large system signal system stability for PWM duty cycles greater than 50%. Compensation ramp amplitude is user adjustable and is set with a single external capacitor (CSLOPE). The ramp voltage is ground referenced and is reset to ground whenever the high side drive signal is low. In operation, the DAC output voltage is compared to the regulator output, which has been internally attenuated. The resulting error voltage is compared with the compensating ramp and current feedback voltage. PWM duty cycle is adjusted by the comparator output such that the FN7298 Rev 1.00 October 25, 2004 combined comparator input sums to zero. A weighted comparator scheme enhances system operation over traditional voltage error amplifier loops by providing cycle-bycycle adjustment of the PWM output voltage, eliminating the need for error amplifier compensation. The dominant pole in the loop is defined by the output capacitance and equivalent load resistance, the effect of the output inductor having been canceled due to the current feedback. An output enable (OUTEN) input allows the regulator output to be disabled by an external logic control signal. Auxiliary Comparators The current feedback signal is monitored by two additional comparators which set the operating limits for the main inductor current. An over current comparator terminates the PWM cycle independently of the main summing comparator output whenever the voltage across the sense resistor exceeds 154mV. For a 7.5mresistor this corresponds to a nominal 20A current limit. Since output current is continuously monitored, cycle-by-cycle current limiting results. A second comparator senses inductor current reverse flow. The low side drive signal is terminated when the sense resistor voltage is less than -5mV, corresponding to a nominal reverse current of -0.67A, for a 7.5m sense resistor. Additionally, under fault conditions, with the regulator output over-voltage, inductor current is prevented from ramping to a high level in the reverse direction. This prevents the parasitic boost action of the local power supply when the fault is removed and potential damage to circuitry connected to the local supply. Oscillator A system clock is generated by an internal relaxation oscillator. Operating frequency is simple to adjust using a single external capacitor COSC. The ratio of charge to discharge current in the oscillator is well defined and sets the maximum duty cycle for the system at around 96%. Soft-start During start-up, potentially large currents can flow into the regulator output capacitors due to the fast rate of change of output voltage caused during start-up, although peak inrush current will be limited by the over current comparator. However an additionally internal switch capacitor soft-start circuit controls the rate of change of output voltage during start-up by overriding the voltage feedback input of the main summing comparator, limiting the start-up ramp to around 1ms under typical operating conditions. The soft-start ramp is reset whenever the output enable (OUTEN) is reset or whenever the controller supply falls below 3.5V. Watchdog A system watchdog monitors the condition of the controller supply and the integrity of the generated output voltage. Modern logic level power FET’s rapidly increase in resistivity (RDS-ON) as their gate drive is reduced below 5V. To prevent thermal damage to the power FET’s under load, with a reduced supply voltage, the system watchdog monitors the controller Page 7 of 19 EL7571 supply (VIN) and disables both PWM outputs (HSD, LSD) when the supply voltage drops below 3.5V. When the supply voltage is increased above 4V the watchdog initiates a softstart ramp and enables PWM operation. The difference between enable and disable thresholds introduces hysteresis into the circuit operation, preventing start-up oscillation. In addition, output voltage is also monitored by the watchdog. As called out by the Intel Pentium® II VRM specification, the watchdog power good output (PWRGD) is set low whenever the output voltage differs from it’s selected value by more than ±13%. PWRGD is an open drain output. A third watchdog function disables PWM output switching during over-voltage fault conditions, displaying both external FET drives, whenever the output voltage is greater than 13% of its selected value, thereby anticipating reverse inductor current ramping and conforming to the VRM over-voltage specification, which requires the regulator output to be disabled during fault conditions. Switching is enabled after the fault condition is removed. Output Drivers Complementary control signals developed by the PWM control loop are fed to dual NMOS power FET drivers via a level shift circuit. Each driver is capable of delivering nominal peak output currents of 2A at 12V. To prevent shoot-through in the external FET’s, each driver is disabled until the gate voltage of the complementary power FET has fallen to less than 1V. Supply connections for both drivers are independent, allowing the controller to be configured with a boot-strapped high side drive. Employing this technique a single supply voltage may be used for both power FET’s and controller. Alternatively, the application may be simplified using dual supply rails with the power FET’s connected to a secondary supply voltage below the controller’s, typically 12V and 5V. For applications where efficiency is less important than cost, applications can be further simplified by replacing the low side power FET with a Schottky diode, resulting in non-synchronous operation. Applications Information The EL7571 is designed to meet the Intel 5 bit VRM specification. Refer to the VID decode table for the controller output voltage range. The EL7571 may be used in a number converter topologies. The trade-off between efficiency, cost, circuit complexity, line input noise, transient response and availability of input supply voltages will determine which converter topology is suitable for a given application. The following table lists some of the differences between the various configurations: Converter Topologies TOPOLOGY EFFICIENCY COST 5V only Non-synchronous figure 1 92% low low high good 5V only Synchronous figure 2 95% higher higher high good 5V &12V Non-synchronous figure 3 92% lowest lowest high good 5V & 12V Synchronous figure 4 95% high high high good 12V only Synchronous Connection Diagram 92% highest highest high best Circuit schematics and Bills of Material (BOMs) for the various topologies are provided at the end of this data sheet. If your application requirements differ from the included samples, the following design guide lines should be used to select the key component values. Refer to the front page connection diagram for component locations. Output Inductor, L1 Two key converter requirements are used to determine inductor value: COMPLEXITY INPUT NOISE TRANSIENT RESPONSE DIAGRAM current positive for all conditions. This is desirable to optimize load regulation and light load transient response. When the minimum inductor ripple current just reaches zero and with the mean ripple current set to IMIN, peak inductor ripple current is twice IMAX, independent of duty cycle. The minimum inductor value is given by: V IN – V OUT T ON V IN – V OUT V OUT L 1MIN = -------------------------------------------------------- = -----------------------------------------------------------1 PEAK V IN F SW 2 I MIN • IMIN- minimum output current; the current level at which the converter enters the discontinuous mode of operation (refer to Elantec application note #18 for a detailed discussion of discontinuous mode) • IMAX- maximum output current Although many factors influence the choice of the inductor value, including efficiency, transient response and ripple current, one practical way of sizing the inductor is to select a value which maintains continuous mode operation, i.e. inductor FN7298 Rev 1.00 October 25, 2004 Page 8 of 19 EL7571 be selected which guarantees operation under maximum load. That is: where: IPEAK = peak ripple current V OCMIN R 1 = ----------------------1 MAX TON = top switch on time VIN = input voltage where: FSW = switching frequency VOUT = output voltage VOCMIN = minimum over current voltage threshold IMIN = minimum load IMAX = maximum output current Since inductance value tends to decrease with current, ripple current will generally be greater than 21MIN at higher output current. Once the minimum output inductance is determined, an off the shelf inductor with current rating greater than the maximum DC output required can be selected. Pulse Engineering and Coil Craft are two manufactures of high current inductors. For converter designers who want to design their own high current inductors, for experimental purposes or to further reduce costs, we recommend the Micrometals Powered Iron Cores data sheet and applications note as a good reference and starting point. Current Sense Resistor, R1 Inductor current is monitored indirectly via a low value resistor R1. The voltage developed across the current sense resistor is used to set the maximum operating current, the current reversal threshold and the system load regulation. To ensure reliable system operation it is important to sense the actual voltage drop across the resistor. Accordingly a four wire Kelvin connection should be made to the controller current sense inputs. There are two criteria for selecting the resistor value and type. Firstly, the minimum value is limited by the maximum output current. The EL7571 current limit capacitor has a typical threshold of 154mV, 125mV minimum. When the voltage across the sense resistor exceeds this threshold, the conduction cycle of the top switch terminates immediately, providing pulse by pulse current limiting. A resistor value must Secondly, since the load current passes directly through the sense resistor, its power rating must be sufficient to handle the power dissipated during maximum load (current limit) conditions. Thus: 2 P D = 1 OUTMAX R 1 where: PD = power dissipated in current sense resistor PD must be less than the power rating of the current sense resistor. High current applications may require parallel sense resistors to dissipate sufficient power. Current Sense Resistor Table below lists some popular current sense resistors: the WLS-2512 series of Power Metal Strip Resistors from Dale Electronics, OARS series Iron Alloy resistor from IRC, and Copper Magnanin (CuNi) wire resistor from Mills Resistors. Mother board copper trace is not recommended because of its high temperature coefficient and low power dissipation. The trade-off between the different types of resistors are cost, space, packaging and performance. Although Power Metal Strip Resistors are relatively expensive, they are available in surface mount packaging with tighter tolerances. Consequently, less board space is used to achieve a more accurate current sense. Alternatively, Magnanin copper wire has looser tolerance and higher parasitic inductance. This results in a less current sense but at a much lower cost. Metal track on the PCB can also be used as current sense resistor. The trade-offs are ±30% tolerance and ±4000 ppm temperature coefficient. Ultimately, the selection of the type of current sense element must be made on an application by application basis. Bill of Materials MANUFACTURER PART NO. TOLERANCE TEMPERATURE COEFFICIENT POWER RATING PHONE NO. FAX NO. Dale WSL 2512 ±1% ±75ppm 1W 402-563-6506 402-563-6418 IRC OARS Series ±5% ±20ppm 1W - 5W 800-472-6467 800-472-3282 Mills Resistor MRS1367-TBA ±10% ±20ppm 1.2W 916-422-5461 906-422-1409 ±30% ±4000ppm 50A/in (1oz Cu) PCB Trace Resistor FN7298 Rev 1.00 October 25, 2004 Page 9 of 19 EL7571 Input Capacitor, C1 In a buck converter, where the output current is greater than 10A, significant demand is placed on the input capacitor. Under steady state operation, the high side FET conducts only when it is switched “on” and conducts zero current when it is turned “off”. The result is a current square wave drawn from the input supply. Most of this input ripple current is supplied from the input capacitor C1. The current flow through C1’s equivalent series resistance (ESR) can heat up the capacitor and cause premature failure. Maximum input ripple current occurs when the duty cycle is 50%, a current of IOUT/2 RMS. Worst case power dissipation is: I OUT 2 P D = ------------- ESR IN 2 where: ERSIN = input capacitor ESR For safe and reliable operation, PD must be less than the capacitor’s data sheet rating. Input Inductor, L2 The input inductor (L2) isolates switching noise from the input supply line by diverting buck converter input ripple current into the input capacitor. Buck regulators generate high levels of input ripple current because the load is connected directly to the supply through the top switch every cycle, chopping the input current between the load current and zero, in proportion to the duty cycle. The input inductor is critical in high current applications where the ripple current is similarly high. An exclusively large input inductor degrades the converter’s load transient response by limiting the maximum rate of change of current at the converter input. A 1.5µH input inductor is sufficient in most applications. Output Capacitor, C2 During steady state operation, output ripple current is much less than the input ripple current since current flow is continuous, either via the top switch or the bottom switch. Consequently, output capacitor power dissipation is less of a concern than the input capacitor’s. However, low ESR is still required for applications with very low output ripple voltage or transient response requirements. Output ripple voltage is given by: V RIP = I RIP ESR OUT where: IRIP = output ripple current and magnitude of the load current step. The output voltage transient is given by: d i V OUT = ESR OUT I OUT + ESL ----- d t where: ESROUT = output capacitor ESR ESL = output capacitor ESL IOUT = output current step di/dt = rate of change of output current Power MOSFET, Q1 and Q2 The EL7571 incorporates a boot-strap gate drive scheme to allow the usage of N-channel MOSFETs. N-channel MOSFETs are preferred because of their relative low cost and low on resistance. The largest amount of the power loss occurs in the power MOSFETs, thus low on resistance should be the primary characteristic when selecting power MOSFETs. In the boot-strap gate drive scheme, the gate drive voltage can only go as high as the supply voltage, therefore in a 5V system, the MOSFETs must be logic level type, VGS<4.5V. In addition to on resistance and gate to source threshold, the gate to source capacitance is also very important. In the region when the output current is low (below 5A), switching loss is the dominant factor. Switching loss is determined by: 2 P = CV F where: C is the gate to source capacitance of the MOSFET V is the supply voltage F is the switching frequency Another undesirable reason for a large MOSFET gate to source capacitance is that the on resistance of the MOSFET driver can not supply the peak current required to turn the MOSFET on and off fast. This results in additional MOSFET conduction loss. As frequency increases, this loss also increases which leads to more power loss and lower efficiency. Finally, the MOSFET must be able to conduct the maximum current and handle the power dissipation. The EL7571 is designed to boot-strap to 12V for 12V only input converters. In this application, logic level MOSFETs are not required. The following table below lists a few popular MOSFETs and their critical specifications. ESROUT = output capacitor ESR During a transient response, the output voltage spike is determined by the ESR and the equivalent series inductance (ESL) of the output capacitor in addition to the rate of change FN7298 Rev 1.00 October 25, 2004 Page 10 of 19 EL7571 MANUFACTURER MODEL VGS RON (MAX) CGS MegaMos Mi4410 4.5V 20m 6.4nF ±10A 30V SO-8 MegaMos Mip30N03A 4.5V 22m 6.3nF ±15A 30V TO-220 Si4410 4.5V 20m 4.3nF ±10A 30V SO-8 2SK1388 4V 37m Siliconix Fuji IR Motorola ID VDS PACKAGE ±17.5A TO-220 IRF3205S 4 8m 17nF (max) ±98A 55V D2Pak MTB75N05HD 4 7m 7.1nF ±75A 50V TO-220 forward voltage drop and condition current is a primary source of power dissipation in the convertor. The Schottky diode selected is the International Rectifier 32CTQ030 which has 0.4V of forward voltage drop at 15A. Skottky Diode, D2 In the non-synchronous scheme a flyback diode is required to provide a current path to the output when the high side power MOSFET, Q1, is switched off. The critical criteria for selecting D2 is that it must have low forward voltage drop. The product of Block Diagram In Regulation ENABLE 0.1µF 1.5µH L2 C1 4.5V to 12.6V 3mF VIN OTEN REF FB CS PWRGD VINP + - Reference + VHI 4V + UVLO HI + + HSD Current Reversal - UVLO LOW 0.1µF - LX 3.5V + - VID (0:4) DAC + - 5.1µH PWM Control Logic LSD L1 VOUT 7.5m C2 6mF + - CSLOPE Ramp Control 240pF Soft Start ENABLE COSC Oscillator 220pF GND FN7298 Rev 1.00 October 25, 2004 GNDP Page 11 of 19 EL7571 Voltage ID Code Output Voltage Settings VID4 VID3 VID2 VID1 VID0 VOUT 0 1 1 1 1 1.3 0 1 1 1 0 1.35 0 1 1 0 1 1.4 0 1 1 0 0 1.45 0 1 0 1 1 1.5 0 1 0 1 0 1.55 0 1 0 0 1 1.6 0 1 0 0 0 1.65 0 0 1 1 1 1.7 0 0 1 1 0 1.75 0 0 1 0 1 1.8 0 0 1 0 0 1.85 0 0 0 1 1 1.9 0 0 0 1 0 1.95 0 0 0 0 1 2.0 0 0 0 0 0 2.05 1 1 1 1 1 0, No CPU 1 1 1 1 0 2.1 1 1 1 0 1 2.2 1 1 1 0 0 2.3 1 1 0 1 1 2.4 1 1 0 1 0 2.5 1 1 0 0 1 2.6 1 1 0 0 0 2.7 1 0 1 1 1 2.8 1 0 1 1 0 2.9 1 0 1 0 1 3.0 1 0 1 0 0 3.1 1 0 0 1 1 3.2 1 0 0 1 0 3.3 1 0 0 0 1 3.4 1 0 0 0 0 3.5 Application Circuits To assist the evaluation of EL7571, several VRM applications have been developed. These are described in the converter topologies table earlier in the data sheet. The demo board can be configured to operate with either a 5V or 12V controller supply, using a 5V FET supply. FN7298 Rev 1.00 October 25, 2004 Page 12 of 19 EL7571 5V Input, Boot-Strapped Non-Synchronous DC:DC Converter 5 D1 R2 ENABLE 1 OTEN VH1 20 2 CSLOPE HSD 19 C6 0.1µF 240pF C3 C4 3 COSC 4 REF 5 PWRGD 1µH Q1 LX 18 C8 C1 1µF 1000µF x3 220pF 1.4V C5 0.1µF 16 C7 0.1µF POWER GOOD Voltage LD. (VID(0:4)) 6 VIDO LSD 15 7 VID1 GNDP 14 8 VID2 9 VID3 CS 12 10 VID4 FB 11 GND 5V VOUT V1H 17 VINP L2 L1 R1 5.1µH 7.5m D2 C2 1000µF x6 13 EL7571 5V VRM Bill of Materials - 5V Non Sync Solution COMPONENT MANUFACTURER PART NUMBER VALUE UNIT C1 Sanyo 6MV1000GX 1000µF 3 C2 Sanyo 6MV1000GX 1000µF 6 Chip Capacitors 240pF 1 C3 C4 Chip Capacitors 220pF 1 C5, C6 Chip Capacitors 0.1µF 2 C7, C8 Chip Capacitors 1µF 2 D1 GI Schotty diode SS12GICT-ND IC1 Elantec EL7571CM L1 Pulse Engineering PE-53700 5.1µH 1 L2 Micrometals T30-26,7T AWG #20 1µH 1 R1 DALE WSL-2512 15m 2 Chip Resistor 5 R2 1 1 1 D2 IR IR32CTQ030 1 Q1 Siliconix Si4410 2 FN7298 Rev 1.00 October 25, 2004 Page 13 of 19 EL7571 5V Input Boot-Strapped Synchronous DC:DC Converter 5 R2 D1 ENABLE 1 OTEN VH1 20 2 CSLOPE HSD 19 C6 0.1µF 240pF C3 C4 3 COSC 4 REF 1.5µH Q1 LX 18 C8 C1 1µF 1000µF x3 220pF 1.4V C5 0.1µF 5 PWRGD V1H 17 VINP 16 C7 0.1µF POWER GOOD 6 VIDO LSD 15 7 VID1 GNDP 14 8 VID2 9 VID3 CS 12 10 VID4 FB 11 L2 5V L1 R1 VOUT 5.1µH 7.5m C2 D2 1000µF x6 Q2 Voltage LD. (VID(0:4)) GND 13 EL7571 5V VRM Bill of Materials - 5V Non Sync Solution COMPONENT MANUFACTURER PART NUMBER VALUE UNIT C1 Sanyo 6MV1000GX 1000µF 3 C2 Sanyo 6MV1000GX 1000µF 6 C3 Chip Capacitors 240pF 1 C4 Chip Capacitors 220pF 1 C5, C6 Chip Capacitors 0.1µF 2 C7, C8 Chip Capacitors 1µF 2 D1 GI Schotty diode SS12GICT-ND 1 IC1 Elantec EL7571CM 1 L1 Pulse Engineering PE-53700 5.1µH 1 L2 Micrometals T30-26,7T AWG #20 1µH 1 R1 DALE WSL-2512 15m 2 Chip Resistor 5 1 R2 D2 IR IR32CTQ030 1 Q1, Q2 Siliconix Si4410 2 each FN7298 Rev 1.00 October 25, 2004 Page 14 of 19 EL7571 5V Input, 12V Controller, Non-Sync Solution 12V 5 ENABLE 1 OTEN VH1 20 2 CSLOPE HSD 19 R2 220pF C3 C4 3 COSC 4 REF 5 PWRGD 1µH Q1 LX 18 C8 C1 1µF 1000µF x3 220pF 1.4V C5 0.1µF V1H 17 VINP 16 C7 L1 R1 5.1µH 7.5m 0.1µF POWER GOOD 6 VIDO LSD 15 7 VID1 GNDP 14 8 VID2 9 VID3 CS 12 10 VID4 FB 11 L2 5V VOUT C2 1000µF x6 Q2 Voltage LD. (VID(0:4)) GND 13 EL7571 5V VRM Bill of Materials - 5V Non Sync Solution COMPONENT MANUFACTURER PART NUMBER VALUE UNIT C1 Sanyo 6MV1000GX 1000µF 3 C2 Sanyo 6MV1000GX 1000µF 6 C3 Chip Capacitors 240pF 1 C4 Chip Capacitors 220pF 1 C5 Chip Capacitors 0.1µF 1 C7, C8 Chip Capacitors 1µF 2 IC1 Elantec EL7571CM L1 Pulse Engineering PE-53700 L2 Micrometals R1 DALE R2 1 5.1µH 1 T30-26,7T AWG #20 1µH 1 WSL-2512 15m 2 Chip Resistor 5 1 D2 IR IR32CTQ030 1 Q1 Siliconix Si4410 2 FN7298 Rev 1.00 October 25, 2004 Page 15 of 19 EL7571 5V Input, 12V Controller, Synchronous DC:DC Converter 12V C6 0.1µF ENABLE 1 OTEN VH1 20 2 CSLOPE HSD 19 3 COSC 4 REF 5 PWRGD 330pF C3 C4 1.5µH Q1 LX 18 C8 C1 1µF 1000µF x3 330pF 1.4V C5 0.1µF V1H 17 VINP 16 C7 Voltage LD. (VID(0:4)) 6 VIDO LSD 15 7 VID1 GNDP 14 8 VID2 9 VID3 CS 12 10 VID4 FB 11 GND L1 R1 5.1µH 7.5m 5V VOUT C2 1000µF x6 0.1µF POWER GOOD L2 D2 13 EL7571 5V VRM Bill of Materials - 5V Input, 12V Controller Sync Solution COMPONENT MANUFACTURER PART NUMBER VALUE UNIT C1 Sanyo 6MV1000GX 1000µF 3 C2 Sanyo 6MV1000GX 1000µF 6 Chip Capacitors 330pF 1 C3 C4 Chip Capacitors 330pF 1 C5, C6 Chip Capacitors 0.1µF 2 C7, C8 Chip Capacitors 1µF 2 IC1 Elantec L1 Pulse Engineering PE-53700 5.1µH 1 L2 Micrometals T30-26,7T AWG #20 1µH 1 R1 DALE WSL-2512 15m 2 D2 IR IR32CTQ030 1 Q1, Q2 Siliconix Si4410 2 each FN7298 Rev 1.00 October 25, 2004 EL7571CM 1 Page 16 of 19 EL7571 PCB Layout Considerations 1. Place the power MOSFET’s as close to the controller as possible. Failure to do so will cause large amounts of ringing due to the parasitic inductance of the copper trace. Additionally, the parasitic capacitance of the trace will weaken the effective gate drive. High frequency switching noise may also couple to other control lines. 2. Always place the by-pass capacitors (0.1µF and 1µF) as close to the EL7571 as possible. Long lead lengths will lessen the effectiveness. 3. Separate the power ground (input capacitor ground and ground connections of the Schottky diode and the power MOSFET’s) and signal grounds (ground pins of the by-pass capacitors and ground terminals of the EL7571). This will isolate the highly noisy switching ground from the very sensitive signal ground. 4. Connect the power and signal grounds at the output capacitors. Output capacitor ground is the quietest point in the converter and should be used as the reference ground. 5. The power MOSFET’s output inductor and Schottky diode should be grouped together to contain high switching noise in the smallest area. 6. Current sense traces running from pin 11 and pin 12 to the current sense resistor should run parallel and close to each other and be Kelvin connected (no high current flow). In high current applications performance can be improved by connecting low Pass filter (typical values 4.70.1µF) between the sense resistor and the IC inputs. Layout Example To demonstrate the points discussed above, below shows two reference layouts - a synchronous 5V only VRM layout and a synchronous 5V only PC board layout. Both layouts can be modified to any application circuit configuration shown on this data sheet. Gerber files of the layouts are available from the factory. Top Layer Silkscreen Bottom Layer Silkscreen FN7298 Rev 1.00 October 25, 2004 Page 17 of 19 EL7571 Top Layer Metal Bottom Layer Metal Top Layer Silkscreen FN7298 Rev 1.00 October 25, 2004 Page 18 of 19 EL7571 Top Layer Metal Bottom Layer Metal © Copyright Intersil Americas LLC 2003-2004. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN7298 Rev 1.00 October 25, 2004 Page 19 of 19