MOTOROLA MC54FXXXJ Dual jk positive edge-triggered flip-flop Datasheet

MC54/74F109
DUAL JK POSITIVE
EDGE-TRIGGERED FLIP-FLOP
The MC54/74F109 consists of two high-speed, completely independent
transition clocked JK flip-flops. The clocking operation is independent of rise
and fall times of the clock waveform. The JK design allows operation as a D
flip-flop (refer to F74 data sheet) by connecting the J and K inputs together.
DUAL JK POSITIVE
EDGE-TRIGGERED FLIP-FLOP
FAST SCHOTTKY TTL
CONNECTION DIAGRAM
VCC CD2
16
15
J2
14
K2
13
CD
J
K
CD1
J1
K1
CP2 SD2
11
12
Q2
10
CP
SD
Q
Q
CP1 SD1
Q1
Q1
Q2
9
J SUFFIX
CERAMIC
CASE 620-09
16
1
1
2
3
CD1
J1
K1
4
5
CP1 SD1
6
7
8
Q1
Q1
GND
N SUFFIX
PLASTIC
CASE 648-08
16
1
FUNCTION TABLE (Each Half)
Input
Output
@ tn
@ tn + 1
J
K
Q
L
H
L
L
L
H
H
H
H
L
H
L
Toggles
D SUFFIX
SOIC
CASE 751B-03
16
Q
1
No Change
ORDERING INFORMATION
MC54FXXXJ
MC74FXXXN
MC74FXXXD
Asynchronous Inputs:
Ceramic
Plastic
SOIC
LOW Input to SD sets Q to HIGH level
LOW Input to CD sets Q to LOW level
Clear and Set are independent of clock
LOGIC SYMBOL
Simultaneous LOW on CD and SD makes both Q and Q HIGH
H = HIGH Voltage Level
L = LOW Voltage Level
tn = Bit time before clock pulse
tn + 1 = Bit time after clock pulse
11
5
SD
Q
2
J
4
CP
3
K C Q
D
6
7
J
12
CP
13
K
1
4-42
CD
15
VCC = PIN 16
GND = PIN 8
FAST AND LS TTL DATA
SD
Q
14
Q
10
9
MC54/74F109
LOGIC DIAGRAM (one half shown)
Q
Q
K
J
CP
SD
CD
NOTE:
This diagram is provided only for the understanding of logic operations
and should not be used to estimate propagation delays.
GUARANTEED OPERATING RANGES
Symbol
Parameter
VCC
Supply Voltage
TA
Operating Ambient Temperature Range
Min
Typ
Max
Unit
54, 74
4.5
5.0
5.5
V
54
–55
25
125
°C
54
0
25
70
IOH
Output Current — High
54, 74
–1.0
mA
IOL
Output Current — Low
54, 74
20
mA
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Parameter
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VIK
Input Clamp Diode Voltage
VOH
Output HIGH Voltage
Typ
Max
2.0
Unit
Test Conditions
V
Guaranteed Input HIGH Voltage
0.8
V
Guaranteed Input LOW Voltage
–1.2
V
IIN = –18 mA
VCC = MIN
54, 74
2.5
3.4
V
IOH = –1.0 mA
VCC = 4.50 V
74
2.7
3.4
V
IOH = –1.0 mA
VCC = 4.75 V
0.5
V
IOL = 20 mA
VCC = MIN
20
µA
VIN = 2.7 V
VCC = MAX
100
µA
VIN = 7.0 V
Input LOW Current
(J, K and CP Inputs)
–0.6
mA
VIN = 0.5 V
VCC = MAX
(CD and SD Inputs)
–1.8
mA
–150
mA
VOUT = 0 V
VCC = MAX
17
mA
VCP = 0 V
VCC = MAX
VOL
Output LOW Voltage
IIH
Input HIGH Current
IIL
Min
IOS
Output Short Circuit Current (Note 2)
ICC
Power Supply Current
0.35
–60
11.7
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under guaranteed operating ranges.
2. Not more than one output should be shorted at a time, nor for more than 1 second.
FAST AND LS TTL DATA
4-43
MC54/74F109
AC CHARACTERISTICS
54/74F
54F
74F
TA = +25°C
TA = –55°C to +125°C
TA = 0°C to +70°C
VCC = 5.0 V ± 10%
VCC = 5.0 V ± 10%
VCC = +5.0 V
CL = 50 PF
Symbol
Parameter
Min
Typ
CL = 50 PF
Max
Min
Max
70
CL = 50 PF
Min
Max
fmax
Maximum Clock Frequency
100
125
90
tPLH
Propagation Delay
3.8
5.3
7.0
3.8
9.0
3.8
8.0
tPHL
CPn to Qn or Qn
4.4
6.2
8.0
4.4
10.5
4.4
9.2
tPLH
Propagation Delay
2.5
5.2
7.0
2.5
9.0
2.5
8.0
tPHL
CDn or SDn to Qn or Qn
3.5
7.0
9.0
3.5
11.5
3.5
10.5
Unit
MHz
ns
ns
AC OPERATING REQUIREMENTS
Symbol
Parameter
Min
54/74F
54F
74F
TA = +25°C
TA = –55°C to +125°C
TA = 0°C to +70°C
VCC = +5.0 V
VCC = 5.0 V ± 10%
VCC = 5.0 V ± 10%
Typ
Max
Min
Max
Min
Max
Unit
ts(H)
Setup Time, HIGH or LOW
3.0
3.0
3.0
ts(L)
Jn or Kn to CPn
3.0
3.0
3.0
th(H)
Hold Time, HIGH or LOW
1.0
1.0
1.0
th(L)
Jn or Kn to CPn
1.0
1.0
1.0
tw(H)
CPn Pulse Width, HIGH
4.0
4.0
4.0
tw(L)
or LOW
5.0
5.0
5.0
tw(L)
CDn or SDn Pulse Width, LOW
4.0
4.0
4.0
ns
trec
Recovery Time
CDn or SDn to CP
2.0
2.0
2.0
ns
ns
ns
FAST AND LS TTL DATA
4-44
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