NSC LMV751M5 Low noise, low vos, single op amp Datasheet

LMV751
Low Noise, Low Vos, Single Op Amp
General Description
Features
The LMV751 is a high performance CMOS operational amplifier intended for applications requiring low noise and low
input offset voltage. It offers modest bandwidth of 4.5MHz for
very low supply current and is unity gain stable.
The output stage is able to drive high capacitance, up to
1000pF and source or sink 8mA output current.
It is supplied in the space saving SOT23-5 Tiny package.
n
n
n
n
n
n
n
n
The LMV751 is designed to meet the demands of small size,
low power, and high performance required by cellular
phones and similar battery operated portable electronics.
Low Noise 6.5nV Rt-Hz typ.
Low Vos (0.05mV typ.)
Wideband 4.5MHz GBP typ.
Low Supply Current 500uA typ.
Low Suppy Voltage 2.7V to 5.0V
Ground-referenced Inputs
Unity gain stable
Small Package
Applications
n Cellular Phones
n Portable Equipment
n Radio Systems
Connection Diagrams
SOT23-5
DS101081-1
Top View
Ordering Information
Package
Ordering Info
NSC Drawing
Pkg Marking
Supplied As
5-Pin SOT23-5
LMV751M5
MA05B
A32A
1k Units Tape and Reel
LMV751M5X
MA05B
A32A
3k units Tape and Reel
© 1999 National Semiconductor Corporation
DS101081
www.national.com
LMV751 Low Noise, Low Vos, Single Op Amp
August 1999
Absolute Maximum Ratings (Note 1)
Storage Temperature Range
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Junction Temperature (TJ) (Note 4)
2000V
Machine Model
Supply Voltage
200V
Differential Input Voltage
± Supply Voltage
Supply Voltage (V+ - V−)
5.5V
Lead Temperature (Soldering, 10 sec)
150˚C
Recommended Operating
Conditions
ESD tolerance (Note 3)
Human Body Model
−65˚C to 150˚C
2.7V to 5.0V
−40˚C ≤ TJ ≤ 85˚C
Temperature Range
Thermal resisance (θJA) (Note 6)
M5 Package, SOT23-5
274˚C/W
260˚C
2.7V Electrical Characteristics
V+ = 2.7V, V− = 0V, VCM = 1.35V, TA = 25˚C unless otherwise stated. Boldface limits apply over theTemperature Range.
Symbol
Parameter
Condition
Typ
(Note 5)
Limit
(Note 2)
Units
0.05
1.0
1.5
mV
max
VOS
Input Offset Voltage
CMRR
Common Mode Rejection Ratio
0V < VCM < 1.3V
100
85
70
dB
min
PSRR
Power Supply Rejection Ratio
V+ = 2.7V to 5.0V
107
85
70
dB
min
IS
Supply Current
0.5
0.7
0.75
mA
max
IIN
Input Current
1.5
100
pA
max
IOS
Input Offset Current
AVOL
Voltage Gain
VO
VO
IO
Positive Voltage Swing
NegativeVoltage Swing
Output Current
0.2
RL = 10k Connect to V+/2
VO = 0.2V to 2.2V
RL = 2k Connect to V+/2
VO = 0.2V to 2.2V
RL = 10k Connect to V+/2
pA
120
110
95
120
100
85
2.62
2.54
2.52
RL = 2k Connect to V+/2
2.62
2.54
2.52
RL = 10k Connect to V+/2
78
140
160
RL = 2k Connect to V+/2
78
140
160
Sourcing, VO = 0V
VIN(diff) = ± 0.5V
Sinking,VO = 2.7V
VIN(diff) = ± 0.5V
12
6.0
1.5
11
6.0
1.5
dB
min
V
min
mV
max
mA
min
en
(10Hz)
Input Referred Voltage Noise
15.5
nV/
en
(1kHz)
Input Referred Voltage Noise
7
nV/
en
(30kHz)
Input Referred Voltage Noise
7
IN(1kHz)
Input Referred Current Noise
0.01
GBW
Gain-Bandwidth Product
4.5
SR
Slew Rate
10
nV/
max
www.national.com
2
2
pA/
2
MHZ
min
V/µs
5.0V Electrical Characteristics
V+ = 5.0V, V− = 0V, VCM = 2.5V, TA = 25˚C unless otherwise stated.Boldface limits apply over theTemperature Range.
Symbol
Parameter
Typ
(Note 5)
Limit
(Note 2)
Units
0.05
1.0
1.5
mV
max
VOS
Input Offset Voltage
CMRR
Common Mode Rejection Ratio
0V < VCM < 3.6V
103
85
70
dB
min
PSRR
Power Supply Rejection Ratio
V+ = 2.7V to 5.0V
107
85
70
dB
min
IS
Supply Current
0.6
0.8
0.85
mA
max
IIN
Input Current
1.5
100
pA
max
IOS
Input offset Current
AVOL
Voltage Gain
VO
VO
IO
Positive Voltage Swing
Negative Voltage Swing
Output Current
0.2
RL = 10k Connect to V+/2
VO = 0.2V to 4.5V
RL = 2k Connect to V+/2
VO = 0.2V to 4.5V
RL = 10k Connect to V+/2
pA
120
110
95
120
100
85
4.89
4.82
4.80
RL = 2k Connect to V+/2
4.89
4.82
4.80
RL = 10k Connect to V+/2
86
160
180
RL = 2k Connect to V+/2
86
160
180
Sourcing, VO = 0V
VIN (diff) = ± 0.5V
Sinking, VO = 5V
VIN (diff) = ± 0.5V
15
8.0
2.5
20
8.0
2.5
db
min
V
min
mV
max
mA
min
en
(10Hz)
Input Referred Voltage Noise
15
nV/
en
(1kHz)
Input Referred Voltage Noise
6.5
nV/
en
(30kHz)
Input Referred Voltage Noise
6.5
IN (1kHz)
Input Referred Current Noise
0.01
GBW
Gain-Bandwidth Product
SR
Slew Rate
10
nV/
max
5
2.3
pA/
2
MHz
min
V/µs
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device
beyond its rated operating conditions.
Note 2: All limits are guaranteed by testing or statistical analysis
Note 3: Human body model, 1.5kΩ in series with 100pF. Machine model, 200Ω in series with 1000pF.
Note 4: The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(max) - TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 5: Typical values represent the most likely parametric norm.
Note 6: All numbers are typical, and apply to packages soldered directly onto PC board in still air.
3
www.national.com
Typical Performance Characteristics
Supply Curent vs. Voltage
VOS vs. VCM
V+ = 2.7V
VOS vs VCM
V+ = 5.0V
DS101081-35
DS101081-38
Source Current vs Out
V+ = 2.7V
Source Current vs VOUT
V+ = 5.0V
DS101081-37
Gain/Phase
DS101081-3
DS101081-28
Sinking Current vs VOUT
V+ = 2.7V
DS101081-29
Sinking Current vs VOUT
V+ = 5.0V
VOS vs V+
DS101081-36
DS101081-30
www.national.com
DS101081-31
4
Typical Performance Characteristics
VIN vs VOUT
V+ = 2.7V, RL = 2k
(Continued)
VIN vs VOUT
V+ = 5.0V, RL = 2k
DS101081-32
Input Bias vs VCM
TA = 85˚C
Input Bias vs VCM
TA = 25˚C
DS101081-33
PSRR +
DS101081-16
PSRR −
DS101081-26
DS101081-25
DS101081-5
Voltage Noise
CMRR
DS101081-2
DS101081-39
5
www.national.com
Where T = temperature in ˚K
R = resistor value in ohms
Application Hints
1.0 Noise
There are many sources of noise in a system: thermal noise,
shot noise, 1/f, popcorn noise, resistor noise, just to name a
few. In addition to starting with a low noise op amp, such as
the LMV751, careful attention to detail will result in the lowest overall noise for the system.
1.1 To invert or not invert?
B = noise bandwidth in Hz
K = Boltzmann’s constant (1.38 x 10-23 W-sec/˚K)
Actual resistor noise measurements may have more noise
than the calculated value. This additional noise component is
known as excess noise. Excess noise has a 1/f spectral response, and is proportional to the voltage drop across the resistor. It is convenient to define a noise index when referring
to excess noise in resistors. The noise index is the RMS
value in uV of noise in the resistor per volt of DC drop across
the resistor in a decade of frequency. Noise index expressed
in dB is:
NI = 20 log ((EEX/VDC) x 106) db
Both inverting and non-inverting amplifiers employ feedback
to stabilize the closed loop gain of the block being designed.
The loop gain (in decibels) equals the algebraic difference
between the open loop and closed loop gains. Feedback improves the Total Harmonic Distortion (THD) and the output
impedance. The various noise sources, when input referred,
are amplified, not by the closed loop gain, but by the noise
gain. For a non-inverting amplifier, the noise gain is equal to
the closed loop gain, but for an inverting amplifier, the noise
gain is equal to the closed loop gain plus one. For large
gains, e.g., 100, the difference is negligible, but for small
gains, such as one, the noise gain for the inverting amplifier
would be two. This implies that non-inverting blocks are preferred at low gains.
1.2 Source impedance
Because noise sources are uncorrelated, the system noise
is calculated by taking the RMS sum of the various noise
sources, that is, the square root of the sum of the squares. At
very low source impedances, the voltage noise will dominate; at very high source impedances, the input noise current times the equivalent external resistance will dominate.
For a detailed example calculation, refer to Note 1.
1.3 Bias current compensation resistor
In CMOS input op amps, the input bias currents are very low,
so there is no need to use RCOMP (Figure 1 and 2) for bias
current compensation that would normally be used with early
generation bipolar op amps. In fact, inclusion of the resistor
would act as another thermal noise source in the system, increasing the overall noise.
Where: EEX = resistor excess noise in uV per frequency decade.
VDC = DC voltage drop across the resistor.
Excess noise in carbon composition resistors corresponds to
a large noise index of +10 dB to -20 dB. Carbon film resistors
have a noise index of -10 dB to -25 dB. Metal film and wire
wound resistors show the least amount of excess noise, with
a noise index figure of -15 dB to -40 dB.
1.5 Other noise sources:
As the op amp and resistor noise sources are decreased,
other noise contributors will now be noticeable. Small air currents across thermocouples will result in low frequency
variations. Any two dissimilar metals, such as the lead on the
IC and the solder and copper foil of the pc board, will form a
thermocouple. The source itself may also generate noise. An
example would be a resistive bridge. All resistive sources
generate thermal noise based on the same equation listed
above under ″resistor types″.(2)
DS101081-23
Figure 1
DS101081-24
Figure 2
1.4 Resistor types
Thermal noise is generated by any passive resistive element. This noise is ″white″; meaning it has a constant spectral density. Thermal noise can be represented by a meansquare voltage generator eR2 in series with a noiseless
resistor, where eR2 is given by: Where:
eR2 = 4K TRB (volts)2
www.national.com
6
Application Hints
2.2 Rail-to-Rail
Because of the output stage discussed above, the LMV751
will swing “rail-to-rail” on the output. This normally means
within a few hundred millivolts of each rail with a reasonable
load. Referring to the Electrical Characteristics table for 2.7V
to 5.0V, it can be seen that this is true for resistive loads of
2kΩ and 10kΩ. The input stage consists of cascoded
P-channel MOSFETS, so the input common mode range includes ground, but typically requires 1.2V to 1.3V headroom
from the positive rail. This is better than the industry standard LM324 and LM358 that have PNP input stages, and the
LMV751 has the advantage of much lower input bias currents.
2.3 Loading
(Continued)
1.6 Putting it all together
To a first approximation, the total input referred noise of an
op amp is:
Et2 = en2 + ereq2 + (in*Req)2
where Req is the equivalent source resistance at the inputs.
At low impedances, voltage noise dominates. At high impedances, current noise dominates. With a typical noise current
on most CMOS input op amps of 0.01 pA/rt-Hz, the current
noise contribution will be smaller than the voltage noise for
Req less than one megohm.
2.0 Other Considerations
2.1 Comparator operation
Occasionally operational amplifiers are used as comparators. This is not optimum for the LMV751 for several reasons. First, the LMV751 is compensated for unity gain stability, so the speed will be less than could be obtained on the
same process with a circuit specifically designed for comparator operation. Second, op amp output stages are designed to be linear, and will not necessarily meet the logic
levels required under all conditions. Lastly, the LMV751 has
the newer PNP-NPN common emitter output stage, characteristic of many rail-to-rail output op amps. This means that
when used in open loop applications, such as comparators,
with very light loads, the output PNP will saturate, with the
output current being diverted into the previous stage. As a
result, the supply current will increase to the 20-30 mA.
range. When used as a comparator, a resistive load between
2kΩ and 10kΩ should be used with a small amount of hysteresis to alleviate this problem. When used as an op amp, the
closed loop gain will drive the inverting input to within a few
millivolts of the non-inverting input. This will automatically reduce the output drive as the output settles to the correct
value; thus it is only when used as a comparator that the current will increase to the tens of milliampere range.
The LMV751 is a low noise, high speed op amp with excellent phase margin and stablility. Capacitive loads up to 1000
pF can be handled, but larger capacitive loads should be isolated from the output. The most straightforward way to do
this is to put a resistor in series with the output. This resistor
will also prevent excess power dissapation if the output is accidentally shorted.
2.4 General Circuits
With the low noise and low input bias current, the LMV751
would be useful in active filters, integrators, current to voltage converters, low frequency sine wave generators, and instrumentation amplifiers. (3)
Note: 1. Sherwin, Jim “Noise Specs Confusing?” AN-104, National Semiconductor.
2. Christensen, John, “Noise-figure curve ease the selection of
low-noise op amps”, EDN, pp 81-84, Aug. 4, 1994
3. “Op Amp Circuit Collection”, AN-31, National Semiconductor.
7
www.national.com
LMV751 Low Noise, Low Vos, Single Op Amp
Physical Dimensions
inches (millimeters) unless otherwise noted
SOT23-5
Order Number LMV751M5
NS Package Number MA05B
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
National Semiconductor
Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: [email protected]
www.national.com
National Semiconductor
Europe
Fax: +49 (0) 1 80-530 85 86
Email: [email protected]
Deutsch Tel: +49 (0) 1 80-530 85 85
English Tel: +49 (0) 1 80-532 78 32
Français Tel: +49 (0) 1 80-532 93 58
Italiano Tel: +49 (0) 1 80-534 16 80
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
National Semiconductor
Asia Pacific Customer
Response Group
Tel: 65-2544466
Fax: 65-2504466
Email: [email protected]
National Semiconductor
Japan Ltd.
Tel: 81-3-5639-7560
Fax: 81-3-5639-7507
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
Similar pages