SEMICONDUCTOR TECHNICAL DATA The MC100LVEL13 is a dual, fully differential 1:3 fanout buffer. The MC100EL13 is pin and functionally equivalent to the MC100LVEL13 but is specified for operation at the standard 100E ECL voltage supply. The Low Output–Output Skew of the device makes it ideal for distributing two different frequency synchronous signals. The differential inputs have special circuitry which ensures device stability under open input conditions. When both differential inputs are left open the D input will pull down to VEE, The D input will bias around VCC/2 and the Q output will go LOW. 20 • • • • • • Differential Inputs and Outputs 20–Lead SOIC Packaging 500ps Typical Propagation Delays 50ps Output–Output Skews Supports Both Standard and Low Voltage 100K ECL >2000V ESD Protection 1 DW SUFFIX PLASTIC SOIC PACKAGE CASE 751D–04 Logic Diagram and Pinout: 20–Lead SOIC (Top View) Q1a Q1a Q2a Q2a VCC Q2b Q2b Q1b Q1b VEE 20 19 18 17 16 15 14 13 12 11 1 2 Q0a Q0a 3 4 5 6 7 8 VCC CLKa CLKa CLKb CLKb VCC 9 10 Q0b Q0b PIN NAMES Pins Function Qna, Qna Qnb, Qnb CLKn, CLKn Differential Clock Outputs Differential Clock Outputs Differential Clock Inputs MC100LVEL13 DC CHARACTERISTICS (VEE = –3.0V to –3.8V; VCC = GND) –40°C Symbol Characteristic IEE Power Supply Current IIH Input HIGH Current IINL Input LOW Current Min 0°C Typ Max 30 38 Min 150 Dn Dn 0.5 –300 25°C Typ Max 30 38 Min 150 0.5 –300 4–1 Max 30 38 Min 150 0.5 –300 4/95 Motorola, Inc. 1996 85°C Typ REV 1 0.5 –300 Typ Max Unit 32 40 mA 150 µA µA MC100LVEL13 MC100EL13 MC100LVEL13 AC CHARACTERISTICS (VEE = –3.0V to –3.8V; VCC = GND) –40°C Symbol Characteristic Min Typ 0°C Max Min 600 420 Typ 25°C Max Min 610 430 Typ 85°C Max Min 620 450 Typ Max tPLH tPHL Propagation Delay CLK→Q/Q tsk(O) Output–Output Skew Any Qa→Qa, Any Qb→Qb Any Qa→Any Qb tsk(DC) Duty Cycle Skew |tPLH–tPHL| Minimum Input Swing1 150 1000 150 1000 150 1000 150 1000 VCMR Common Mode Range2 VPP < 500mV VPP ≥ 500mV –2.0 –1.8 –0.4 –0.4 –2.1 –1.9 –0.4 –0.4 –2.1 –1.9 –0.4 –0.4 –2.1 –1.9 –0.4 –0.4 tr tf Output Rise/Fall Times Q (20% – 80%) 230 500 230 500 230 500 230 500 VPP Unit ps 410 640 ps 50 75 50 75 50 75 50 75 50 50 50 50 ps mV V ps 1. Minimum input swing for which AC parameters guaranteed. The device has a DC gain of ≈40. 2. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1V. The lower end of the CMR range varies 1:1 with VEE. The numbers in the spec table assume a nominal VEE = –3.3V. Note for PECL operation, the VCMR(min) will be fixed at 3.3V – |VCMR(min)|. MC100EL13 DC CHARACTERISTICS (VEE = –4.2V to –5.5V; VCC = GND) –40°C Symbol Characteristic IEE Power Supply Current IIH Input HIGH Current IINL Input LOW Current Min 0°C Typ Max 30 38 Min Typ Max 30 38 150 Dn Dn 0.5 –300 25°C Min Typ Max 30 38 150 0.5 –300 85°C Min Typ Max Unit 32 40 mA 150 µA 150 0.5 –300 µA 0.5 –300 MC100EL13 AC CHARACTERISTICS (VEE = –4.2V to –5.5V; VCC = GND) –40°C Symbol Characteristic Min Typ 0°C Max Min 600 420 Typ 25°C Max Min 610 430 Typ 85°C Max Min 620 450 Typ Max tPLH tPHL Propagation Delay CLK→Q/Q tsk(O) Output–Output Skew Any Qa→Qa, Any Qb→Qb Any Qa→Any Qb tsk(DC) Duty Cycle Skew |tPLH–tPHL| Minimum Input Swing1 150 1000 150 1000 150 1000 150 1000 VCMR Common Mode Range2 VPP < 500mV VPP ≥ 500mV –3.2 –3.0 –0.4 –0.4 –3.3 –3.1 –0.4 –0.4 –3.3 –3.1 –0.4 –0.4 –3.3 –3.1 –0.4 –0.4 tr tf Output Rise/Fall Times Q (20% – 80%) 230 500 230 500 230 500 230 500 VPP Unit ps 410 640 ps 50 75 50 75 50 75 50 75 50 50 50 50 ps mV V ps 1. Minimum input swing for which AC parameters guaranteed. The device has a DC gain of ≈40. 2. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1V. The lower end of the CMR range varies 1:1 with VEE. The numbers in the spec table assume a nominal VEE = –4.5V. Note for PECL operation, the VCMR(min) will be fixed at 5.0V – |VCMR(min)|. MOTOROLA 4–2 ECLinPS and ECLinPS Lite DL140 — Rev 3 MC100LVEL13 MC100EL13 OUTLINE DIMENSIONS DW SUFFIX PLASTIC SOIC PACKAGE CASE 751D–04 ISSUE E –A – 20 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 1 –B – P 10 PL A B 0.010 (0.25) M B M 10 D 20 PL 0.010 (0.25) J M T S S F R X 45° C –T G K 18 PL SEATING – PLANE M DIM A B C D F G J K M P R MILLIMETERS MIN MAX 12.65 12.95 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 0.25 0.32 0.10 0.25 0° 7° 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.499 0.510 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 0° 7° 0.395 0.415 0.010 0.029 Motorola reserves the right to make changes without further notice to any products herein. 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How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 MFAX: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 ◊ ECLinPS and ECLinPS Lite DL140 — Rev 3 4–3 *MC100LVEL13/D* MC100LVEL13/D MOTOROLA