Order this document by MC13280AY/D 80/100 MHz VIDEO PROCESSOR The MC13280AY and MC13281A/B are three channel wideband amplifiers designed for use as a video pre–amplifier in high resolution RGB color monitors. Features: 4.0 Vpp Output Swing 3.5 ns Rise/Fall Time, 100 MHz Bandwidth (MC13281A/B) 24 4.3 ns Rise/Fall Time, 80 MHz Bandwidth (MC13280AY) P SUFFIX PLASTIC PACKAGE CASE 724 1 Subcontrast Controls for Each Channel Main Contrast Control Blanking and Clamping Inputs Packages: NDIP–24 and NDIP–20 A Single PC Board Pattern Can Accept the MC13281A and the MC13282A (Video Amplifier with OSD) 20 PIN CONNECTIONS ORDERING INFORMATION Operating Temperature Range MC13280AYP MC13281AP TA = 0° to +70°C MC13281BP R Input 2 Plastic DIP G Subcontrast 3 Plastic DIP G Input 4 B Subcontrast 5 Plastic DIP B Input 6 Gnd 7 N/C 8 VCC 9 N/C 10 ABSOLUTE MAXIMUM RATINGS Value Unit VCC Video VCC –0.5, 10 –0.5, 10 Vdc 2, 4, 6 –0.5, +5.0 Vdc Video VCC 120 mA Storage Temperature – –65 to +150 °C G Subcontrast 3 Junction Temperature – 150 °C G Input 4 B Subcontrast 5 Power Supply Voltage Voltage at Video Amplifier Inputs Collector–Emitter Current (Three Channels) NOTES: 1. Devices should not be operated at these limits. Refer to “Recommended Operating Conditions” section for actual device operation. 2. ESD data available upon request. 23 Clamp 22 R Emitter 21 R Clamp 20 V5 19 G Emitter 18 G Clamp 17 Video VCC 16 B Clamp 15 B Emitter 14 Fast Commutate N/C 11 N/C 12 Pin Rating 24 Blank R Subcontrast 1 Package MC13281A Device P SUFFIX PLASTIC PACKAGE CASE 738 1 13 Contrast (Top View) R Subcontrast 1 20 Blank R Input 2 B Input 6 Gnd 7 19 Clamp 18 R Emitter MC13280AY MC13281B • • • • • • • • VCC 8 Contrast 9 17 R Clamp 16 V5 15 G Emitter 14 G Clamp 13 Video VCC 12 B Clamp Fast Commutate 10 11 B Emitter (Top View) This document contains information on a new product. Specifications and information herein are subject to change without notice. MOTOROLA ANALOG IC DEVICE DATA Motorola, Inc. 1996 Rev 0 1 MC13280AY MC13281A/B RECOMMENDED OPERATING CONDITIONS Characteristic Pin Min Typ Max Unit VCC, Video VCC 7.6 8.0 8.4 Vdc Contrast 0 – 5.0 Vdc Subcontrast Control 1, 3, 5 0 – 5.0 Vdc Blanking Input Signal Amplitude Blank 0 – 5.0 V Clamping Input Signal Amplitude Clamp 0 – 5.0 V Video Signal Amplitude (with 75 Ω Termination) 2, 4, 6 – 0.7 1.0 Vpp Video VCC 0 – 50 mA Clamp 500 – – ns – 0 – 70 °C Power Supply Voltage Contrast Control Collector–Emitter Current (Total for Three Channels) Clamp Pulse Width Operating Ambient Temperature ELECTRICAL CHARACTERISTICS (Refer to Test Circuit Figure 1, TA = 25°C, VCC = 8.0 Vdc.) Characteristic Condition Pin Min Typ Max Unit – 2, 4, 6 100 – – kΩ – 2.4 – Vdc V2, V4, V6 = 0.7 Vpp V1 V3, V1, V3 V5 = 5 5.0 0V Contrast = 5.0 V R, G, B Emitters 3.6 4.0 – Vpp – 5.6 – V/V Contrast = 5.0 to 0 V V1, V3, V5 = 5.0 V Contrast – –26 – dB V1, V3, V5 = 5.0 to 0 V Contrast = 5.0 V 1, 3, 5 – –26 – dB Emitter DC Level – – 1.0 1.2 1.4 Vdc Blanking Input Threshold – Blank – 1.25 – V Clamping Input Threshold – Clamp – 3.75 – V MC13280AY MC13281A/B V2, V4, V6 = 0.7 Vpp Vout = 4.0 Vpp RL > 300 Ω, CL < 5.0 pF R, G, B Emitters – – 4.3 3.5 – – MC13280AY MC13281A/B V2, V4, V6 = 0.7 Vpp Vout = 4.0 Vpp RL > 300 Ω, CL < 5.0 pF R, G, B Emitters – – 4.3 3.5 – – MC13280AY MC13281A/B V2, V4, V6 = 0.7 Vpp V1, V3, V5, Contrast = 5.0 V RL > 300 Ω, CL < 5.0 pF R, G, B Emitters – – 80 100 – – VCC, Video VCC = 8.0 V – – 70 – Input Impedance Internal DC Bias Voltage Output Signal Amplitude Voltage Gain Contrast Control Subcontrast Control Video Rise Time Video Fall Time Video Bandwidth Power Supply Current NOTE: 2 ns ns MHz mA It is recommended to use a double sided PCB layout for high frequency measurement (e.g., rise/fall time, bandwidth). MOTOROLA ANALOG IC DEVICE DATA MC13280AY MC13281A/B Figure 1. Internal Block Diagram R Clamp Fast Commutate Vref2 Vref1 Video VCC R Input R Emitter R Subcontrast Contrast and Subcontrast Control Processor R Channel G Clamp Contrast Vref2 Vref1 G Input G Emitter Blank Clamp Blank Decoder G Subcontrast Contrast and Subcontrast Control Processor Clamp G Channel Vref1 B Clamp Vref2 B Input B Emitter VCC B Channel V5 B Subcontrast Contrast and Subcontrast Control Processor Gnd This device contains 272 active transistors. MOTOROLA ANALOG IC DEVICE DATA 3 MC13280AY MC13281A/B PIN FUNCTION DESCRIPTION MC13280AY MC13281B Pin MC13281A Pin 1 1 R Subcontrast Control 3 3 G Subcontrast Control 5 5 B Subcontrast Control 2 2 R Input Name Equivalent Internal Circuit Description These pins provides a maximum of 26 dB attenuation to vary the gain of each video amplifier separately. VCC 50 k 5.0 V Input voltage is from 0 to 5.0 V. Increasing the voltage will increase the contrast level. The input coupling capacitor is used for input clamping storage. The maximum source impedance is 100 Ω. Vref 4 4 G Input 0.1 Cl Clamp 75 Ω 5.0 V I t polarity l it off the th video id signal i l is i Input positive. 10 k 6 6 B Input 7 7 Ground Ground pin. Connect to a clean, solid ground. N/A 8 N/C Connected to ground. 10 N/C 11 N/C 12 N/C 8 9 VCC 9 13 Contrast Connect to 8.0 Vdc supply, ±5%. Decoupling is required at this pin. 5.0 V 2.5 V 42 k 10 14 Fast Commutate 11 15 B Emitter Output 15 19 G Emitter Output 18 22 R Emitter Output 2.0 k Overall Contrast Control for the three channels. The input range is 0 V to 5.0 V. An increase of voltage increases the contrast. Must be connected to ground. The video outputs are configured as emitter–followers with a driving capability of about 15 mA each. VCC Video Signal Contrast 4 Nominal 0.7 Vpp input signal is recommended (maximum 1.0 1 0 Vpp). Vpp) 10k 1.0 The dc voltage at these three emitters is set to 1.2 V (black level). RE = 330 Typical The dc current through the output stage is determined by the emitter resistors (typically 330 Ω). MOTOROLA ANALOG IC DEVICE DATA MC13280AY MC13281A/B PIN FUNCTION DESCRIPTION (continued) MC13280AY MC13281B Pin MC13281A Pin 12 16 Name Equivalent Internal Circuit B Clamp Capacitor 14 18 G Clamp Capacitor 17 21 R Clamp Capacitor 13 17 Video VCC 16 20 5.0 Vref (V5) Description A 100 nF capacitor is connected to each of these pins. 1.2 V Video Out The capacitor is used for video output dc restoration. VCC Connect to 8.0 V dc supply, ±5%. The VCC is for the video output stage. It is internally connected to the collectors of the output transistors. 5.0 V regulator. Minimum 10 µF capacitor is required for noise filtering and compensation. It can source up to 20 mA but not sink current. Output impedance is ≈ 10 Ω. Recommended for use as a voltage reference only. VCC Band Gap Regulator 5.0 V 10 µF 19 23 R Clamp VCC 0.8 R This pin is used for video clamping. Vref1 The threshold clamping level is 3.75 V. 30 k Vref2 10 k 3.75 V 20 24 Blank VCC Vref2 This pin is used for video blanking. Vref1 The threshold blanking level is 1.25 V. 30 k 10 k 1.25 V MOTOROLA ANALOG IC DEVICE DATA 5 MC13280AY MC13281A/B FUNCTIONAL DESCRIPTION Contrast Control The contrast control varies the gain of three video amplifiers from a minimum of 0.3 V/V to a maximum of 5.6 V/V when all subcontrast levels are set to 5.0 V. The MC13280AY and MC13281A/B are composed of three video amplifiers, clamping and blanking circuitry with contrast and subcontrast controls. Each video amplifier is designed to have a –3.0 dB bandwidth of 100 MHz (MC13281, 80 MHz for the MC13280) with a gain of up to about 5.6 V/V, or 15 dB. Subcontrast Control Each subcontrast control provides a maximum of 26 dB attenuation on each video amplifier separately. Video Input The video input stages are high impedance and designed to accept a maximum signal of 1.0 Vpp with 75 Ω termination (typically) provided externally. During the clamping period, a current is provided to the input capacitor by the clamping circuit which brings the input to a proper dc level (nominal 2.0 V). The blanking and clamping signals are to be provided externally, with their thresholds at 1.25 V and 3.75 V, respectively. Clamp Pulse Input The clamping pulse is provided externally, and the pulse width must be no less than 500 ns. Blank Pulse Input The blanking pulse is used to blank the video signal during the horizontal sync period, or used as a control pin for video mute function. Video Output The video output stages are configured as emitter– followers, with a driving capability of about 15 mA for each channel. The dc voltage at these three emitters is set to 1.2 V (black level). The dc current through each output stage is determined by the emitter resistor (typically 330 Ω). Fast Commutate This pin should be connected to ground. Power Supplies VCC and Video VCC supplies are to be 8.0 V ±5%. Figure 2. Test Circuit Blank Input 8.0 V Clamp Input C15 0.1 C14 47 µF Blank C1 0.1 R Input G Input C2 0.1 B Input C3 0.1 R1 75 R2 75 Clamp Fast Commutate Video VCC VCC R Input R Emitter G Input G Emitter B Input B Emitter R Output G Output B Output R4 330 R3 75 R5 330 R6 330 MC13280AY MC13281A/B R Clamp G Clamp Gnd C13 0.1 C12 0.1 B Clamp C11 0.1 V5 Clamp Capacitor R C4 0.1 Subcontrast Control G C5 10 µF 6 C7 0.1 C6 0.1 5.0 V Contrast B 5.0 V C8 0.1 5.0 V C10 0.1 5.0 V MOTOROLA ANALOG IC DEVICE DATA MC13280AY MC13281A/B APPLICATION INFORMATION PCB Layout Care should be taken in the PCB layout to minimize the noise effects. The most sensitive pins are VCC, Video VCC, V5 and Clamp. It is strongly recommended to make a ground plane and connect VCC/Video VCC and ground traces, to the power supply directly. Separate power supply traces should be used for VCC and Video VCC and decoupling capacitors should be connected as close as possible to the device. Multi–layer ceramic and tantalum capacitors are recommended. V5 is designed as a 5.0 V voltage reference for contrast, and RGB subcontrast controls, so the same precautions for VCC should also be applied at this pin. The Clamp capacitors should be connected to ground close to IC’s ground pin, or power supply ground. The copper trace of video signal inputs and outputs should be as short as possible and separated by ground traces to avoid any RGB cross–interference. A double sided PCB should be used to optimize the device’s performance. RGB Input and Output The RGB output stages are designed as emitter–followers to drive the CRT driver circuitry directly. The emitter resistors used are 330 Ω (typically) and the driving current is 15 mA maximum for each channel. The loading impedance connected to the output stages should be greater than 330 Ω and less than 5.0 pF for optimum performance (e.g., rise/fall time, bandwidth, etc.). Decreasing the resistive load will MOTOROLA ANALOG IC DEVICE DATA reduce the rise/fall time by increasing the driving current, but the output stage may be damaged due to increasing power dissipation at the same time. The frequency response is affected by the loading capacitance. The typical value is 3.0 to 5.0 pF. Figure 3 shows a typical interface with a video output driver. For high resolution color monitor application, it is recommended to use coaxial cable or shielded cable for input signal connections. Clamp and Blank Input The clamp input is normally (except for Sync–on–Green) connected to a positive horizontal sync pulse and has a threshold level of 3.75 V. It is used as a timing reference for the dc restoration process, so it cannot be an open circuit. If Sync–on–Green timing mode is used, the clamping pulse should be located at the horizontal back porch period instead of horizontal sync. Otherwise, the black level will be clamped at the wrong dc level. The blank input is used as a video mute, or horizontal blanking control pin, and is normally connected to a blanking pulse generated from the flyback or MCU. The threshold level is 1.25 V. The blanking pulse width should be equal to the flyback retrace period to make sure that the video signal is blanked properly during retrace. It is necessary to limit the amplitude and avoid any negative undershoot if the flyback pulse is used. The blanking input pin cannot accept a negative voltage. This pin should be grounded if it is not used. 7 MC13280AY MC13281A/B Figure 3. Interfacing with Video Output Drivers CRT Driver VCC Reference Voltage CL 5.0 V 8.0 V C11 C12 10 µF 47 µF VR1 50 k VR2 50 k R4 10 VR3 50 k C10 0.1 R G B V5 Contrast Contrast Contrast C7 47 µF C9 0.1 Gnd Video VCC VCC R Emitter C1 0.1 R Input C3 0.1 R5 330 R Input C2 0.1 G Input C3 0.1 B Input R1 75 R2 75 R3 75 G Emitter R6 330 G Input B Input MC13280AY MC13281A/B B Emitter R7 330 R Clamp Video Processor Clamp RGB Output G Clamp Blank B Clamp Fast Commutate Contrast C4 0.1 C5 0.1 C6 0.1 5.0 V Clamp Input 8 Blank Input VR5 50 k MOTOROLA ANALOG IC DEVICE DATA MC13280AY MC13281A/B 4.0 3.5 3.5 VIDEO OUTPUT (Vpp) 4.0 3.0 2.5 2.0 1.5 3.0 2.5 2.0 1.5 1.0 1.0 0.5 0.5 0 VIDEO OUTPUT (Vpp) Figure 5. Contrast Control 4.5 0 0.2 0.4 0.6 0 0.8 2.0 4.0 CONTRAST CONTROL VOLTAGE (V) Figure 6. Subcontrast Control Figure 7. Crosstalk From Green to Red and Blue Channels 4.5 0 4.0 –10 3.5 6.0 –20 3.0 2.5 2.0 1.5 –30 –40 –50 1.0 –60 0.5 –70 0 0 VIDEO INPUT (Vpp) ATTENUATION (dB) VIDEO OUTPUT (Vpp) Figure 4. RGB In/Out Linearity 4.5 0 2.0 4.0 SUBCONTRAST VOLTAGE (V) MOTOROLA ANALOG IC DEVICE DATA 6.0 –80 1.0 Blue Channel Red Channel 10 100 1000 f, FREQUENCY (MHz) 9 MC13280AY MC13281A/B Figure 8. Rise Time for MC13281B Figure 9. Fall Time for MC13281B 100 mV/DIV 5.0 ns/DIV 10x PROBE 100 mV/DIV 5.0 ns/DIV 10x PROBE NOTE: Recommend to use a double sided PCB without any socket for rise/fall time measurements, using an input pulse with 1.5 ns rise/fall time and an active probe with 1.7 pF capacitance loading. Figure 10. Single Sided PCB Layout (Component Side) for MC13280AY, MC13281B Blank Clamp R In R VR1 G VR2 B VR3 R7 R Out R1 G In C6 C1 C7 C2 R2 C8 C3 J1 J3 IC1 J4 B In J2 C14 C15 R6 C13 C5 C4 R5 C12 C17 C16 C11 R4 R3 Gnd NOTE: 10 VCC 8.0 V G Out B Out C10 VR5 Main Contrast J = Jumper MOTOROLA ANALOG IC DEVICE DATA MC13280AY MC13281A/B OUTLINE DIMENSIONS P SUFFIX PLASTIC PACKAGE CASE 724–03 ISSUE D –A– 24 13 1 12 NOTES: 1. CHAMFERED CONTOUR OPTIONAL. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 4. CONTROLLING DIMENSION: INCH. –B– L C –T– NOTE 1 K SEATING PLANE N E G M J F D DIM A B C D E F G J K L M N 24 PL 0.25 (0.010) 24 PL 0.25 (0.010) T A M M T B M M INCHES MIN MAX 1.230 1.265 0.250 0.270 0.145 0.175 0.015 0.020 0.050 BSC 0.040 0.060 0.100 BSC 0.007 0.012 0.110 0.140 0.300 BSC 0_ 15_ 0.020 0.040 MILLIMETERS MIN MAX 31.25 32.13 6.35 6.85 3.69 4.44 0.38 0.51 1.27 BSC 1.02 1.52 2.54 BSC 0.18 0.30 2.80 3.55 7.62 BSC 0_ 15_ 0.51 1.01 P SUFFIX PLASTIC PACKAGE CASE 738–03 ISSUE E –A– 20 11 1 10 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. B L C –T– K SEATING PLANE M N E G F J D 0.25 (0.010) MOTOROLA ANALOG IC DEVICE DATA 20 PL 0.25 (0.010) 20 PL M T A M M T B M DIM A B C D E F G J K L M N INCHES MIN MAX 1.010 1.070 0.240 0.260 0.150 0.180 0.015 0.022 0.050 BSC 0.050 0.070 0.100 BSC 0.008 0.015 0.110 0.140 0.300 BSC 0_ 15 _ 0.020 0.040 MILLIMETERS MIN MAX 25.66 27.17 6.10 6.60 3.81 4.57 0.39 0.55 1.27 BSC 1.27 1.77 2.54 BSC 0.21 0.38 2.80 3.55 7.62 BSC 0_ 15_ 0.51 1.01 11 MC13280AY MC13281A/B Motorola reserves the right to make changes without further notice to any products herein. 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