ON MJD44E3 Darlington power transistor dpak for surface mount applications 10 amperes 80 volts, 20 watt Datasheet

MJD44E3
Preferred Device
Darlington Power Transistor
DPAK For Surface Mount Applications
Designed for general purpose power and switching output or driver
stages in applications such as switching regulators, converters, and
power amplifiers.
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Features
•
•
•
•
•
•
•
Electrically Similar to Popular D44E3 Device
High DC Gain − 1000 Min @ 5.0 Adc
Low Sat. Voltage − 1.5 V @ 5.0 Adc
Compatible With Existing Automatic Pick and Place Equipment
Epoxy Meets UL 94 V−0 @ 0.125 in
ESD Ratings: Human Body Model, 3B u 8000 V
Machine Model, C u 400 V
Pb−Free Package is Available
NPN DARLINGTON SILICON
POWER TRANSISTORS
10 AMPERES
80 VOLTS, 20 WATTS
4
1 2
3
MAXIMUM RATINGS
Rating
Symbol
Max
Unit
VCEO
80
Vdc
VEB
7
Vdc
Collector Current − Continuous
IC
10
Adc
Total Power Dissipation
@ TC = 25°C
Derate above 25°C
PD
Total Power Dissipation (Note 1)
@ TA = 25°C
Derate above 25°C
PD
Operating and Storage Junction
Temperature Range
Collector−Emitter Voltage
Emitter−Base Voltage
DPAK
CASE 369C
STYLE 1
MARKING DIAGRAM
W
20
0.16
W/°C
W
1.75
0.014
W/°C
TJ, Tstg
−55 to +150
°C
Symbol
Max
Unit
Thermal Resistance,
Junction−to−Case
RqJC
6.25
°C/W
Thermal Resistance,
Junction−to−Ambient (Note 1)
RqJA
71.4
°C/W
TL
260
°C
YWW
J
44E3G
THERMAL CHARACTERISTICS
Characteristic
Lead Temperature for Soldering
Y
WW
J44E3
G
= Year
= Work Week
= Device Code
= Pb−Free Package
ORDERING INFORMATION
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. These ratings are applicable when surface mounted on the minimum pad
sizes recommended.
Device
MJD44E3T4
MJD44E3T4G
Package
Shipping †
DPAK
2500/Tape & Reel
DPAK
(Pb−Free)
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2005
December, 2005 − Rev. 4
1
Publication Order Number:
MJD44E3/D
MJD44E3
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ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Collector Cutoff Current
(VCE = Rated VCEO, VBE = 0)
ICES
−
−
10
mA
Emitter Cutoff Current
(VEB = 7 Vdc)
IEBO
−
−
1
mA
−
−
−
−
1.5
2
OFF CHARACTERISTICS
ON CHARACTERISTICS
Collector−Emitter Saturation Voltage
(IC = 5 Adc, IB = 10 mAdc)
(IC = 10 Adc, IB = 20 mAdc)
VCE(sat)
Base−Emitter Saturation Voltage
(IC = 5 Adc, IB = 10 mAdc)
VBE(sat)
−
−
2.5
Vdc
hFE
1000
−
−
−
Ccb
−
−
130
pF
td + tr
−
0.6
−
ms
Storage Time
(IC = 10 Adc, IB1 = IB2 = 20 mAdc)
ts
−
2
−
ms
Fall Time
(IC = 10 Adc, IB1 = IB2 = 20 mAdc)
tf
−
0.5
−
ms
DC Current Gain
(VCE = 5 Vdc, IC = 5 Adc)
Vdc
DYNAMIC CHARACTERISTICS
Collector Capacitance
(VCB = 10 Vdc, ftest = 1 MHz)
SWITCHING TIMES
Delay and Rise Times
(IC = 10 Adc, IB1 = 20 mAdc)
TA TC
2.5 25
100 ms
5
PD, POWER DISSIPATION (WATTS)
IC, COLLECTOR CURRENT (AMPS)
10
1 ms
3
2
5 ms
1
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
0.5
0.3
0.2
0.1
TC = 25°C SINGLE PULSE
1
2
3
5
10
20 30
50
VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
100
2 20
TC
1.5 15
TA
1 10
0.5
5
0
0
25
50
75
100
T, TEMPERATURE (°C)
Figure 1. Maximum Forward Bias
Safe Operating Area
Figure 2. Power Derating
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2
125
150
MJD44E3
PACKAGE DIMENSIONS
DPAK
CASE 369C−01
ISSUE O
C
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
SEATING
PLANE
−T−
E
R
4
Z
A
S
1
2
DIM
A
B
C
D
E
F
G
H
J
K
L
R
S
U
V
Z
3
U
K
F
J
L
H
D 2 PL
G
0.13 (0.005)
M
T
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.090 BSC
0.180 0.215
0.025 0.040
0.020
−−−
0.035 0.050
0.155
−−−
MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
4.58 BSC
0.87
1.01
0.46
0.58
2.60
2.89
2.29 BSC
4.57
5.45
0.63
1.01
0.51
−−−
0.89
1.27
3.93
−−−
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
SOLDERING FOOTPRINT*
6.20
0.244
3.0
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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MJD44E3/D
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