AD ADuM3190BRQZ-RL7 High stability isolated error amplifier Datasheet

High Stability Isolated Error Amplifier
ADuM3190
Data Sheet
FEATURES
GENERAL DESCRIPTION
Stable over time and temperature
0.5% initial accuracy
1% accuracy over the full temperature range
Compatible with Type II or Type III compensation networks
Reference voltage: 1.225 V
Compatible with DOSA
Low power operation: <7 mA total
Wide voltage supply range
VDD1: 3 V to 20 V
VDD2: 3 V to 20 V
Bandwidth: 400 kHz
Isolation voltage: 2.5 kV rms
Safety and regulatory approvals (pending)
UL recognition: 2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 560 V peak
Wide temperature range
−40°C to +125°C ambient operation
150°C maximum junction temperature
The ADuM31901 is an isolated error amplifier based on Analog
Devices, Inc., iCoupler® technology. The ADuM3190 is ideal for
linear feedback power supplies. The primary side controllers of
the ADuM3190 enable improvements in transient response,
power density, and stability as compared to commonly used
optocoupler and shunt regulator solutions.
Unlike optocoupler-based solutions, which have an uncertain
current transfer ratio over lifetime and at high temperatures, the
ADuM3190 transfer function does not change over its lifetime
and it is stable over a wide temperature range of −40°C to +125°C.
Included in the ADuM3190 is a wideband operational amplifier
for a variety of commonly used power supply loop compensation
techniques. The ADuM3190 is fast enough to allow a feedback
loop to react to fast transient conditions and overcurrent conditions. Also included is a high accuracy 1.225 V reference to
compare with the supply output setpoint.
The ADuM3190 is packaged in a small 16-lead QSOP package
for a 2.5 kV rms isolation voltage rating.
APPLICATIONS
Linear power supplies
Inverters
Uninterruptible Power Supply (UPS)
DOSA-compatible modules
Voltage monitors
VDD1 1
16
VDD2
GND1 2
15
GND2
VREG1 3
14
VREG2
13
REFOUT
12
+IN
REFOUT1 4
REG
UVLO
UVLO
REF
REF
NC 5
EAOUT2 6
EAOUT 7
REG
Tx
Rx
GND1 8
11
–IN
10
COMP
9
GND2
11335-001
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
1
Protected by U.S. Patents 5,952,849, 6,873,065 and 7,075,329. Other patents pending.
Rev. 0
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ADuM3190
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Pin Configuration and Function Descriptions..............................7
Applications ....................................................................................... 1
Typical Performance Characteristics ..............................................8
General Description ......................................................................... 1
Test Circuits ..................................................................................... 11
Functional Block Diagram .............................................................. 1
Applications Information .............................................................. 12
Revision History ............................................................................... 2
Theory of Operation .................................................................. 12
Specifications..................................................................................... 3
Accuracy Circuit Operation...................................................... 12
Package Characteristics ............................................................... 4
Application Block Diagram ...................................................... 12
Regulatory Information ............................................................... 4
Setting the Output Voltage ........................................................ 13
Insulation and Safety Related Specifications ............................ 4
DOSA Module Application....................................................... 14
Recommended Operating Conditions ...................................... 4
DC Correctness and Magnetic Field Immunity .......................... 14
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics .............................................................................. 5
Insulation Lifetime ..................................................................... 15
Packaging and Ordering Information ......................................... 16
Absolute Maximum Ratings ....................................................... 6
Outline Dimensions ................................................................... 16
ESD Caution .................................................................................. 6
Ordering Guide .......................................................................... 16
REVISION HISTORY
2/13—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
Data Sheet
ADuM3190
SPECIFICATIONS
VDD1 = VDD2 = 3 V to 20 V for TA = TMIN to TMAX. All typical specifications are at TA = 25°C and VDD1 = VDD2 = 5 V, unless otherwise noted.
Table 1.
Parameter
ACCURACY
Initial Error
Total Error
OP AMP
Offset Error
Open-Loop Gain
Input Common-Mode Range
Gain Bandwidth Product
Common-Mode Rejection
Input Capacitance
Output Voltage Range
Input Bias Current
REFERENCE
Output Voltage
Output Current
UVLO
Positive Going Threshold
Negative Going Threshold
EAOUT Impedance
OUTPUT CHARACTERISTICS
Output Gain
Output −3 dB Bandwidth
A and S Grades
B and T Grades
Output Voltage
EAOUT
Low
High
EAOUT2
Low
High
Low
High
Noise
EAOUT
EAOUT2
POWER SUPPLY
Operating Range, Side 1
Operating Range, Side 2
Power Supply Rejection
Supply Current
IDD1
IDD2
Test Conditions/Comments
(1.225 V − EAOUT)/1.225 V × 100%; see Figure 18
TA = 25°C
TA = TMIN to TMAX
Min
−5
66
0.35
Typ
Max
Unit
0.25
0.5
0.5
1
%
%
±2.5
80
+5
mV
dB
V
MHz
dB
pF
V
μA
1.5
10
72
2
COMP pin
0.2
2.7
0.01
At 25°C, 0 mA to 1 mA load, CREFOUT = 15 pF
−40°C to +125°C, 0 mA to 1 mA load, CREFOUT = 15 pF
CREFOUT = 15 pF
1.215
1.213
2.0
1.225
1.225
1.235
1.237
V
V
mA
2.8
2.6
High-Z
2.96
2.4
V
V
Ω
0.9
1.0
1.1
V/V
2.34
2.6
2.86
V/V
100
250
200
400
2.4
2.5
VDD2 < UVLO threshold or VDD1 < UVLO threshold
From COMP to EAOUT, dc, 0.3 V to 2.4 V; and from
COMP to EAOUT2, dc, 0.4 V to 5.0 V
From COMP to EAOUT, 0.3 V to 2.4 V, ±3 mA; and from
COMP to EAOUT2, 0.4 V to 5.0 V, ±1 mA
kHz
kHz
±3 mA output
±1 mA output
VDD1 = 4.5 V to 5.5 V
VDD1 = 4.5 V to 5.5 V
VDD1 = 10 V to 20 V
VDD1 = 10 V to 20 V
See Figure 18
4.8
5.0
0.3
4.9
0.3
5.4
0.4
V
V
0.6
V
V
V
V
0.6
1.7
4.8
VDD1
VDD2
DC, VDD1 = VDD2 = 3 V to 20 V
See Figure 18
See Figure 18
3.0
3.0
60
1.4
2.9
Rev. 0 | Page 3 of 16
mV rms
mV rms
20
20
V
V
dB
2.0
5.0
mA
mA
ADuM3190
Data Sheet
PACKAGE CHARACTERISTICS
Table 2.
Parameter
RESISTANCE
Input-to-Output 1
CAPACITANCE
Input-to-Output1
Input Capacitance 2
IC JUNCTION-TO-AMBIENT THERMAL
RESISTANCE
16-Lead QSOP
1
2
Symbol
Min
Typ
Max
Unit
RI-O
1013
Ω
CI-O
CI
2.2
4.0
pF
pF
Test Conditions/Comments
f = 1 MHz
Thermocouple located at center of package underside
θJA
76
°C/W
The device is considered a 2-terminal device; Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
Input capacitance is from any input data pin to ground.
REGULATORY INFORMATION
The ADuM3190 is pending approval by the organizations listed in Table 3. See Table 8 and the Insulation Lifetime section for
recommended maximum working voltages for specific cross-isolation waveforms and insulation levels.
Table 3.
UL (Pending)
Recognized Under 1577 Component
Recognition Program 1
Single Protection, 2500 V rms Isolation
Voltage, 16-Lead QSOP
File E214400
1
2
CSA (Pending)
Approved under CSA Component
Acceptance Notice #5A
Basic insulation per CSA 60950-1-03 and
IEC 60950-1, 400 V rms (565 V peak)
maximum working voltage
File 205078
VDE (Pending)
Certified according to DIN V VDE V 0884-10
(VDE V 0884-10): 2006-12 2
Reinforced insulation, 560 V peak
File 2471900-4880-0001
In accordance with UL 1577, each ADuM3190 is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 sec (current leakage detection limit = 5 µA).
In accordance with DIN V VDE V 0884-10, each ADuM3190 is proof tested by applying an insulation test voltage ≥ 1050 V peak for 1 sec (partial discharge detection
limit = 5 pC). The asterisk (*) marked on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY RELATED SPECIFICATIONS
Table 4.
Parameter
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
Symbol
L(I01)
Value
2500
3.8 min
Unit
V rms
mm
Minimum External Tracking (Creepage)
L(I02)
3.1 min
mm
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Isolation Group
CTI
0.017 min
>400
II
mm
V
Test Conditions/Comments
1-minute duration
Measured from input terminals to output terminals,
shortest distance through air
Measured from input terminals to output terminals,
shortest distance path along body
Insulation distance through insulation
DIN IEC 112/VDE 0303, Part 1
Material Group DIN VDE 0110, 1/89, Table 1
RECOMMENDED OPERATING CONDITIONS
Table 5.
Parameter
OPERATING TEMPERATURE BY MODEL
ADuM3190A/ADuM3190B
ADuM3190S/ADuM3190T
SUPPLY VOLTAGES 1
INPUT SIGNAL RISE AND FALL TIMES
1
Symbol
TA
VDD1, VDD2
tR, tF
All voltages are relative to their respective grounds.
Rev. 0 | Page 4 of 16
Min
Max
Unit
−40
−40
3.0
+85
+125
20
1.0
°C
°C
V
ms
Data Sheet
ADuM3190
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
These isolators are suitable for reinforced isolation only within the safety limit data. Maintenance of the safety data is ensured by
protective circuits. The asterisk (*) marking branded on the package denotes DIN V VDE V 0884-10 approval for a 560 V peak working
voltage.
Table 6.
Description
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms
For Rated Mains Voltage ≤ 300 V rms
For Rated Mains Voltage ≤ 400 V rms
Climatic Classification
Pollution Degree per DIN VDE 0110, Table 1
Maximum Working Insulation Voltage
Input-to-Output Test Voltage, Method B1
Test Conditions/Comments
Symbol
VIORM × 1.875 = Vpd(m), 100% production test,
tini = tm = 1 sec, partial discharge < 5 pC
Input-to-Output Test Voltage, Method A
After Environmental Tests Subgroup 1
VIORM × 1.5 = Vpd(m), tini = 60 sec,
tm = 10 sec, partial discharge < 5 pC
VIORM × 1.2 = Vpd(m), tini = 60 sec,
tm = 10 sec, partial discharge < 5 pC
After Input and/or Safety Test Subgroup 2
and Subgroup 3
Highest Allowable Overvoltage
Surge Isolation Voltage
Safety Limiting Values
VPEAK = 10 kV; 1.2 µs rise time; 50 µs, 50% fall time
Maximum value allowed in the event of a failure
(see Figure 2)
Case Temperature
Safety Total Dissipated Power
Insulation Resistance at TS
VIO = 500 V
VIORM
Vpd(m)
V peak
V peak
Vpd(m)
840
V peak
Vpd(m)
672
V peak
VIOTM
VIOSM
3500
4000
V peak
V peak
TS
PS
RS
150
1.64
>109
°C
W
Ω
SAFE LIMITING POWER (W)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
50
100
150
AMBIENT TEMPERATURE (°C)
200
11335-004
0.2
0
Figure 2. Thermal Derating Curve, Dependence of Safety Limiting Values on Case
Temperature, per DIN V VDE V 0884-10
Rev. 0 | Page 5 of 16
Unit
I to IV
I to III
I to II
40/105/21
2
560
1050
1.8
0
Characteristic
ADuM3190
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
TA = 25°C, unless otherwise noted.
Table 7.
Parameter
Storage Temperature (TST) Range
Ambient Operating Temperature
(TA) Range
Junction Temperature
Supply Voltages
VDD1, VDD21
VREG1, VREG21
Input Voltages (+IN, −IN)
Output Voltages
REFOUT, COMP, REFOUT1, EAOUT
EAOUT2
Output Current per Output Pin
Common-Mode Transients2
1
2
Rating
−65°C to +150°C
−40°C to +125°C
−40°C to +150°C
Table 8. Maximum Continuous Working Voltage1
−0.5 V to +24 V
−0.5 V to +3.6 V
−0.5 V to +3.6 V
−0.5 V to +3.6 V
−0.5 V to +5.5 V
−11 mA to +11 mA
−100 kV/μs to +100 kV/μs
All voltages are relative to their respective grounds.
Refers to common-mode transients across the insulation barrier. Commonmode transients exceeding the absolute maximum ratings may cause
latch-up or permanent damage.
Parameter
WAVEFORM
AC Voltage
Bipolar
Unipolar
DC Voltage
1
Max
Unit
Constraint
560
1131
1131
V peak
V peak
V peak
50-year minimum lifetime
50-year minimum lifetime
50-year minimum lifetime
Refers to continuous voltage magnitude imposed across the isolation
barrier. See the Insulation Lifetime section for more details.
ESD CAUTION
Rev. 0 | Page 6 of 16
Data Sheet
ADuM3190
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
16 VDD2
2
15 GND2
14 VREG2
VREG1
3
REFOUT1
4
NC
5
EAOUT2
6
11 –IN
EAOUT
7
10 COMP
GND1
8
ADuM3190
TOP VIEW
(Not to Scale)
13 REFOUT
12 +IN
9
GND2
NC = NO CONNECTION. CONNECT PIN 5 TO GND1;
DO NOT LEAVE THIS PIN FLOATING.
11335-005
VDD1
Figure 3. Pin Configuration
Table 9. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
Mnemonic
VDD1
GND1
VREG1
REFOUT1
NC
EAOUT2
7
8
9
10
11
12
13
14
15
16
EAOUT
GND1
GND2
COMP
−IN
+IN
REFOUT
VREG2
GND2
VDD2
Description
Supply Voltage for Side 1 (3.0 V to 20 V). Connect a 1 μF capacitor between VDD1 and GND1.
Ground Reference for Side 1.
Internal Supply Voltage for Side 1. Connect a 1 μF capacitor between VREG1 and GND1.
Reference Output Voltage for Side 1. The maximum capacitance for this pin (CREFOUT1) must not exceed 15 pF.
No Connection. Connect Pin 5 to GND1; do not leave this pin floating.
Isolated Output Voltage 2, Open-Drain Output. Connect a pull-up resistor between EAOUT2 and VDD1 for current up to
1 mA.
Isolated Output Voltage.
Ground Reference for Side 1.
Ground Reference for Side 2.
Output of the Op Amp. A loop compensation network can be connected between the COMP pin and the −IN pin.
Inverting Op Amp Input. Pin 11 is the connection for the power supply setpoint and compensation network.
Noninverting Op Amp Input. Pin 12 can be used as a reference input.
Reference Output Voltage for Side 2. The maximum capacitance for this pin (CREFOUT) must not exceed 15 pF.
Internal Supply Voltage for Side 2. Connect a 1 μF capacitor between VREG2 and GND2.
Ground Reference for Side 2.
Supply Voltage for Side 2 (3.0 V to 20 V). Connect a 1 μF capacitor between VDD2 and GND2.
Rev. 0 | Page 7 of 16
ADuM3190
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
3
1.228
VDDx = 20V
VDDx = 5V
REFOUT ACCURACY (V)
1.227
2
IDD1 (mA)
1.226
1.225
1
1.224
–20
0
20
40
60
80
100
120
140
TEMPERATURE (°C)
1.222
–40
11335-017
0
–40
EAOUT ACCURACY (%)
60
80
100
120
140
3
2
0.5
0
–20
0
20
40
60
80
100
120
140
TEMPERATURE (°C)
–1.0
–40
11335-018
0
–40
10
2
OP AMP OFFSET VOLTAGE (mV)
3
8
6
4
40
60
80
100
120
TEMPERATURE (°C)
140
40
60
80
100
120
140
120
140
1
0
–1
–2
–3
–40
11335-019
2
20
20
Figure 8. EAOUT Accuracy vs. Temperature
12
0
0
TEMPERATURE (°C)
Figure 5. Typical IDD2 Supply Current vs. Temperature
–20
–20
11335-021
–0.5
11335-022
IDD2 (mA)
40
1.0
VDDx = 20V
VDDx = 5V
1
INPUT BIAS CURRENT (nA)
20
Figure 7. REFOUT Accuracy vs. Temperature
4
0
–40
0
TEMPERATURE (°C)
Figure 4. Typical IDD1 Supply Current vs. Temperature
5
–20
11335-020
1.223
–20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 9. Op Amp Offset Voltage vs. Temperature
Figure 6. +IN, −IN Input Bias Current vs. Temperature
Rev. 0 | Page 8 of 16
ADuM3190
0
90
–20
EAOUT OFFSET (mV)
100
80
70
–40
–60
–20
0
20
40
60
80
100
120
140
TEMPERATURE (°C)
–100
–40
20
40
60
80
100
120
140
120
140
Figure 13. EAOUT Offset vs. Temperature
1.05
0
–50
EAOUT2 OFFSET (mV)
1.04
EAOUT GAIN (V/V)
0
TEMPERATURE (°C)
Figure 10. Op Amp Open-Loop Gain vs. Temperature
1.03
1.02
1.01
–100
–150
–200
–250
–20
0
20
40
60
80
100
120
140
TEMPERATURE (°C)
–300
–40
11335-024
1.00
–40
–20
11335-026
50
–40
11335-027
–80
60
11335-023
OP AMP OPEN-LOOP GAIN (dB)
Data Sheet
–20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 11. EAOUT Gain vs. Temperature
Figure 14. EAOUT2 Offset vs. Temperature
2.70
2.68
2.66
2.64
2
2.60
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 12. EAOUT2 Gain vs. Temperature
120
140
CH1 10mV Ω
CH2 10mV Ω
M4.0µs
A CH1
T
102.4ns
1.18V
11335-028
2.62
11335-025
EAOUT2 GAIN (V/V)
1
Figure 15. Output Noise with Test Circuit 1, Channel 1 = EAOUT (10 mV/div),
Channel 2 = EAOUT2 (10 mV/div)
Rev. 0 | Page 9 of 16
ADuM3190
Data Sheet
2
1
1
3
CH1 100mV Ω CH2 100mV Ω
CH3 200mV Ω
M2µs
T
0s
A CH1
434mV
CH1 20mV Ω
CH3 20mV Ω
Figure 16. Output 100 kHz Signal with Test Circuit 3, Channel 1 = +IN,
Channel 2 = EAOUT, Channel 3 = EAOUT2
Rev. 0 | Page 10 of 16
CH2 50mV Ω
M2µs
A CH1
T
5.92µs
399mV
Figure 17. Output Square Wave Response with Test Circuit 3,
Channel 1 = +IN, Channel 2 = EAOUT, Channel 3 = EAOUT2
11335-030
3
11335-029
2
Data Sheet
ADuM3190
TEST CIRCUITS
VDD1
1µF
GND1
1µF
VREG1
1
16
2
15
REG
3
REFOUT1 4
UVLO
UVLO
REF
REF
NC 5
GND2
1µF
VREG2
1µF
REFOUT
13
12
Tx
EAOUT2 6
EAOUT
11
Rx
7
10
8
9
+IN
–IN
680Ω
COMP
2.2nF
GND2
11335-002
GND1
14
REG
VDD2
Figure 18. Test Circuit 1
VDD1
1µF
GND1
1µF
VREG1
1
16
2
15
REG
3
REFOUT1 4
ROD
UVLO
REF
6
11
Rx
1µF
VREG2
1µF
REFOUT
13
12
Tx
GND2
7
10
8
9
+IN
–IN
680Ω
COMP
2.2nF
GND2
11335-003
GND1
14
REG
REF
NC 5
EAOUT2
EAOUT
UVLO
VDD2
Figure 19. Test Circuit 2
GND1
1µF
VREG1
ROD
1
16
2
15
REG
3
REFOUT1 4
UVLO
EAOUT
GND1
6
14
REG
REF
REF
NC 5
EAOUT2
UVLO
Tx
Rx
13
12
11
7
10
8
9
Figure 20. Test Circuit 3
Rev. 0 | Page 11 of 16
VDD2
GND2
1µF
VREG2
1µF
REFOUT
+IN
–IN
COMP
GND2
11335-031
VDD1
1µF
ADuM3190
Data Sheet
APPLICATIONS INFORMATION
In the test circuits of the ADuM3190 (see Figure 18 through
Figure 20), external supply voltages from 3 V to 20 V are
provided to the VDD1 and VDD2 pins, and internal regulators
provide 3.0 V to operate the internal circuits of each side of the
ADuM3190. An internal precision 1.225 V reference provides
the reference for the ±1% accuracy of the isolated error amplifier.
UVLO circuits monitor the VDDx supplies to turn on the internal
circuits when the 2.8 V rising threshold is met and to turn off
the error amplifier outputs to a high impedance state when VDDx
falls below 2.6 V.
approximately 100 kHz, but the circuit is more stable with a phase
shift of approximately −120°, which yields a stable 60° phase
margin.
This circuit is used for accuracy tests only, not for real-world
applications, because it has a 680 Ω resistor across the isolation
barrier to close the loop for the error amplifier; this resistor
causes leakage current to flow across the isolation barrier. For
this test circuit only, GND1 must be connected to GND2 to create a
return for the leakage current created by the 680 Ω resistor
connection.
AMPLITUDE (dB)
The op amp on the right side of the device has a noninverting
+IN pin and an inverting −IN pin available for connecting a
feedback voltage in an isolated dc-to-dc converter output, usually
through a voltage divider. The COMP pin is the op amp output,
which can be used to attach resistor and capacitor components in
a compensation network. The COMP pin internally drives the Tx
transmitter block, which converts the op amp output voltage
into an encoded output that is used to drive the digital isolator
transformer.
100
OP AMP AND
LINEAR ISOLATOR
OP AMP
ALONE
LINEAR ISOLATOR
POLE AT 400kHz
100
1k
10k
1M
10M
FREQUENCY
(Hz)
LINEAR
ISOLATOR
PHASE (°)
100
100k
1k
10k
100k
1M
10M
FREQUENCY
(Hz)
–90
On the left side of the ADuM3190, the transformer output
PWM signal is decoded by the Rx block, which converts the
signal into a voltage that drives an amplifier block; the amplifier
block produces the error amplifier output available at the EAOUT
pin. The EAOUT pin can deliver ±3 mA and has a voltage level
between 0.4 V and 2.4 V, which is typically used to drive the
input of a PWM controller in a dc-to-dc circuit.
–180
11335-006
THEORY OF OPERATION
Figure 21. Bode Plot 1
AMPLITUDE (dB)
OP AMP AND
LINEAR ISOLATOR
100
For applications that need more output voltage to drive their
controllers, Figure 19 illustrates the use of the EAOUT2 pin output
which delivers up to ±1 mA with an output voltage of 0.6 V to 4.8 V
for an output that has a pull-up resistor to a 5 V supply. If the
EAOUT2 pull-up resistor connects to a 10 V to 20 V supply, the
output is specified to a minimum of 5.0 V to allow use with a
PWM controller requiring a minimum input operation of 5 V.
LINEAR ISOLATOR
POLE AT 400kHz
1k
10k
100k
1M
OP AMP
ALONE
FREQUENCY
(Hz)
10M
1k
10k
100k
1M
10M
INTEGRATOR
CONFIGURATION
100
PHASE (°)
100
FREQUENCY
(Hz)
–90
ACCURACY CIRCUIT OPERATION
See Figure 18 and Figure 19 for stability of the accuracy circuits.
The op amp on the right side of the ADuM3190, from the −IN
pin to the COMP pin, has a unity-gain bandwidth (UGBW) of
10 MHz. Figure 21, Bode Plot 1, shows a dashed line for the op
amp alone and its 10 MHz pole.
Figure 21 also shows the linear isolator alone (the blocks from
the op amp output to the ADuM3190 output, labeled as the
linear isolator), which introduces a pole at approximately
400 kHz. This total Bode plot of the op amp and linear isolator
shows that the phase shift is approximately −180° from the −IN
pin to the EAOUT pin before the crossover frequency. Because a
−180° phase shift can make the system unstable, adding an integrator configuration, as shown in the test circuits in Figure 18 and
Figure 19, consisting of a 2.2 nF capacitor and a 680 Ω resistor,
helps to make the system stable. In Figure 22, Bode Plot 2 with an
integrator configuration added, the system crosses over 0 dB at
11335-007
–180
Figure 22. Bode Plot 2
APPLICATION BLOCK DIAGRAM
Figure 23 shows a typical application, an isolated error amplifier
in primary side control, for the ADuM3190. The op amp of the
ADuM3190 is used as the error amplifier for the feedback of the
output voltage, VOUT, using a resistor divider to the −IN pin of
the op amp. This configuration inverts the output signal at the
COMP pin when compared to the +IN pin, which is connected
to the internal 1.225 V reference. For example, when the output
voltage, VOUT, falls due to a load step, the divider voltage at the
−IN pin falls below the +IN reference voltage, causing the COMP
pin output signal to go high. The COMP output of the op amp
is encoded and then decoded back by the digital isolator transformer block to a signal that drives the output of the ADuM3190
Rev. 0 | Page 12 of 16
Data Sheet
ADuM3190
high. The output of the ADuM3190 drives the COMP pin of
the PWM controller, which is designed to reset the PWM latch
output to low only when its COMP pin is low. A high at the
COMP pin has the effect of making the latching PWM comparator produce a PWM duty cycle output. This PWM duty
cycle output drives the power stage to increase the VOUT voltage
until it returns to regulation.
EAOUT2 output is used for a PWM controller with a 2.5 V
reference.
PWM CONTROLLER
VREF
FB
PWM CONTROLLER
EAOUT2
POWER
STAGE
CO
CURRENT
SENSE
COMP
C2
ESR
COMP
OP AMP
ADuM3190
R2
–IN
1.225V
REFOUT
Figure 24. Application Block Diagram 2
–IN
+IN
REFOUT
+
+IN
C1 COMPENSATION
NETWORK
1.225V
CO
COMPENSATION
NETWORK
ESR
OP AMP
ADuM3190
+
R2
VOUT
DCR
CURRENT
SENSE
C2
EAOUT2
VOUT
DCR
POWER
STAGE
11335-009
FB COMP
LATCHING
PWM
LO
LO
LATCHING
PWM
COMP
VIN
OSC
ERROR
AMP
ERROR
AMP
C1
11335-008
VREF
VIN
OSC
Figure 23. Application Block Diagram 1
The power stage output is filtered by output capacitance and, in
some applications, by an inductor. Various elements contribute
to the gain and phase of the control loop and the resulting stability.
The Output Filter L and Output Filter C components create a
double pole; the op amp has a pole at 10 MHz (see Figure 21),
and the linear isolator has a pole at 400 kHz (see Figure 21 and
Figure 22).
The output capacitor and its ESR can add a zero at a frequency
that is dependent on the component type and values. With the
ADuM3190 providing the error amplifier, a compensation
network is provided from the −IN pin to the COMP pin to
compensate the control loop for stability. The compensation
network values depend on both the application and the components that are selected; information about the component
network values is provided in the data sheet of the selected
PWM controller.
The ADuM3190 has two different error amplifier outputs,
EAOUT and EAOUT2. The EAOUT output, which can drive ±3 mA,
has a guaranteed maximum high output voltage of at least 2.4 V,
which may not be enough to drive the COMP pin of some PWM
controllers. The EAOUT2 pin can drive ±1 mA and has an output
range that guarantees 5.0 V for a VDD1 voltage range of 10 V to
20 V, which works well with the COMP pin of many PWM
controllers.
In an application where the 5 V minimum output of the EAOUT2
pin is not enough to drive the COMP pin of some PWM controllers, for example, controllers that operate with 6 V or more
of COMP pin voltage, use EAOUT2 to drive the FB pin of the error
amplifier of the PWM controller (see Figure 24). The typical VREF
voltage level of PWM controllers is approximately 1.25 V or
2.5 V, setting the reference level for the FB pin. In Figure 24, the
As shown in Figure 24, the ADuM3190 op amp has the feedback voltage from the VOUT output divider is connected to the
+IN pin, and the +1.225 V reference voltage connected to the
−IN pin. This configuration produces a low going ADuM3190
COMP pin when the VOUT voltage drops from a load step. The
EAOUT2 pin follows the COMP pin, going low and connecting to
the PWM controller FB pin. The error amplifier of the PWM
controller has a reference (VREF) at the noninverting input,
which, when the FB pin is low, makes the COMP pin of the
error amplifier output go high. A high at the COMP pin causes
the latching PWM comparator to produce a PWM duty cycle
output. This PWM duty cycle output drives the power stage to
increase the VOUT voltage until it returns to regulation.
The application block diagrams (see Figure 23 and Figure 24)
show two different ways to use the ADuM3190 to provide isolated feedback in the control loop of an isolated dc-to-dc converter.
In both figures, the loop is closed at approximately the 1.225 V
reference voltage, providing ±1% accuracy over temperature. The
ADuM3190 op amp has a high gain bandwidth of 10 MHz to
allow the dc-to-dc converter to operate at high switching speeds,
enabling smaller values for the Output Filter L and Output Filter C
components.
The 400 kHz bandwidth of the ADuM3190 error amplifier output
offers faster loop response for better transient response than the
typical shunt regulator and optocoupler solutions, which typically
have bandwidths of only 25 kHz to 50 kHz maximum.
SETTING THE OUTPUT VOLTAGE
The output voltage in the application circuit can be set with two
resistors in a voltage divider, as shown in Figure 25.
The output voltage is determined by the following equation,
where VREF = 1.225 V:
Rev. 0 | Page 13 of 16
VOUT = VREF × (R1 + R2)/R2
(1)
ADuM3190
Data Sheet
VOUT
R1
VIN = 0.35V TO 1.5V +IN
VREF
1.225V
R2
11335-010
REFOUT
ADuM3190
Figure 25. Setting the Output Voltage
DOSA MODULE APPLICATION
Figure 26 is a block diagram of a Distributed-power Open
Standards Alliance (DOSA) circuit using the ADuM3190. The
block diagram shows how to use the ADuM3190 1.225 V reference and the error amp in a DOSA standard power supply module
circuit to produce output voltage settings using a combination
of resistors.
The ADuM3190 1.225 V reference is specified for ±1% over the
−40°C to +125°C temperature range. See Table 10 to select the
resistor values to set the output voltage of the module. Two
different ranges of VOUT can be implemented, VOUT > 1.5 V or
VOUT < 1.5 V, depending on the required module.
VOUT
DOSA MODULE
R1
VIN = 0.35V TO 1.5V
R2
ERROR
AMP
R3
VREF
1.225V
R5
R4
RTRIM-DOWN
R6
Figure 26. DOSA Module
Table 10. Resistor Values for DOSA Module
Module
Nominal Output
VOUT > 1.5 V
VOUT < 1.5 V
VOUT > 1.5 V
VOUT < 1.5 V
R3
1 kΩ
1 kΩ
5.11 kΩ
5.11 kΩ
R4
1 kΩ
0Ω
5.11 kΩ
0Ω
R5
0Ω
2.05 kΩ
0Ω
10.5 kΩ
V = (−dβ/dt) ∑π rn2, n = 1, 2, … , N
where:
β is the magnetic flux density (gauss).
rn is the radius of the nth turn in the receiving coil (cm).
N is the number of turns in the receiving coil.
Given the geometry of the receiving coil in the ADuM3190 and
an imposed requirement that the induced voltage be, at most,
50% of the 0.5 V margin at the decoder, a maximum allowable
magnetic field is calculated, as shown in Figure 27.
100
OPTIONAL TRIM-UP
OR TRIM-DOWN
RESISTOR OR ±10%
OF NOMINAL VALUE
ACCORDING TO DOSA
11335-011
ADuM3190
RTRIM-UP
The ADuM3190 is immune to external magnetic fields. The limitation on the ADuM3190 magnetic field immunity is set by the
condition whereby induced voltage in the transformer receiving
coil is sufficiently large to either falsely set or reset the decoder.
The following analysis defines the conditions under which this
can occur. The 3 V operating condition of the ADuM3190 is
examined because it represents the most susceptible mode of
operation. The pulses at the transformer output have an amplitude
that is greater than 1.0 V. The decoder has a sensing threshold at
approximately 0.5 V, therefore establishing a 0.5 V margin within
which induced voltages are tolerated. The voltage induced across
the receiving coil is given by
R6
Open
1.96 kΩ
Open
10.0 kΩ
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions of more than 1 µs at the input, a periodic set of
refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output.
If the decoder receives no internal pulses for more than approximately 3 µs, the input side is assumed to be unpowered or
nonfunctional, in which case, the isolator output is forced to
10
1
0.1
0.01
0.001
1k
10k
100k
1M
10M
100M
MAGNETIC FIELD FREQUENCY (Hz)
11335-012
–IN
ERROR
AMP
a default high impedance state by the watchdog timer circuit. In
addition, the outputs are in a default high impedance state while
the power is increasing before the UVLO threshold is crossed.
MAXIMUM ALLOWABLE MAGNETIC FLUX
DENSITY (kgauss)
ISOLATED DC-TO-DC SUPPLY
Figure 27. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the maximum allowable magnetic field of 0.02 kgauss induces a voltage
of 0.25 V at the receiving coil. This is approximately 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event were to occur during a transmitted
pulse (and had the worst-case polarity), the received pulse is
reduced from >1.0 V to 0.75 V, still well above the 0.5 V sensing
threshold of the decoder.
The preceding magnetic flux density values correspond to
specific current magnitudes at given distances away from the
ADuM3190 transformers. Figure 28 shows these allowable
current magnitudes as a function of frequency for selected distances. As shown Figure 28, the ADuM3190 is immune and can
Rev. 0 | Page 14 of 16
Data Sheet
ADuM3190
be affected only by extremely large currents operating at a high
frequency very close to the component. For the 1 MHz example,
a 0.7 kA current must be placed 5 mm away from the ADuM3190
to affect the operation of the device.
DISTANCE = 1m
A bipolar ac voltage environment is the worst case for the iCoupler
products yet meets the 50-year operating lifetime recommended
by Analog Devices for maximum working voltage. In the case
of unipolar ac or dc voltage, the stress on the insulation is significantly lower. This allows operation at higher working voltages
while still achieving a 50-year service life. Treat any cross-insulation
voltage waveform that does not conform to Figure 30 or Figure 31
as a bipolar ac waveform, and limit its peak voltage to the 50-year
lifetime voltage value listed in Table 8.
100
10
DISTANCE = 100mm
1
DISTANCE = 5mm
100k
1M
10M
MAGNETIC FIELD FREQUENCY (Hz)
100M
Figure 28. Maximum Allowable Current for Various
Current-to-ADuM3190 Spacings
INSULATION LIFETIME
Note that the voltage presented in Figure 30 is shown as sinusoidal for illustration purposes only. It is meant to represent any
voltage waveform varying between 0 V and some limiting value.
The limiting value can be positive or negative, but the voltage
cannot cross 0 V.
RATED PEAK VOLTAGE
All insulation structures eventually break down when subjected
to voltage stress over a sufficiently long period. The rate of insulation degradation is dependent on the characteristics of the
voltage waveform applied across the insulation. In addition
to the testing performed by the regulatory agencies, Analog
Devices carries out an extensive set of evaluations to determine
the lifetime of the insulation structure within the ADuM3190.
Analog Devices performs accelerated life testing using voltage
levels higher than the rated continuous working voltage. Acceleration factors for several operating conditions are determined.
These factors allow calculation of the time to failure at the actual
working voltage.
The values shown in Table 8 summarize the peak voltage for
50 years of service life for a bipolar ac operating condition. In
many cases, the approved working voltage is higher than the
50-year service life voltage. Operation at these high working
voltages can lead to shortened insulation life in some cases.
Rev. 0 | Page 15 of 16
11335-014
10k
0V
Figure 29. Bipolar AC Waveform
RATED PEAK VOLTAGE
11335-015
0.01
1k
0V
Figure 30. Unipolar AC Waveform
RATED PEAK VOLTAGE
11335-016
0.1
11335-013
MAXIMUM ALLOWABLE CURRENT (kA)
1000
The ADuM3190 insulation lifetime depends on the voltage waveform type imposed across the isolation barrier. The iCoupler
insulation structure degrades at different rates depending on
whether the waveform is bipolar ac, unipolar ac, or dc. Figure 29,
Figure 30, and Figure 31 illustrate these different isolation
voltage waveforms.
0V
Figure 31. DC Waveform
ADuM3190
Data Sheet
PACKAGING AND ORDERING INFORMATION
OUTLINE DIMENSIONS
0.197 (5.00)
0.193 (4.90)
0.189 (4.80)
9
1
8
0.244 (6.20)
0.236 (5.99)
0.228 (5.79)
0.010 (0.25)
0.006 (0.15)
0.069 (1.75)
0.053 (1.35)
0.065 (1.65)
0.049 (1.25)
0.010 (0.25)
0.004 (0.10)
COPLANARITY
0.004 (0.10)
0.158 (4.01)
0.154 (3.91)
0.150 (3.81)
0.025 (0.64)
BSC
0.012 (0.30)
0.008 (0.20)
SEATING
PLANE
8°
0°
0.020 (0.51)
0.010 (0.25)
0.050 (1.27)
0.016 (0.41)
COMPLIANT TO JEDEC STANDARDS MO-137-AB
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
0.041 (1.04)
REF
01-28-2008-A
16
Figure 32. 16-Lead Shrink Small Outline Package [QSOP]
(RQ-16)
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model1
ADuM3190ARQZ
ADuM3190ARQZ-RL7
ADuM3190BRQZ
ADuM3190BRQZ-RL7
ADuM3190SRQZ
ADuM3190SRQZ-RL7
ADuM3190TRQZ
ADuM3190TRQZ-RL7
EVAL-ADuM3190EBZ
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Bandwidth (Typical)
200 kHz
200 kHz
400 kHz
400 kHz
200 kHz
200 kHz
400 kHz
400 kHz
Package Description
16-Lead QSOP
16-Lead QSOP
16-Lead QSOP
16-Lead QSOP
16-Lead QSOP
16-Lead QSOP
16-Lead QSOP
16-Lead QSOP
Evaluation Board
Z = RoHS Compliant Part.
©2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D11335-0-2/13(0)
www.analog.com/ADuM3190
Rev. 0 | Page 16 of 16
Package
Option
RQ-16
RQ-16
RQ-16
RQ-16
RQ-16
RQ-16
RQ-16
RQ-16
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Analog Devices Inc.:
ADUM3190ARQZ ADUM3190ARQZ-RL7 ADUM3190BRQZ ADUM3190BRQZ-RL7 ADUM3190SRQZ
ADUM3190SRQZ-RL7 ADUM3190TRQZ ADUM3190TRQZ-RL7
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