LINER LTC3411 Usb power manager with ideal diode controller and li-ion charger Datasheet

LTC4085
USB Power Manager with
Ideal Diode Controller and
Li-Ion Charger
DESCRIPTION
FEATURES
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The LTC®4085 is a USB power manager and Li-Ion battery
charger designed for portable battery-powered applications. The part controls the total current used by the USB
peripheral for operation and battery charging. The total
input current can be limited to 20% or 100% of a programmed value up to 1.5A (typically 100mA or 500mA).
Battery charge current is automatically reduced such that
the sum of the load current and charge current does not
exceed the programmed input current limit.
Seamless Transition Between Input Power Sources:
Li-Ion Battery, USB and 5V Wall Adapter
215mΩ Internal Ideal Diode Plus Optional External
Ideal Diode Controller Provide Low Loss PowerPath™
When Wall Adapter/USB Input Not Present
Load Dependent Charging Guarantees Accurate USB
Input Current Compliance
Constant-Current/Constant-Voltage Operation with
Thermal Feedback to Maximize Charging Rate Without
Risk of Overheating*
Selectable 100% or 20% Input Current Limit
(e.g., 500mA/100mA)
Battery Charge Current Independently Programmable
Up to 1.2A
Preset 4.2V Charge Voltage with 0.8% Accuracy
C/10 Charge Current Detection Output
NTC Thermistor Input for Temperature Qualified Charging
Tiny (4mm × 3mm × 0.75mm) 14-Lead DFN Package
The LTC4085 includes a complete constant-current/
constant-voltage linear charger for single cell Li-ion batteries. The float voltage applied to the battery is held to a
tight 0.8% tolerance, and charge current is programmable
using an external resistor to ground. An end-of-charge
status output CHRG indicates full charge. Total charge
time is programmable by an external capacitor to ground.
When the battery drops 100mV below the float voltage,
automatic recharging of the battery occurs. Also featured
is an NTC thermistor input used to monitor battery temperature while charging.
APPLICATIONS
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Portable USB Devices: Cameras, MP3 Players, PDAs
The LTC4085 is available in a 14-lead low profile 4mm ×
3mm DFN package.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
PowerPath is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6522118,6700364.
Other patents pending.
TYPICAL APPLICATION
ILOAD
5V WALL
ADAPTER
INPUT
600
4.7μF
IIN
IN
4.7μF SUSPEND USB POWER
SUSP
ACPR
100mA 500mA SELECT
HPWR
OUT
PROG
LTC4085
400
GATE
*
GND
ILOAD
300
IBAT
(CHARGING)
200
100
CHRG
NTC
VNTC
510Ω
1k
BAT
CLPROG
IIN
500
WALL
CURRENT (mA)
5V (NOM)
FROM USB
CABLE VBUS
TO LDOs,
REGs, ETC
Input and Battery Current vs Load Current
RPROG = 100k, RCLPROG = 2k
IBAT
TIMER
0
+
10k
100k
2k
10k
0.1μF
* OPTIONAL - TO LOWER
IDEAL DIODE IMPEDANCE
IBAT
(DISCHARGING)
WALL = 0V
–100
0
100
200
400
300
ILOAD (mA)
500
600
4085 TA01b
4085 TA01
4085fd
1
LTC4085
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2, 3, 4, 5)
Terminal Voltage
IN, OUT
t < 1ms and Duty Cycle < 1% ................... –0.3V to 7V
Steady State ............................................ –0.3V to 6V
BAT, CHRG, HPWR, SUSP, WALL, ACPR ..... –0.3V to 6V
NTC, TIMER, PROG, CLPROG .......–0.3V to (VCC + 0.3V)
Pin Current (Steady State)
IN, OUT, BAT (Note 6) ..............................................2.5A
Operating Temperature Range .................–40°C to 85°C
Maximum Operating Junction Temperature ...........110°C
Storage Temperature Range .................. –65°C to 125°C
TOP VIEW
IN
1
14 BAT
OUT
2
13 GATE
CLPROG
3
HPWR
4
SUSP
5
10 ACPR
TIMER
6
9 VNTC
WALL
7
8 NTC
12 PROG
15
11 CHRG
DE PACKAGE
14-LEAD (4mm s 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 40°C/W
EXPOSED PAD (PIN 15) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4085EDE#PBF
LTC4085EDE#TRPBF
4085
14-Lead (4mm × 3mm) Plastic DFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VBAT = 3.7V, HPWR = 5V, WALL = 0V, RPROG = 100k,
RCLPROG = 2k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
4.35
VIN
Input Supply Voltage
IN and OUT
VBAT
Input Voltage
BAT
IIN
Input Supply Current
IBAT = 0 (Note 7)
Suspend Mode; SUSP = 5V
Suspend Mode; SUSP = 5V, WALL = 5V,
VOUT = 4.8V
l
l
l
IOUT
Output Supply Current
VOUT = 5V, VIN = 0V, NTC = VNTC
IBAT
Battery Drain Current
VUVLO
∆VUVLO
TYP
MAX
UNITS
5.5
V
4.3
V
0.5
50
60
1.2
100
110
mA
μA
μA
l
0.7
1.4
mA
VBAT = 4.3V, Charging Stopped
Suspend Mode; SUSP = 5V
VIN = 0V, BAT Powers OUT, No Load
l
l
l
15
22
60
27
35
100
μA
μA
μA
Input or Output Undervoltage Lockout
VIN Powers Part, Rising Threshold
VOUT Powers Part, Rising Threshold
l
l
3.8
2.95
4
3.15
V
V
Input or Output Undervoltage Lockout
VIN Rising – VIN Falling
or VOUT Rising – VOUT Falling
ILIM
Current Limit
RCLPROG = 2k (0.1%), HPWR = 5V
RCLPROG = 2k (0.1%), HPWR = 0V
IIN(MAX)
Maximum Input Current Limit
(Note 8)
2.4
A
RON
ON Resistance VIN to VOUT
IOUT = 100mA Load
215
mΩ
3.6
2.75
130
mV
Current Limit
l
l
475
90
500
100
525
110
mA
mA
4085fd
2
LTC4085
ELECTRICAL CHARACTERISTICS
The l indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VBAT = 3.7V, HPWR = 5V, WALL = 0V, RPROG = 100k,
RCLPROG = 2k, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VCLPROG
CLPROG Pin Voltage
RPROG = 2k
RPROG = 1k
ISS
Soft-Start Inrush Current
IN or OUT
VCLEN
Input Current Limit Enable Threshold
Voltage
(VIN – VOUT) VIN Rising
(VIN – VOUT) VIN Falling
VFLOAT
Regulated Output Voltage
IBAT = 2mA
IBAT = 2mA, (0°C to 85°C)
IBAT
Current Mode Charge Current
RPROG = 100k (0.1%), No Load
RPROG = 50k (0.1%), No Load
IBAT(MAX)
Maximum Charge Current
(Note 8)
l
l
MIN
TYP
MAX
UNITS
0.98
0.98
1
1
1.02
1.02
V
V
5
mA/μs
20
–80
50
–60
80
–20
mV
mV
4.165
4.158
4.2
4.2
4.235
4.242
V
V
465
900
500
1000
535
1080
mA
mA
Battery Charger
l
l
1.5
A
VPROG
PROG Pin Voltage
RPROG = 100k
RPROG = 50k
l
l
kEOC
Ratio of End-of-Charge Current to
Charge Current
VBAT = VFLOAT (4.2V)
l
ITRIKL
Trickle Charge Current
VBAT = 2V, RPROG = 100k (0.1%)
VTRIKL
Trickle Charge Threshold Voltage
VCEN
Charger Enable Threshold Voltage
(VOUT – VBAT) Falling; VBAT = 4V
(VOUT – VBAT) Rising; VBAT = 4V
VRECHRG
Recharge Battery Threshold Voltage
VFLOAT – VRECHRG
tTIMER
TIMER Accuracy
VBAT = 4.3V
Recharge Time
Percent of Total Charge Time
50
%
Low-Battery Trickle Charge Time
Percent of Total Charge Time, VBAT < 2.8V
25
%
105
°C
TLIM
l
0.98
0.98
1
1
1.02
1.02
V
V
0.085
0.1
0.11
mA/mA
40
50
60
mA
2.8
2.9
3
V
55
80
l
65
100
-10
Junction Temperature in Constant
Temperature Mode
mV
mV
135
mV
10
%
Internal Ideal Diode
RFWD
Incremental Resistance, VON Regulation
IBAT = 100mA
125
mΩ
RDIO(ON)
ON Resistance VBAT to VOUT
IBAT = 600mA
215
mΩ
VFWD
Voltage Forward Drop (VBAT – VOUT)
IBAT = 5mA
IBAT = 100mA
IBAT = 600mA
VOFF
Diode Disable Battery Voltage
2.8
V
IFWD
Load Current Limit, for VON Regulation
550
mA
ID(MAX)
Diode Current Limit
2.2
A
20
mV
l
10
30
55
160
50
mV
mV
mV
External Ideal Diode
External Ideal Diode Forward Voltage
VGATE = 1.85V; IGATE = 0
VOL
Output Low Voltage, CHRG, ACPR
ISINK = 5mA
l
VIH
Input High Voltage
SUSP, HPWR Pin
l
VIL
Input Low Voltage
SUSP, HPWR Pin
l
IPULLDN
Logic Input Pull-Down Current
SUSP, HPWR
VFWD,EDA
Logic
0.1
0.25
1.2
V
V
0.4
2
V
μA
4085fd
3
LTC4085
ELECTRICAL CHARACTERISTICS
The l indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VBAT = 3.7V, HPWR = 5V, WALL = 0V, RPROG = 100k,
RCLPROG = 2k, unless otherwise noted.
SYMBOL
PARAMETER
VCHG(SD)
Charger Shutdown Threshold Voltage
on TIMER
ICHG(SD)
Charger Shutdown Pull-Up Current
on TIMER
VWAR
CONDITIONS
MIN
TYP
MAX
UNITS
l
0.15
VTIMER = 0V
l
5
14
Absolute Wall Input Threshold Voltage
VWALL Rising Threshold
l
4.15
4.25
VWAF
Absolute Wall Input Threshold Voltage
VWALL Falling Threshold
VWDR
Delta Wall Input Threshold Voltage
VWALL – VBAT Rising Threshold
VWDF
Delta Wall Input Threshold Voltage
VWALL – VBAT Falling Threshold
IWALL
Wall Input Current
VWALL = 5V
VVNTC
VNTC Bias Voltage
IVNTC = 500μA
INTC
NTC Input Leakage Current
VNTC = 1V
VCOLD
Cold Temperature Fault Threshold
Voltage
Rising Threshold
Hysteresis
0.74 • VVNTC
0.02 • VVNTC
V
V
VHOT
Hot Temperature Fault Threshold
Voltage
Falling Threshold
Hysteresis
0.29 • VVNTC
0.01 • VVNTC
V
V
VDIS
NTC Disable Voltage
NTC Input Voltage to GND (Falling)
Hysteresis
0.4
μA
4.35
3.12
0
V
V
75
l
V
mV
25
50
mV
75
150
μA
NTC
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: VCC is the greater of VIN, VOUT or VBAT.
Note 3: All voltage values are with respect to GND.
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperatures will exceed 125°C when overtemperature protection is
active. Continuous operation above the specified maximum operating
junction temperature may result in device degradation or failure.
l
4.4
4.85
0
l
75
100
35
V
±1
125
μA
mV
mV
Note 5: The LTC4085E is guaranteed to meet specified performance from
0°C to 85°C. Specifications over the –40°C to 85°C operating temperature
range are assured by design, characterization and correlation with
statistical process controls.
Note 6: Guaranteed by long term current density limitations.
Note 7: Total input current is equal to this specification plus 1.002 • IBAT
where IBAT is the charge current.
Note 8: Accuracy of programmed current may degrade for currents greater
than 1.5A.
4085fd
4
LTC4085
TYPICAL PERFORMANCE CHARACTERISTICS
Input Supply Current
vs Temperature
800
700
Input Supply Current vs
Temperature (Suspend Mode)
70
100
VIN = 5V
VBAT = 4.2V
60 R
PROG = 100k
RCLPROG = 2k
50 SUSP = 5V
VIN = 5V
VBAT = 4.2V
RPROG = 100k
RCLPROG = 2k
IIN (μA)
600
IIN (μA)
Battery Drain Current vs Temperature
(BAT Powers OUT, No Load)
500
400
300
VIN = 0V
90 VBAT = 4.2V
80
70
IBAT (μA)
900
TA = 25°C unless otherwise noted.
40
30
50
40
30
20
200
20
10
100
0
–50
–25
0
25
50
TEMPERATURE (°C)
75
10
0
–50
100
50
25
0
TEMPERATURE (°C)
25
75
0
–50
100
Input Current Limit
vs Temperature, HPWR = 5V
525
75
1.2
VIN = 5V
108 VBAT = 3.7V
RPROG = 100k
106 R
CLPROG = 2k
104
VCLPROG (V)
IIN (mA)
VIN = 5V
RCLPROG = 2k
1.0
102
100
98
HPWR = 5V
0.8
0.6
0.4
96
94
485
100
CLPROG Pin Voltage
vs Temperature
110
VIN = 5V
VBAT = 3.7V
RPROG = 100k
515 RCLPROG = 2k
495
25
50
0
TEMPERATURE (°C)
4085 G03
Input Current Limit
vs Temperature, HPWR = 0V
505
–25
4085 G02
4085 G01
IIN (mA)
60
HPWR = 0V
0.2
92
475
–50
–25
0
25
50
TEMPERATURE (°C)
75
90
–50
100
–25
25
50
0
TEMPERATURE (°C)
75
4085 G04
0
25
50
TEMPERATURE (°C)
75
4.30
VIN = 5V
= 4.2V
V
1.015 BAT
RPROG = 100k
= 2k
R
1.010 CLPROG
100
4085 G06
Battery Regulation (Float)
Voltage vs Temperature
VFLOAT Load Regulation
1.020
4.220
RPROG = 34k
4.215
4.25
VIN = 5V
IBAT = 2mA
4.210
1.005
1.000
0.995
VFLOAT (V)
4.20
VFLOAT (V)
VPROG (V)
–25
4085 G05
PROG Pin Voltage
vs Temperature
4.15
4.205
4.200
4.195
4.10
4.190
0.990
4.05
0.985
0.980
–50
0
–50
100
–25
0
50
25
TEMPERATURE (°C)
4.185
4.00
75
100
4085 G07
0
200
400
600
IBAT (mA)
800
1000
4085 G08
4.180
–50
–25
0
50
25
TEMPERATURE (°C)
75
100
4085 G09
4085fd
5
LTC4085
TYPICAL PERFORMANCE CHARACTERISTICS
Battery Current and Voltage
vs Time
600
ILOAD = 400mA
CHRG
IBAT
500
250
IBAT (mA)
RON (mΩ)
VIN = 5V
VIN = 5.5V
175
150
0
25
50
TEMPERATURE (°C)
–25
5
500
75
100
400
4
300
3
200
2
400
300
200
400mAhr CELL
C/10
100 VIN = 5V
1
TERMINATION
RPROG = 100k
RCLPROG = 2.1k
0
0
0
50
100
150
200
TIME (MINUTES)
100 VIN = 5V
VBAT = 3.5V
QJA = 50°C/W
0
50
25
75
–50 –25
0
TEMPERATURE (°C)
Charging from USB, IBAT vs VBAT
600
Ideal Diode Current vs Forward
Voltage and Temperature
(No External Device)
1000
120
VIN = 5V
VOUT = NO LOAD
500 RPROG = 100k
RCLPROG = 2k
HPWR = 5V
400
VBAT = 3.7V
900 VIN = 0V
800
700
IOUT (mA)
IBAT (mA)
VIN = 5V
VOUT = NO LOAD
100 RPROG = 100k
RCLPROG = 2k
HPWR = 0V
80
60
200
40
100
20
0
0
600
500
400
300
–50°C
0°C
50°C
100°C
200
100
0
0.5
1
1.5
2 2.5
VBAT (V)
3.5
3
4
4.5
0
0
0.5
1
1.5
2 2.5
VBAT (V)
3
3.5
4085 G13
5000
VBAT = 3.7V
4500 VIN = 0V
Si2333 PFET
4000
800
VBAT = 3.7V
4500 VIN = 0V
Si2333 PFET
4000
3000
300
2500
2000
1500
RDIO
200
1000
100
500
0
0
50
100
VFWD (mV)
150
IOUT (mA)
3500
3000
IOUT (mA)
3500
600
IOUT
200
4085 G16
0
200
150
Ideal Diode Resistance and
Current vs Forward Voltage with
External Device
700
400
100
VFWD (mV)
4085 G15
5000
VBAT = 3.7V
900 VIN = 0V
500
50
0
4.5
Ideal Diode Current vs Forward
Voltage and Temperature with
External Device
1000
IOUT (mA), RDIO (mΩ)
4
4085 G14
Ideal Diode Resistance and
Current vs Forward Voltage
(No External Device)
125
4085 G12
Charging from USB, Low Power,
IBAT vs VBAT
300
100
4085 G11
4085 G10
IBAT (mA)
600
VBAT
225
200
6
VBAT AND VCHRG (V)
VIN = 4.5V
125
–50
Charge Current vs Temperature
(Thermal Regulation)
IBAT (mA)
Input RON vs Temperature
275
TA = 25°C unless otherwise noted.
2500
2000
1500
–50°C
0°C
50°C
100°C
0
20
60
40
VFWD (mV)
80
100
4085 G17
1000
500
0
0
20
60
40
VFWD (mV)
80
100
4085 G18
4085fd
6
LTC4085
TYPICAL PERFORMANCE CHARACTERISTICS
Input Connect Waveforms
Input Disconnect Waveforms
VIN
5V/DIV
VIN
5V/DIV
VOUT
5V/DIV
IIN
0.5A/DIV
IBAT
0.5A/DIV
VOUT
5V/DIV
IIN
0.5A/DIV
IBAT
0.5A/DIV
VBAT = 3.85V
IOUT = 100mA
1ms/DIV
TA = 25°C unless otherwise noted.
4085 G19
VBAT = 3.85V
IOUT = 100mA
Wall Connect Waveforms,
VIN = 0V
1ms/DIV
4085 G20
Wall Disconnect Waveforms,
VIN = 0V
WALL
5V/DIV
WALL
5V/DIV
VOUT
5V/DIV
IWALL
0.5A/DIV
IBAT
0.5A/DIV
VOUT
5V/DIV
IWALL
0.5A/DIV
IBAT
0.5A/DIV
VBAT = 3.85V
IOUT = 100mA
RPROG = 100k
1ms/DIV
4085 G22
VBAT = 3.85V
IOUT = 100mA
RPROG = 100k
Response to HPWR
1ms/DIV
4085 G23
Response to Suspend
HPWR
5V/DIV
SUSP
5V/DIV
VOUT
5V/DIV
IIN
0.5A/DIV
IIN
0.5A/DIV
IBAT
0.5A/DIV
IBAT
0.5A/DIV
VBAT = 3.85V
IOUT = 50mA
100μs/DIV
4085 G21
VBAT = 3.85V
IOUT = 50mA
100μs/DIV
4085 G24
4085fd
7
LTC4085
PIN FUNCTIONS
IN (Pin 1): Input Supply. Connect to USB supply, VBUS.
Input current to this pin is limited to either 20% or 100%
of the current programmed by the CLPROG pin as determined by the state of the HPWR pin. Charge current (to
BAT pin) supplied through the input is set to the current
programmed by the PROG pin but will be limited by the
input current limit if charge current is set greater than the
input current limit.
HPWR (Pin 4): High Power Select. This logic input is used
to control the input current limit. A voltage greater than
1.2V on the pin will set the input current limit to 100% of
the current programmed by the CLPROG pin. A voltage
less than 0.4V on the pin will set the input current limit to
20% of the current programmed by the CLPROG pin. A 2μA
pull-down is internally applied to this pin to ensure it is low
at power up when the pin is not being driven externally.
OUT (Pin 2): Voltage Output. This pin is used to provide
controlled power to a USB device from either USB VBUS
(IN) or the battery (BAT) when the USB is not present. This
pin can also be used as an input for battery charging when
the USB is not present and a wall adapter is applied to this
pin. OUT should be bypassed with at least 4.7μF to GND.
SUSP (Pin 5): Suspend Mode Input. Pulling this pin above
1.2V will disable the power path from IN to OUT. The supply current from IN will be reduced to comply with the
USB specification for suspend mode. Both the ability to
charge the battery from OUT and the ideal diode function
(from BAT to OUT) will remain active. Suspend mode will
reset the charge timer if VOUT is less than VBAT while in
suspend mode. If VOUT is kept greater than VBAT, such as
when a wall adapter is present, the charge timer will not
be reset when the part is put in suspend. A 2μA pull-down
is internally applied to this pin to ensure it is low at power
up when the pin is not being driven externally.
CLPROG (Pin 3): Current Limit Program and Input Current Monitor. Connecting a resistor, RCLPROG, to ground
programs the input to output current limit. The current
limit is programmed as follows:
ICL (A) =
1000V
RCLPROG
In USB applications the resistor RCLPROG should be set
to no less than 2.1k.
The voltage on the CLPROG pin is always proportional to
the current flowing through the IN to OUT power path.
This current can be calculated as follows:
IIN (A) =
VCLPROG
• 1000
RCLPROG
TIMER (Pin 6): Timer Capacitor. Placing a capacitor, CTIMER,
to GND sets the timer period. The timer period is:
t TIMER (Hours) =
CTIMER • RPROG • 3Hours
0.1μF • 100k
Charge time is increased if charge current is reduced
due to undervoltage current limit, load current, thermal
regulation and current limit selection (HPWR).
Shorting the TIMER pin to GND disables the battery charging functions.
4085fd
8
LTC4085
PIN FUNCTIONS
WALL (Pin 7): Wall Adapter Present Input. Pulling this
pin above 4.25V will disconnect the power path from IN
to OUT. The ACPR pin will also be pulled low to indicate
that a wall adapter has been detected.
the charge current drops below 10% of the programmed
charge current (while in voltage mode) or the input supply
or output supply is removed, the CHRG pin is forced to a
high impedance state.
NTC (Pin 8): Input to the NTC Thermistor Monitoring
Circuits. Under normal operation, tie a thermistor from
the NTC pin to ground and a resistor of equal value
from NTC to VNTC. When the voltage on this pin is above
0.74 • VVNTC (Cold, 0°C) or below 0.29 • VVNTC (Hot, 50°C)
the timer is suspended, but not cleared, the charging is
disabled and the CHRG pin remains in its former state.
When the voltage on NTC comes back between 0.74 •
VVNTC and 0.29 • VVNTC, the timer continues where it
left off and charging is re-enabled if the battery voltage
is below the recharge threshold. There is approximately
3°C of temperature hysteresis associated with each of the
input comparators.
PROG (Pin 12): Charge Current Program. Connecting a
resistor, RPROG, to ground programs the battery charge
current. The battery charge current is programmed as
follows:
Connect the NTC pin to ground to disable this feature. This
will disable all of the LTC4085 NTC functions.
ICHG (A) =
50,000V
RPROG
GATE (Pin 13): External Ideal Diode Gate Pin. This pin
can be used to drive the gate of an optional external
PFET connected between BAT and OUT. By doing so, the
impedance of the ideal diode between BAT and OUT can be
reduced. When not in use, this pin should be left floating.
It is important to maintain a high impedance on this pin
and minimize all leakage paths.
ACPR (Pin 10): Wall Adapter Present Output. Active low
open-drain output pin. A low on this pin indicates that the
wall adapter input comparator has had its input pulled
above the input threshold. This feature is disabled if no
power is present on IN or OUT or BAT (i.e., below UVLO
thresholds).
BAT (Pin 14): Connect to a single cell Li-Ion battery. This
pin is used as an output when charging the battery and
as an input when supplying power to OUT. When the OUT
pin potential drops below the BAT pin potential, an ideal
diode function connects BAT to OUT and prevents VOUT
from dropping significantly below VBAT. A precision internal
resistor divider sets the final float (charging) potential on
this pin. The internal resistor divider is disconnected when
IN and OUT are in undervoltage lockout.
CHRG (Pin 11): Open-Drain Charge Status Output. When
the battery is being charged, the CHRG pin is pulled low by
an internal N-channel MOSFET. When the timer runs out or
Exposed Pad (Pin 15): Ground. The exposed package pad
is ground and must be soldered to the PC board for proper
functionality and for maximum heat transfer.
VNTC (Pin 9): Output Bias Voltage for NTC. A resistor from
this pin to the NTC pin will bias the NTC thermistor.
4085fd
9
LTC4085
BLOCK DIAGRAM
VBUS
1
IN
CURRENT LIMIT
OUT
ILIM_CNTL
3
2k
4
+
CL
–
CLPROG
HPWR
ENABLE
SOFT_START
CURRENT_CONTROL
CC/CV REGULATOR
CHARGER
IN
500mA/100mA
OUT BAT
25mV
2
25mV
+
–EDA
GATE
13
IDEAL_DIODE
ENABLE
105°C
DIE TEMP
2μA
–
+
ILIM
+
–
IIN
1000 1V
+ –
BAT
TA
14
SOFT_START2
CHARGE_CONTROL
PROG
+
CHG
–
12
100k
–
+
7
10
ICHRG
+
–
1V
+–
25mV
WALL
ACPR
VOLTAGE_DETECT
4.25V
+
–
0.25V
+
–
2.8V
BATTERY UVLO
+
–
4.1V
RECHARGE
UVLO
BAT_UV
RECHRG
9
CONTROL_LOGIC
–
+
100k
8
TIMER
OSCILLATOR
6
VNTC
NTC
–
+
100k
0.1V
+
–
CLK
HOLD
2C0LD
NTCERR
CHRG
RESET
COUNTER
STOP
11
NTC
2HOT
2μA
NTC_ENABLE
GND
SUSP
C/10
EOC
4085 BD
4085fd
10
LTC4085
OPERATION
The LTC4085 is a complete PowerPath controller for battery powered USB applications. The LTC4085 is designed
to receive power from a USB source, a wall adapter, or a
battery. It can then deliver power to an application connected to the OUT pin and a battery connected to the
BAT pin (assuming that an external supply other than the
battery is present). Power supplies that have limited current resources (such as USB VBUS supplies) should be
connected to the IN pin which has a programmable current
limit. Battery charge current will be adjusted to ensure that
the sum of the charge current and load current does not
exceed the programmed input current limit.
An ideal diode function provides power from the battery
when output/load current exceeds the input current limit or
when input power is removed. Powering the load through
the ideal diode instead of connecting the load directly to
the battery allows a fully charged battery to remain fully
charged until external power is removed. Once external
power is removed the output drops until the ideal diode is
forward biased. The forward biased ideal diode will then
provide the output power to the load from the battery.
Furthermore, powering switching regulator loads from the
OUT pin (rather than directly from the battery) results in
shorter battery charge times. This is due to the fact that
switching regulators typically require constant input power.
When this power is drawn from the OUT pin voltage (rather
than the lower BAT pin voltage) the current consumed
by the switching regulator is lower leaving more current
available to charge the battery.
The LTC4085 also has the ability to receive power from
a wall adapter. Wall adapter power can be connected to
the output (load side) of the LTC4085 through an external device such as a power Schottky or FET, as shown in
Figure 1. The LTC4085 has the unique ability to use the
output, which is powered by the wall adapter, as a path
to charge the battery while providing power to the load. A
wall adapter comparator on the LTC4085 can be configured
to detect the presence of the wall adapter and shut off the
connection to the USB to prevent reverse conduction out
to the USB bus.
4085fd
11
LTC4085
OPERATION
WALL
ADAPTER
10
4.25V
(RISING)
3.15V
(FALLING)
ACPR
–
+
WALL
7
+
–
USB VBUS
1
IN
+
–
75mV (RISING)
25mV (FALLING)
ENABLE
CURRENT LIMIT
CONTROL
OUT
2
LOAD
CHRG
CONTROL
IDEAL
DIODE
BAT
14
4085 F01
+
Li-Ion
Figure 1: Simplified Block Diagram—PowerPath
4085fd
12
LTC4085
OPERATION
Table 1. Operating Modes—PowerPath States
Current Limited Input Power (IN to OUT)
WALL PRESENT
SUSPEND
VIN > 3.8V
VIN > (VOUT + 100mV)
VIN > (VBAT + 100mV)
CURRENT LIMIT ENABLED
Y
X
X
X
X
N
X
Y
X
X
X
N
X
X
N
X
X
N
X
X
X
N
X
N
X
X
X
X
N
N
N
N
Y
Y
Y
Y
Battery Charger (OUT to BAT)
WALL PRESENT
SUSPEND
VOUT > 4.35V
VOUT > (VBAT + 100mV)
CHARGER ENABLED
X
X
N
X
N
X
X
X
N
N
X
X
Y
Y
Y
WALL PRESENT
SUSPEND
VIN
VBAT > VOUT
VBAT > 2.8V
DIODE ENABLED
X
X
X
X
N
N
X
X
X
N
X
N
X
X
X
Y
Y
Y
Ideal Diode (BAT to OUT)
Operating Modes—Pin Currents vs Programmed Currents (Powered from IN)
PROGRAMMING
OUTPUT CURRENT
BATTERY CURRENT
INPUT CURRENT
ICL = ICHG
IOUT < ICL
IOUT = ICL = ICHG
IOUT > ICL
IBAT = ICL – IOUT
IBAT = 0
IBAT = ICL – IOUT
IIN = IQ + ICL
IIN = IQ + ICL
IIN = IQ + ICL
ICL > ICHG
IOUT < (ICL – ICHG)
IOUT > (ICL – ICHG)
IOUT = ICL
IOUT > ICL
IBAT = ICHG
IBAT = ICL – IOUT
IBAT = 0
IBAT = ICL – IOUT
IIN = IQ + ICHG + IOUT
IIN = IQ + ICL
IIN = IQ + ICL
IIN = IQ + ICL
ICL < ICHG
IOUT < ICL
IOUT > ICL
IBAT = ICL – IOUT
IBAT = ICL – IOUT
IIN = IQ + ICL
IIN = IQ + ICL
4085fd
13
LTC4085
OPERATION
USB Current Limit and Charge Current Control
The current limit and charger control circuits of the
LTC4085 are designed to limit input current as well as
control battery charge current as a function of IOUT. The
programmed current limit, ICL, is defined as:
⎛ 1000
⎞
1000V
ICL = ⎜
• VCLPROG ⎟ =
⎝ RCLPROG
⎠ RCLPROG
The programmed battery charge current, ICHG, is defined as:
⎛ 50,000
⎞ 50,000V
ICHG = ⎜
• VPROG ⎟ =
⎝ RPROG
⎠ RPROG
Input current, IIN, is equal to the sum of the BAT pin output
current and the OUT pin output current:
The current limiting circuitry in the LTC4085 can and should
be configured to limit current to 500mA for USB applications (selectable using the HPWR pin and programmed
using the CLPROG pin).
The LTC4085 reduces battery charge current such that the
sum of the battery charge current and the load current
does not exceed the programmed input current limit (onefifth of the programmed input current limit when HPWR
is low, see Figure 2). The battery charge current goes to
zero when load current exceeds the programmed input
current limit (one-fifth of the limit when HPWR is low). If
the load current is greater than the current limit, the output
voltage will drop to just under the battery voltage where
the ideal diode circuit will take over and the excess load
current will be drawn from the battery.
IIN = IOUT + IBAT
600
120
IIN
500
600
IIN
100
500
IIN
ILOAD
300
200
IBAT
CHARGING
400
ILOAD
60
40
IBAT
CHARGING
CURRENT (mA)
80
CURRENT (mA)
CURRENT (mA)
400
ILOAD
300
200
100
20
100
0
0
0
–100
0
100
200
300
400
ILOAD (mA)
500
600
IBAT
(IDEAL DIODE)
4085 F02a
(2a) High Power Mode/Full Charge
RPROG = 100k and RCLPROG = 2k
–20
0
20
40
60
80
ILOAD (mA)
100
120
IBAT
(IDEAL DIODE)
IBAT = ICHG
–100
IBAT
CHARGING
0
100
4085 F02b
(2b) Low Power Mode/Full Charge
RPROG = 100k and RCLPROG = 2k
200
IBAT = ICL – IOUT
300
400
ILOAD (mA)
500
600
IBAT
(IDEAL DIODE)
4085 F02c
(2c) High Power Mode with
ICL = 500mA and ICHG = 250mA
RPROG = 100k and RCLPROG = 2k
Figure 2: Input and Battery Currents as a Function of Load Current
4085fd
14
LTC4085
OPERATION
Programming Current Limit
The formula for input current limit is:
⎛ 1000
⎞
1000V
ICL = ⎜
• VCLPROG ⎟ =
⎝ RCLPROG
⎠ RCLPROG
where VCLPROG is the CLPROG pin voltage and RCLPROG
is the total resistance from the CLPROG pin to ground.
For example, if typical 500mA current limit is required,
calculate:
RCLPROG =
1V
• 1000 = 2k
500mA
In USB applications, the minimum value for RCLPROG
should be 2.1k. This will prevent the application current
from exceeding 500mA due to LTC4085 tolerances and
quiescent currents. A 2.1k CLPROG resistor will give
a typical current limit of 476mA in high power mode
(HPWR = 1) or 95mA in low power mode (HPWR = 0).
VCLPROG will track the input current according to the following equation:
IIN =
VCLPROG
• 1000
RCLPROG
For best stability over temperature and time, 1% metal
film resistors are recommended.
vents the OUT pin voltage from dropping significantly below
the BAT pin voltage. A comparison of the I-V curve of the
ideal diode and a Schottky diode can be seen in Figure 3.
If the input current increases beyond the programmed
input current limit additional current will be drawn from
the battery via the internal ideal diode. Furthermore, if
power to IN (USB VBUS) or OUT (external wall adapter) is
removed, then all of the application power will be provided
by the battery via the ideal diode. A 4.7μF capacitor at OUT
is sufficient to keep a transition from input power to battery
power from causing significant output voltage droop. The
ideal diode consists of a precision amplifier that enables a
large P-channel MOSFET transistor whenever the voltage
at OUT is approximately 20mV (VFWD) below the voltage at
BAT. The resistance of the internal ideal diode is approximately 200mΩ. If this is sufficient for the application then
no external components are necessary. However, if more
conductance is needed, an external PFET can be added from
BAT to OUT. The GATE pin of the LTC4085 drives the gate
of the PFET for automatic ideal diode control. The source
of the external PFET should be connected to OUT and the
drain should be connected to BAT. In order to help protect
the external PFET in overcurrent situations, it should be
placed in close thermal contact to the LTC4085.
IMAX
Ideal Diode from BAT to OUT
SLOPE: 1/RDIO(ON)
CURRENT (A)
The LTC4085 has an internal ideal diode as well as a controller for an optional external ideal diode. If a battery is the
only power supply available or if the load current exceeds
the programmed input current limit, then the battery will
automatically deliver power to the load via an ideal diode
circuit between the BAT and OUT pins. The ideal diode
circuit (along with the recommended 4.7μF capacitor on
the OUT pin) allows the LTC4085 to handle large transient
loads and wall adapter or USB VBUS connect/disconnect
scenarios without the need for large bulk capacitors. The
ideal diode responds within a few microseconds and pre-
SCHOTTKY
DIODE
4085 F03
VFWD
FORWARD VOLTAGE (V)
(BAT-OUT)
Figure 3. LTC4085 Schottky Diode vs Forward Voltage Drop
4085fd
15
LTC4085
OPERATION
Battery Charger
The battery charger circuits of the LTC4085 are designed
for charging single cell lithium-ion batteries. Featuring
an internal P-channel power MOSFET, the charger uses a
constant-current/constant-voltage charge algorithm with
programmable current and a programmable timer for
charge termination. Charge current can be programmed
up to 1.5A. The final float voltage accuracy is ±0.8% typical. No blocking diode or sense resistor is required when
powering the IN pin. The CHRG open-drain status output
provides information regarding the charging status of the
LTC4085 at all times. An NTC input provides the option of
charge qualification using battery temperature.
An internal thermal limit reduces the programmed charge
current if the die temperature attempts to rise above a
preset value of approximately 105°C. This feature protects
the LTC4085 from excessive temperature, and allows the
user to push the limits of the power handling capability of a
given circuit board without risk of damaging the LTC4085.
Another benefit of the LTC4085 thermal limit is that charge
current can be set according to typical, not worst-case,
ambient temperatures for a given application with the
assurance that the charger will automatically reduce the
current in worst-case conditions.
The charge cycle begins when the voltage at the OUT pin
rises above the output UVLO level and the battery voltage is below the recharge threshold. No charge current
actually flows until the OUT voltage is greater than the
output UVLO level and 100mV above the BAT voltage. At
the beginning of the charge cycle, if the battery voltage
is below 2.8V, the charger goes into trickle charge mode
to bring the cell voltage up to a safe level for charging.
The charger goes into the fast charge constant-current
mode once the voltage on the BAT pin rises above 2.8V.
In constant-current mode, the charge current is set by
RPROG. When the battery approaches the final float voltage,
the charge current begins to decrease as the LTC4085
switches to constant-voltage mode. When the charge
current drops below 10% of the programmed charge
current while in constant-voltage mode the CHRG pin
assumes a high impedance state.
An external capacitor on the TIMER pin sets the total
minimum charge time. When this time elapses the
charge cycle terminates and the CHRG pin assumes a
high impedance state, if it has not already done so. While
charging in constant-current mode, if the charge current
is decreased by thermal regulation or in order to maintain
the programmed input current limit the charge time is
automatically increased. In other words, the charge time
is extended inversely proportional to charge current delivered to the battery. For Li-Ion and similar batteries that
require accurate final float potential, the internal bandgap
reference, voltage amplifier and the resistor divider provide
regulation with ±0.8% accuracy.
Trickle Charge and Defective Battery Detection
At the beginning of a charge cycle, if the battery voltage
is low (below 2.8V) the charger goes into trickle charge
reducing the charge current to 10% of the full-scale current. If the low-battery voltage persists for one quarter
of the total charge time, the battery is assumed to be
defective, the charge cycle is terminated and the CHRG
pin output assumes a high impedance state. If for any
reason the battery voltage rises above ~2.8V the charge
cycle will be restarted. To restart the charge cycle (i.e. when
the dead battery is replaced with a discharged battery),
simply remove the input voltage and reapply it or cycle
the TIMER pin to 0V.
4085fd
16
LTC4085
OPERATION
Programming Charge Current
The formula for the battery charge current is:
ICHG = (IPROG ) • 50,000 =
VPROG
• 50,000
RPROG
where VPROG is the PROG pin voltage and RPROG is the
total resistance from the PROG pin to ground. Keep in
mind that when the LTC4085 is powered from the IN pin,
the programmed input current limit takes precedent over
the charge current. In such a scenario, the charge current
cannot exceed the programmed input current limit.
For example, if typical 500mA charge current is required,
calculate:
⎛ 1V ⎞
RPROG = ⎜
• 50,000 = 100k
⎝ 500mA ⎟⎠
is prevented. If after power-up the battery voltage drops
below the recharge threshold or if after a charge cycle the
battery voltage is still below the recharge threshold the
charge time is set to one half of a full cycle.
The LTC4085 has a feature that extends charge time automatically. Charge time is extended if the charge current
in constant-current mode is reduced due to load current
or thermal regulation. This change in charge time is inversely proportional to the change in charge current. As
the LTC4085 approaches constant-voltage mode the charge
current begins to drop. This change in charge current is
due to normal charging operation and does not affect the
timer duration.
Once a time-out occurs and the voltage on the battery is
greater than the recharge threshold, the charge current
stops, and the CHRG output assumes a high impedance
state if it has not already done so.
For best stability over temperature and time, 1% metal film
resistors are recommended. Under trickle charge conditions, this current is reduced to 10% of the full-scale value.
Connecting the TIMER pin to ground disables the battery
charger.
The Charge Timer
CHRG Status Output Pin
The programmable charge timer is used to terminate the
charge cycle. The timer duration is programmed by an
external capacitor at the TIMER pin. The charge time is
typically:
When the charge cycle starts, the CHRG pin is pulled to
ground by an internal N-channel MOSFET capable of driving
an LED. When the charge current drops below 10% of the
programmed full charge current while in constant-voltage
mode, the pin assumes a high impedance state (but charge
current continues to flow until the charge time elapses).
If this state is not reached before the end of the programmable charge time, the pin will assume a high impedance
state when a time-out occurs. The CHRG current detection
threshold can be calculated by the following equation:
tTIMER (Hours) =
CTIMER • RPROG • 3Hours
0.1µF • 100k
The timer starts when an input voltage greater than the
undervoltage lockout threshold level is applied or when
leaving shutdown and the voltage on the battery is less than
the recharge threshold. At power up or exiting shutdown
with the battery voltage less than the recharge threshold
the charge time is a full cycle. If the battery is greater than
the recharge threshold the timer will not start and charging
IDETECT =
0.1V
5000V
• 50,000 =
RPROG
RPROG
4085fd
17
LTC4085
OPERATION
For example, if the full charge current is programmed
to 500mA with a 100k PROG resistor the CHRG pin will
change state at a battery charge current of 50mA.
Note: The end-of-charge (EOC) comparator that monitors the charge current latches its decision. Therefore,
the first time the charge current drops below 10% of the
programmed full charge current while in constant-voltage
mode will toggle CHRG to a high impedance state. If, for
some reason, the charge current rises back above the
threshold the CHRG pin will not resume the strong pulldown state. The EOC latch can be reset by a recharge cycle
(i.e. VBAT drops below the recharge threshold) or toggling
the input power to the part.
Current Limit Undervoltage Lockout
An internal undervoltage lockout circuit monitors the
input voltage and disables the input current limit circuits
until VIN rises above the undervoltage lockout threshold.
The current limit UVLO circuit has a built-in hysteresis of
125mV. Furthermore, to protect against reverse current in
the power MOSFET, the current limit UVLO circuit disables
the current limit (i.e. forces the input power path to a high
impedance state) if VOUT exceeds VIN. If the current limit
UVLO comparator is tripped, the current limit circuits will
not come out of shutdown until VOUT falls 50mV below
the VIN voltage.
Charger Undervoltage Lockout
An internal undervoltage lockout circuit monitors the VOUT
voltage and disables the battery charger circuits until
VOUT rises above the undervoltage lockout threshold. The
battery charger UVLO circuit has a built-in hysteresis of
125mV. Furthermore, to protect against reverse current
in the power MOSFET, the charger UVLO circuit keeps the
charger shut down if VBAT exceeds VOUT. If the charger
UVLO comparator is tripped, the charger circuits will not
come out of shut down until VOUT exceeds VBAT by 50mV.
Suspend
The LTC4085 can be put in suspend mode by forcing the
SUSP pin greater than 1V. In suspend mode the ideal diode
function from BAT to OUT is kept alive. If power is applied
to the OUT pin externally (i.e., a wall adapter is present)
then charging will be unaffected. Current drawn from the
IN pin is reduced to 50μA. Suspend mode is intended to
comply with the USB power specification mode of the
same name.
NTC Thermistor
The battery temperature is measured by placing a negative
temperature coefficient (NTC) thermistor close to the battery pack. The NTC circuitry is shown in Figure 4. To use
this feature, connect the NTC thermistor (RNTC) between
the NTC pin and ground and a resistor (RNOM) from the
NTC pin to VNTC. RNOM should be a 1% resistor with a
value equal to the value of the chosen NTC thermistor at
25°C (this value is 10k for a Vishay NTHS0603N02N1002J
thermistor). The LTC4085 goes into hold mode when the
resistance (RHOT) of the NTC thermistor drops to 0.41
times the value of RNOM or approximately 4.1k, which
should be at 50°C. The hold mode freezes the timer and
stops the charge cycle until the thermistor indicates a
return to a valid temperature. As the temperature drops,
the resistance of the NTC thermistor rises. The LTC4085 is
designed to go into hold mode when the value of the NTC
thermistor increases to 2.82 times the value of RNOM. This
resistance is RCOLD. For a Vishay NTHS0603N02N1002J
thermistor, this value is 28.2k which corresponds to approximately 0°C. The hot and cold comparators each have
approximately 3°C of hysteresis to prevent oscillation
about the trip point. Grounding the NTC pin can disable
the NTC function.
4085fd
18
LTC4085
APPLICATIONS INFORMATION
VNTC
VNTC
LTC4085
9
RNOM
10k
NTC
LTC4085
9
0.74 • VNTC
–
TOO_COLD
RNOM
121k
NTC
0.74 • VNTC
–
TOO_COLD
8
+
8
+
RNTC
10k
–
R1
13.3k
–
TOO_HOT
TOO_HOT
0.29 • VNTC
+
RNTC
100k
0.29 • VNTC
+
+
+
NTC_ENABLE
0.1V
NTC_ENABLE
–
0.1V
–
4085 F04a
(4a)
4085 F04b
(4b)
Figure 4. NTC Circuits
Thermistors
The LTC4085 NTC trip points were designed to work
with thermistors whose resistance-temperature characteristics follow Vishay Dale’s “R-T Curve 2”. The Vishay
NTHS0603N02N1002J is an example of such a thermistor. However, Vishay Dale has many thermistor products
that follow the “R-T Curve 2” characteristic in a variety of
sizes. Furthermore, any thermistor whose ratio of RCOLD
to RHOT is about 7.0 will also work (Vishay Dale R-T Curve
2 shows a ratio of RCOLD to RHOT of 2.815/0.4086 = 6.89).
Power conscious designs may want to use thermistors
whose room temperature value is greater than 10k. Vishay
Dale has a number of values of thermistor from 10k to
100k that follow the “R-T Curve 2”. Using these as indicated in the NTC Thermistor section will give temperature
trip points of approximately 3°C and 47°C, a delta of
44°C. This delta in temperature can be moved in either
direction by changing the value of RNOM with respect to
RNTC. Increasing RNOM will move both trip points to lower
temperatures. Likewise a decrease in RNOM with respect
to RNTC will move the trip points to higher temperatures.
To calculate RNOM for a shift to lower temperature for
example, use the following equation:
RNOM =
RCOLD
•R
at 25°C
2.815 NTC
where RCOLD is the resistance ratio of RNTC at the desired
cold temperature trip point. If you want to shift the trip
points to higher temperatures use the following equation:
RNOM =
RHOT
•R
at 25°C
0.4086 NTC
where RHOT is the resistance ratio of RNTC at the desired
hot temperature trip point.
Here is an example using a 100k R-T Curve 1 thermistor
from Vishay Dale. The difference between the trip points
is 44°C, from before, and we want the cold trip point to
be 0°C, which would put the hot trip point at 44°C. The
RNOM needed is calculated as follows:
RCOLD
• RNTC at 25°C
2.815
3.266
=
• 100k = 116k
2.815
RNOM =
4085fd
19
LTC4085
APPLICATIONS INFORMATION
The nearest 1% value for RNOM is 115K. This is the value
used to bias the NTC thermistor to get cold and hot trip
points of approximately 0°C and 44°C respectively. To
extend the delta between the cold and hot trip points a
resistor (R1) can be added in series with RNTC. (see Figure
3b). The values of the resistors are calculated as follows:
RNOM =
RCOLD – RHOT
2.815 – 0.4086
0.4086
⎛
⎞
• (RCOLD – RHOT ) – RHOT
R1= ⎜
⎝ 2.815 – 0.4086 ⎟⎠
where RNOM is the value of the bias resistor, RHOT and
RCOLD are the values of RNTC at the desired temperature
trip points. Continuing the example from before with a
desired hot trip point of 50°C:
RNOM =
R COLD – RHOT
=
100k • ( 3.266 – 0.3602 )
2.815 – 0.4086
2.815 – 0.4086
= 120.8k, 121k nearest 1%
⎡⎛
⎤
0.4086
⎞
R1 = 100k • ⎢ ⎜
• ( 3.266 – 0.3602 ) – 0.3602 ⎥
⎟
⎣ ⎝ 2.815 – 0.4086 ⎠
⎦
= 13.3k, 13.3k is nearest 1%
The final solution is as shown in Figure 3b where
RNOM = 121k, R1 = 13.3k and RNTC = 100k at 25°C
Using the WALL Pin to Detect the Presence of a Wall
Adapter
The WALL input pin identifies the presence of a wall
adapter (the pin should be tied directly to the adapter
output voltage). This information is used to disconnect the
input pin, IN, from the OUT pin in order to prevent back
conduction to whatever may be connected to the input.
It also forces the ACPR pin low when the voltage at the
WALL pin exceeds the input threshold. In order for the
presence of a wall adapter to be acknowledged, both of
the following conditions must be satisfied:
1. The WALL pin voltage exceeds VWAR (approximately
4.25V); and
2. The WALL pin voltage exceeds VWDR (approximately
75mV above VBAT)
The input power path (between IN and OUT) is re-enabled
and the ACPR pin assumes a high impedance state when
either of the following conditions is met:
1. The WALL pin voltage falls below VWDF (approximately
25mV above VBAT); or
2. The WALL pin voltage falls below VWAF (approximately
3.12V)
Each of these thresholds is suitably filtered in time to
prevent transient glitches on the WALL pin from falsely
triggering an event.
Power Dissipation
The conditions that cause the LTC4085 to reduce charge
current due to the thermal protection feedback can be
approximated by considering the power dissipated in the
part. For high charge currents and a wall adapter applied
to VOUT, the LTC4085 power dissipation is approximately:
PD = (VOUT – VBAT) • IBAT
Where, PD is the power dissipated, VOUT is the supply
voltage, VBAT is the battery voltage, and IBAT is the battery
charge current. It is not necessary to perform any worstcase power dissipation scenarios because the LTC4085
will automatically reduce the charge current to maintain
the die temperature at approximately 105°C. However, the
approximate ambient temperature at which the thermal
feedback begins to protect the IC is:
TA = 105°C – PD • θJA
TA = 105°C – (VOUT – VBAT) • IBAT • θJA
Example: Consider an LTC4085 operating from a wall
adapter with 5V at VOUT providing 0.8A to a 3V Li-Ion battery.
The ambient temperature above which the LTC4085 will
begin to reduce the 0.8A charge current, is approximately
TA = 105°C – (5V – 3V) • 0.8A • 37°C/W
TA = 105°C – 1.6W • 37°C/W = 105°C – 59°C = 46°C
The LTC4085 can be used above 46°C, but the charge
current will be reduced below 0.8A. The charge current
at a given ambient temperature can be approximated by:
IBAT =
105°C – TA
( VOUT – VBAT ) • θJA
4085fd
20
LTC4085
APPLICATIONS INFORMATION
VIN and Wall Adapter Bypass Capacitor
Consider the above example with an ambient temperature of
55°C. The charge current will be reduced to approximately:
IBAT =
Many types of capacitors can be used for input bypassing.
However, caution must be exercised when using multilayer
ceramic capacitors. Because of the self resonant and high
Q characteristics of some types of ceramic capacitors, high
voltage transients can be generated under some start-up
conditions, such as connecting the charger input to a hot
power source. For more information, refer to Application
Note 88.
105°C – 55°C
50°C
=
= 0.675A
(5V – 3V ) • 37°C/W 74°C/A
Board Layout Considerations
In order to be able to deliver maximum charge current
under all conditions, it is critical that the Exposed Pad on
the backside of the LTC4085 package is soldered to the
board. Correctly soldered to a 2500mm2 double-sided
1oz. copper board the LTC4085 has a thermal resistance
of approximately 37°C/W. Failure to make thermal contact
between the Exposed Pad on the backside of the package
and the copper board will result in thermal resistances far
greater than 37°C/W. As an example, a correctly soldered
LTC4085 can deliver over 1A to a battery from a 5V supply
at room temperature. Without a backside thermal connection, this number could drop to less than 500mA.
Stability
The constant-voltage mode feedback loop is stable without
any compensation when a battery is connected. However,
a 4.7μF capacitor with a 1Ω series resistor to GND is
recommended at the BAT pin to keep ripple voltage low
when the battery is disconnected.
TYPICAL APPLICATION
USB Power Control Application with Wall Adapter Input
5V WALL
ADAPTER
INPUT
4.7μF
1k
510Ω
TO LDOs
REGs, ETC
4.7μF
510Ω
1Ω*
5V (NOM)
FROM USB
CABLE VBUS
OUT
IN
4.7μF
CHRG
GATE
ACPR
1Ω*
WALL
BAT
VNTC
LTC4085
RNTCBIAS
10k
+
Li-Ion
CELL
NTC
RNTC
10k
SUSPEND USB POWER
SUSP
500mA/100mA SELECT
HPWR
PROG
*SERIES 1W RESISTOR ONLY
NEEDED FOR INDUCTIVE
INPUT SUPPLIES
CLPROG
RPROG
71.5k
TIMER
GND
RCLPROG
2.1k
0.15μF
4085 TA02
4085fd
21
LTC4085
PACKAGE DESCRIPTION
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)
0.70 ±0.05
3.30 ±0.05
3.60 ±0.05
2.20 ±0.05
1.70 ± 0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
3.00 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.115
TYP
4.00 ±0.10
(2 SIDES)
R = 0.05
TYP
3.00 ±0.10
(2 SIDES)
8
0.40 ± 0.10
14
3.30 ±0.10
1.70 ± 0.10
PIN 1 NOTCH
R = 0.20 OR
0.35 s 45°
CHAMFER
PIN 1
TOP MARK
(SEE NOTE 6)
(DE14) DFN 0806 REV B
7
0.200 REF
1
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
3.00 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
4085fd
22
LTC4085
REVISION HISTORY
REV
DATE
DESCRIPTION
D
4/11
Updated Block Diagram
(Revision history begins at Rev D)
PAGE NUMBER
10
4085fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC4085
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LTC4065/LTC4065A Standalone Li-Ion Battery Chargers in
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Power Management
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LTC3406/LTC3406A 600mA (IOUT), 1.5 MHz, Synchronous Step-Down 95% Efficiency, VIN = 2.5V to 5.5V, VOUT = 0.6V, IQ = 20μA, ISD < 1μA,
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LTC3411
1.25A (IOUT), 4 MHz, Synchronous Step-Down
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MS10 Package
LTC3440
600mA (IOUT), 2 MHz, Synchronous Buck-Boost
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LTC3455
Dual DC/DC Converter with USB Power Manager
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Seamless Transition Between Power Souces: USB, Wall Adapter and Battery;
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LTC4055
USB Power Controller and Battery Charger
Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal
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ThinSOT is a trademark of Linear Technology Corporation.
4085fd
24
Linear Technology Corporation
LT 0411 REV D • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006