SEMICONDUCTOR TECHNICAL DATA # $" #"% #"% $" " " $ N SUFFIX PLASTIC PACKAGE CASE 648–08 16 #! 1 High–Performance Silicon–Gate CMOS The MC74HC4316 utilizes silicon–gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF–channel leakage current. This bilateral switch/multiplexer/demultiplexer controls analog and digital voltages that may vary across the full analog power–supply range (from VCC to VEE). The HC4316 is similar in function to the metal–gate CMOS MC14016 and MC14066, and to the High–Speed CMOS HC4016 and HC4066. Each device has four independent switches. The device control and Enable inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The device has been designed so that the ON resistances (RON) are much more linear over input voltage than RON of metal–gate CMOS analog switches. Logic–level translators are provided so that the On/Off Control and Enable logic–level voltages need only be VCC and GND, while the switch is passing signals ranging between VCC and VEE. When the Enable pin (active–low) is high, all four analog switches are turned off. D SUFFIX SOIC PACKAGE CASE 751B–05 16 1 ORDERING INFORMATION MC74HCXXXXN MC74HCXXXXD Plastic SOIC PIN ASSIGNMENT • • • • • • Logic–Level Translator for On/Off Control and Enable Inputs Fast Switching and Propagation Speeds High ON/OFF Output Voltage Ratio Diode Protection on All Inputs/Outputs Analog Power–Supply Voltage Range (VCC – VEE) = 2.0 to 12.0 Volts Digital (Control) Power–Supply Voltage Range (VCC – GND) = 2.0 to 6.0 Volts, Independent of VEE • Improved Linearity of ON Resistance • Chip Complexity: 66 FETs or 16.5 Equivalent Gates XA 1 16 YA 2 15 YB 3 14 XB B ON/OFF CONTROL C ON/OFF CONTROL ENABLE 4 13 VCC A ON/OFF CONTROL D ON/OFF CONTROL XD 5 12 YD 6 11 YC 7 10 XC GND 8 9 VEE FUNCTION TABLE LOGIC DIAGRAM XA A ON/OFF CONTROL XB B ON/OFF CONTROL XC C ON/OFF CONTROL XD D ON/OFF CONTROL ENABLE 1 15 7 3 L L H X = don’t care YB ANALOG OUTPUTS/INPUTS ANALOG SWITCH 11 ANALOG SWITCH 12 YC PIN 16 = VCC PIN 8 = GND PIN 9 = VEE GND ≥ VEE LEVEL TRANSLATOR 13 14 ANALOG SWITCH YA LEVEL TRANSLATOR 10 6 2 LEVEL TRANSLATOR 4 5 ANALOG SWITCH Inputs On/Off Enable Control YD LEVEL TRANSLATOR ANALOG INPUTS/OUTPUTS = XA, XB, XC, XD 10/95 Motorola, Inc. 1995 1 REV 6 H L X State of Analog Switch On Off Off ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MC74HC4316 MAXIMUM RATINGS* Symbol Parameter Unit – 0.5 to + 7.0 – 0.5 to + 14.0 V VCC Positive DC Supply Voltage VEE Negative DC Supply Voltage (Ref. to GND) – 7.0 to + 0.5 V VIS Analog Input Voltage VEE – 0.5 to VCC + 0.5 V Vin DC Input Voltage (Ref. to GND) – 1.5 to VCC + 1.5 V ± 25 mA 750 500 mW – 65 to + 150 _C I DC Current Into or Out of Any Pin PD Power Dissipation in Still Air Tstg Storage Temperature TL (Ref. to GND) (Ref. to VEE) Value Plastic DIP† SOIC Package† This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND (Vin or Vout) VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. I/O pins must be connected to a properly terminated line or bus. v _C Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) v 260 * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. †Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C SOIC Package: – 7 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ v v ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VCC Positive DC Supply Voltage (Ref. to GND) 2.0 6.0 V VEE Negative DC Supply Voltage (Ref. to GND) – 6.0 GND V VIS Analog Input Voltage VEE VCC V Vin Digital Input Voltage (Ref. to GND) GND VCC V — 1.2 V – 55 + 125 _C 0 0 0 1000 500 400 ns VIO* Static or Dynamic Voltage Across Switch TA Operating Temperature, All Package Types tr, tf Input Rise and Fall Time (Control or Enable Inputs) (Figure 10) VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V * For voltage drops across the switch greater than 1.2 V (switch on), excessive VCC current may be drawn; i.e., the current out of the switch may contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. DC ELECTRICAL CHARACTERISTICS Digital Section (Voltages Referenced to GND) VEE = GND Except Where Noted Guaranteed Limit Symbol Parameter Test Conditions VCC V – 55 to 25_C 85_C 125_C Unit VIH Minimum High–Level Voltage, Control or Enable Inputs Ron = Per Spec 2.0 4.5 6.0 1.5 3.15 4.2 1.5 3.15 4.2 1.5 3.15 4.2 V VIL Maximum Low–Level Voltage, Control or Enable Inputs Ron = Per Spec 2.0 4.5 6.0 0.3 0.9 1.2 0.3 0.9 1.2 0.3 0.9 1.2 V Iin Maximum Input Leakage Current, Control or Enable Inputs Vin = VCC or GND VEE = – 6.0 V 6.0 ± 0.1 ± 1.0 ± 1.0 µA Maximum Quiescent Supply Current (per Package) Vin = VCC or GND VIO = 0 V 6.0 6.0 2 8 20 80 40 160 ICC µA VEE = GND VEE = – 6.0 NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). MOTOROLA 2 High–Speed CMOS Logic Data DL129 — Rev 6 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ v v ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ v ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ v ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ v ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ v ÎÎÎÎ v ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MC74HC4316 DC ELECTRICAL CHARACTERISTICS Analog Section (Voltages Referenced to VEE) Guaranteed Limit Symbol Ron Parameter VCC V VEE V – 55 to 25_C 85_C 125_C Vin = VIH VIS = VCC to VEE IS 2.0 mA (Figures 1, 2) 2.0* 45 4.5 6.0 0.0 0.0 – 4.5 – 6.0 — 210 95 75 — 230 105 85 — 250 110 90 Vin = VIH VIS = VCC or VEE (Endpoints) IS 2.0 mA (Figures 1, 2) 2.0 4.5 4.5 6.0 0.0 0.0 – 4.5 – 6.0 — 100 80 70 — 110 90 80 — 130 100 90 Test Conditions Maximum “ON” Resistance Unit Ω ∆Ron Maximum Difference in “ON” Resistance Between Any Two Channels in the Same Package Vin = VIH VIS = 1/2 (VCC – VEE) IS 2.0 mA 2.0 4.5 4.5 6.0 0.0 0.0 – 4.5 – 6.0 — 20 15 10 — 30 25 20 — 40 30 25 Ω Ioff Maximum Off–Channel Leakage Current, Any One Channel Vin = VIL VIO = VCC or VEE Switch Off (Figure 3) 6.0 – 6.0 0.1 0.5 1.0 µA Ion Maximum On–Channel Leakage Current, Any One Channel Vin = VIH VIS = VCC or VEE (Figure 4) 6.0 – 6.0 0.1 0.5 1.0 µA * At supply voltage (V CC – V EE) approaching 2 V the analog switch–on resistance becomes extremely non–linear. Therefore, for low–voltage operation, it is recommended that these devices only be used to control digital signals. NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Control or Enable tr = tf = 6 ns, VEE = GND) Guaranteed Limit Symbol Parameter VCC V – 55 to 25_C 85_C 125_C Unit tPLH, tPHL Maximum Propagation Delay, Analog Input to Analog Output (Figures 8 and 9) 2.0 4.5 6.0 50 10 10 75 15 13 90 18 15 ns tPLZ, tPHZ Maximum Propagation Delay, Control or Enable to Analog Output (Figures 10 and 11) 2.0 4.5 6.0 250 50 43 312 63 54 375 75 64 ns tPZL, tPZH Maximum Propagation Delay, Control or Enable to Analog Output (Figures 10 and 11) 2.0 4.5 6.0 185 53 45 220 66 56 265 75 68 ns Maximum Capacitance — 10 10 10 pF — — 35 1.0 35 1.0 35 1.0 C ON/OFF Control and Enable Inputs Control Input = GND Analog I/O Feedthrough NOTES: 1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). 2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). Typical @ 25°C, VCC = 5.0 V CPD Power Dissipation Capacitance (Per Switch) (Figure 13)* 15 pF * Used to determine the no–load dynamic power consumption: PD = CPD VCC 2 f + ICC VCC . For load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). High–Speed CMOS Logic Data DL129 — Rev 6 3 MOTOROLA ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ v ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MC74HC4316 ADDITIONAL APPLICATION CHARACTERISTICS (GND = 0 V) VCC V VEE V Limit* 25_C fin = 1 MHz Sine Wave Adjust fin Voltage to Obtain 0 dBm at VOS Increase fin Frequency Until dB Meter Reads – 3 dB RL = 50 Ω, CL = 10 pF 2.25 4.50 6.00 – 2.25 – 4.50 – 6.00 150 160 160 MHz fin Sine Wave Adjust fin Voltage to Obtain 0 dBm at VIS fin = 10 kHz, RL = 600 Ω, CL = 50 pF 2.25 4.50 6.00 – 2.25 – 4.50 – 6.00 – 50 – 50 – 50 dB fin = 1.0 MHz, RL = 50 Ω, CL = 10 pF 2.25 4.50 6.00 – 2.25 – 4.50 – 6.00 – 40 – 40 – 40 Vin 1 MHz Square Wave (tr = tf = 6 ns) Adjust RL at Setup so that IS = 0 A RL = 600 Ω, CL = 50 pF 2.25 4.50 6.00 – 2.25 – 4.50 – 6.00 60 130 200 RL = 10 kΩ, CL = 10 pF 2.25 4.50 6.00 – 2.25 – 4.50 – 6.00 30 65 100 fin Sine Wave Adjust fin Voltage to Obtain 0 dBm at VIS fin = 10 kHz, RL = 600 Ω, CL = 50 pF 2.25 4.50 6.00 – 2.25 – 4.50 – 6.00 – 70 – 70 – 70 fin = 1.0 MHz, RL = 50 Ω, CL = 10 pF 2.25 4.50 6.00 – 2.25 – 4.50 – 6.00 – 80 – 80 – 80 Symbol Parameter Test Conditions BW Maximum On–Channel Bandwidth or Minimum Frequency Response (Figure 5) Off–Channel Feedthrough Isolation (Figure 6) — — — THD Feedthrough Noise, Control to Switch (Figure 7) Crosstalk Between Any Two Switches (Figure 12) Total Harmonic Distortion (Figure 14) fin = 1 kHz, RL = 10 kΩ, CL = 50 pF THD = THDMeasured – THDSource VIS = 4.0 VPP sine wave VIS = 8.0 VPP sine wave VIS = 11.0 VPP sine wave Unit mVPP dB % 2.25 4.50 6.00 – 2.25 – 4.50 – 6.00 0.10 0.06 0.04 * Limits not tested. Determined by design and verified by qualification. MOTOROLA 4 High–Speed CMOS Logic Data DL129 — Rev 6 MC74HC4316 300 3000 2500 Ron , ON RESISTANCE (OHMS) Ron , ON RESISTANCE (OHMS) 125°C 2000 1500 25°C 1000 – 55°C 500 0 0 250 200 125°C 150 25°C 100 – 55°C 50 0 0.25 0.50 0.75 1.00 1.25 1.5 1.75 2.00 Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO VEE 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO VEE Figure 1a. Typical On Resistance, VCC – VEE = 2.0 V Figure 1b. Typical On Resistance, VCC – VEE = 4.5 V 160 120 Ron , ON RESISTANCE (OHMS) Ron , ON RESISTANCE (OHMS) 140 125°C 120 25°C 100 80 – 55°C 60 40 20 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 100 80 125°C 60 25°C 40 20 0 0 6.0 – 55°C 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO VEE Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO VEE Figure 1c. Typical On Resistance, VCC – VEE = 6.0 V Figure 1d. Typical On Resistance, VCC – VEE = 9.0 V 80 9.0 PLOTTER 70 Ron , ON RESISTANCE (OHMS) 4.5 125°C 60 PROGRAMMABLE POWER SUPPLY 25°C 50 40 – DC ANALYZER + VCC – 55°C 30 MINI COMPUTER DEVICE UNDER TEST 20 ANALOG IN 10 0 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 GND Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO VEE Figure 1e. Typical On Resistance, VCC – VEE = 12.0 V High–Speed CMOS Logic Data DL129 — Rev 6 COMMON OUT VEE Figure 2. On Resistance Test Set–Up 5 MOTOROLA MC74HC4316 VCC VCC 16 VEE VCC 16 A A VCC OFF VCC N/C ON O/I VEE VIL VIH 7 8 9 SELECTED CONTROL INPUT 7 8 9 SELECTED CONTROL INPUT VEE VEE Figure 3. Maximum Off Channel Leakage Current, Any One Channel, Test Set–Up Figure 4. Maximum On Channel Leakage Current, Test Set–Up VIS VCC 16 fin VCC RL VCC 16 TO dB METER ON 0.1 µF TO dB METER OFF 0.1 µF CL* RL 7 8 9 fin VCC RL RL 7 8 9 SELECTED CONTROL INPUT SELECTED CONTROL INPUT VEE VEE *Includes all probe and jig capacitance. *Includes all probe and jig capacitance. Figure 5. Maximum On–Channel Bandwidth Test Set–Up CL* Figure 6. Off–Channel Feedthrough Isolation, Test Set–Up VCC 16 TEST POINT ON/OFF RL 7 8 9 VEE RL VCC CL* ANALOG IN SELECTED CONTROL INPUT 50% GND tPLH CONTROL ANALOG OUT tPHL 50% *Includes all probe and jig capacitance. Figure 7. Feedthrough Noise, Control to Analog Out, Test Set–Up MOTOROLA Figure 8. Propagation Delays, Analog In to Analog Out 6 High–Speed CMOS Logic Data DL129 — Rev 6 MC74HC4316 VCC 16 ANALOG I/O tr ANALOG O/I ON tf ENABLE TEST POINT VCC 50% CONTROL 50 pF* GND tPLZ tPZL 7 8 9 SELECTED CONTROL INPUT VCC HIGH IMPEDANCE 50% ANALOG OUT tPZH tPHZ 10% VOL 90% VOH 50% HIGH IMPEDANCE *Includes all probe and jig capacitance. Figure 9. Propagation Delay Test Set–Up Figure 10. Propagation Delay, ON/OFF Control to Analog Out VIS POSITION 1 WHEN TESTING tPHZ AND tPZH POSITION 2 WHEN TESTING tPLZ AND tPZL 1 2 fin VCC VCC RL ON CL* TEST POINT ON/OFF 2 16 0.1 µF 1 kΩ 16 1 VCC RL ANALOG I/O 50 pF* TEST POINT OFF CONTROL OR ENABLE 7 8 9 8 9 VEE *Includes all probe and jig capacitance. RL CL* VCC SELECTED CONTROL INPUT *Includes all probe and jig capacitance. Figure 11. Propagation Delay Test Set–Up Figure 12. Crosstalk Between Any Two Switches, Test Set–Up (Adjacent Channels Used) VCC A VIS VCC 16 N/C ON/OFF 10 µF N/C VOS 16 fin ON RL 7 8 9 VEE SELECTED CONTROL INPUT 7 8 9 VEE CONTROL SELECTED CONTROL INPUT CL* TO DISTORTION METER VCC *Includes all probe and jig capacitance. Figure 13. Power Dissipation Capacitance Test Set–Up High–Speed CMOS Logic Data DL129 — Rev 6 Figure 14. Total Harmonic Distortion, Test Set–Up 7 MOTOROLA MC74HC4316 0 – 10 FUNDAMENTAL FREQUENCY – 20 – 30 dBm – 40 – 50 DEVICE – 60 SOURCE – 70 – 80 – 90 – 100 1.0 2.0 3.0 FREQUENCY (kHz) Figure 15. Plot, Harmonic Distortion below, the difference between VCC and VEE is twelve volts. Therefore, using the configuration in Figure 16, a maximum analog signal of twelve volts peak–to–peak can be controlled. When voltage transients above VCC and/or below VEE are anticipated on the analog channels, external diodes (Dx) are recommended as shown in Figure 17. These diodes should be small signal, fast turn–on types able to absorb the maximum anticipated current surges during clipping. An alternate method would be to replace the Dx diodes with MOsorbs (Motorola high current surge protectors). MOsorbs are fast turn–on devices ideally suited for precise dc protection with no inherent wear out mechanism. APPLICATION INFORMATION The Enable and Control pins should be at VCC or GND logic levels, VCC being recognized as logic high and GND being recognized as a logic low. Unused analog inputs/outputs may be left floating (not connected). However, it is advisable to tie unused analog inputs and outputs to VCC or VEE through a low value resistor. This minimizes crosstalk and feedthrough noise that may be picked up by the unused I/O pins. The maximum analog voltage swings are determined by the supply voltages VCC and VEE. The positive peak analog voltage should not exceed VCC. Similarly, the negative peak analog voltage should not go below VEE. In the example VCC VCC = 6 V 16 +6V ANALOG I/O ON ANALOG O/I +6V SELECTED CONTROL INPUT VEE 8 16 Dx SELECTED CONTROL INPUT Dx Dx +6V ON –6 V –6 V VCC VCC Dx VEE ENABLE CONTROL INPUTS (VCC OR GND) VEE VEE ENABLE CONTROL INPUTS (VCC OR GND) –6 V Figure 16. MOTOROLA Figure 17. Transient Suppressor Application 8 High–Speed CMOS Logic Data DL129 — Rev 6 MC74HC4316 VCC = 5 V +5 V 16 ANALOG SIGNALS 16 ANALOG SIGNALS ANALOG SIGNALS ANALOG SIGNALS R* R* R* R* R* HC4316 7 5 6 14 15 TTL HCT BUFFER VEE = 0 TO – 6 V VEE = 0 TO – 6 V 5 LSTTL/ NMOS ENABLE AND CONTROL 9 INPUTS 8 HC4016 6 CONTROL INPUTS 9 14 15 7 R* = 2 TO 10 kΩ a. Using Pull–Up Resistors b. Using HCT Buffer Figure 18. LSTTL/NMOS to HCMOS Interface VCC = 12 V R1 12 V POWER SUPPLY GND = 6 V R2 VEE = 0 V R1 = R2 VCC 12 VPP ANALOG INPUT SIGNAL R3 C 1 OF 4 SWITCHES ANALOG OUTPUT SIGNAL 0 R4 VEE 12 V R1 = R2 R3 = R4 Figure 19. Switching a 0–to–12 V Signal Using a Single Power Supply (GND ≠ 0 V) CHANNEL 4 1 OF 4 SWITCHES CHANNEL 3 1 OF 4 SWITCHES CHANNEL 2 1 OF 4 SWITCHES CHANNEL 1 1 OF 4 SWITCHES COMMON I/O – INPUT 1 OF 4 SWITCHES + OUTPUT LF356 OR EQUIVALENT 0.01 µF 1 2 3 4 CONTROL INPUTS Figure 20. 4–Input Multiplexer High–Speed CMOS Logic Data DL129 — Rev 6 Figure 21. Sample/Hold Amplifier 9 MOTOROLA MC74HC4316 OUTLINE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 648–08 ISSUE R –A – 16 9 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. B F C DIM A B C D F G H J K L M S L S –T – SEATING PLANE K H D 16 PL 0.25 (0.010) M M J G T A M D SUFFIX PLASTIC SOIC PACKAGE CASE 751B–05 ISSUE J –A – 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 9 –B – 1 P 8 PL 0.25 (0.010) 8 M B M G K F R X 45° C –T SEATING – PLANE J M D 16 PL 0.25 (0.010) M T B S A S INCHES MILLIMETERS MIN MAX MIN MAX 0.740 0.770 18.80 19.55 6.35 0.250 0.270 6.85 3.69 0.145 0.175 4.44 0.39 0.015 0.021 0.53 1.02 0.040 0.070 1.77 0.100 BSC 2.54 BSC 0.050 BSC 1.27 BSC 0.21 0.008 0.015 0.38 2.80 0.110 0.130 3.30 7.50 0.295 0.305 7.74 0° 0° 10° 10° 0.020 0.040 0.51 1.01 DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 4.00 3.80 1.75 1.35 0.49 0.35 1.25 0.40 1.27 BSC 0.25 0.19 0.25 0.10 7° 0° 6.20 5.80 0.50 0.25 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0° 7° 0.229 0.244 0.010 0.019 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. 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Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315 MFAX: [email protected] –TOUCHTONE (602) 244–6609 INTERNET: http://Design–NET.com HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 MOTOROLA ◊ CODELINE 10 *MC74HC4316/D* MC74HC4316/D High–Speed CMOS Logic Data DL129 — Rev 6