NSC MM5484 Mm5484 16-segment led display driver Datasheet

MM5484 16-Segment LED Display Driver
Y
General Description
Y
The MM5484 is a low threshold N-channel metal gate circuit
using low threshold enhancement and ion implanted depletion devices. The MM5484 is available in a 22-pin molded
package and is capable of driving 16 LED segments. The
MM5484 is designed to drive common anode separate cathode LED displays.
Y
Y
Y
Applications
Y
Features
Y
Y
Y
Y
Serial data input
Wide power supply operation
16 output, 15 mA sink capability
MM5484 is cascadeable
TTL compatibility
No load signal required
Non multiplex display
2(/2 digit capabilityÐMM5484
Y
Y
COPSTM or microprocessor displays
Instrumentation readouts
Industrial control indicator
Relay driver
Block and Connection Diagrams
TL/F/6141 – 1
FIGURE 1. MM5484
PLCC
Dual-In-Line Package
TL/F/6141 – 3
Top View
Order Number MM5484N
See NS Package Number N22A
TL/F/6141 – 6
Top View
Order Number MM5484V
See NS Package Number V28A
COPSTM is a trademark of National Semiconductor Corp.
C1995 National Semiconductor Corporation
TL/F/6141
RRD-B30M105/Printed in U. S. A.
MM5484 16-Segment LED Display Driver
February 1995
Absolute Maximum Ratings
Operating Temperature
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at LED Outputs
b 40§ C to a 150§ C
Power Dissipation at 25§ C
Molded DIP Package, board mount
Molded DIP Package, socket mount
*Molded DIP Package, board mount,
derate 15.8m W/§ C above 25§ C.
**Molded DIP Package, socket mount,
derate 14.5m W/§ C above 25§ C.
Lead Temperature (Soldering, 10 sec.)
VSS b 0.5V to VSS a 12V
VSS b 0.5V to VSS a 10V
Voltage at Other Pins
b 40§ C to a 85§ C
Storage Temperature
2W*
1.8W**
iJA e 63§ C/W,
iJA e 69§ C/W,
300§ C
DC Electrical Characteristics VDD e 4.5V to 9V, TA e b40§ C to a 85§ C unless otherwise specified
Parameter
Conditions
Min
Supply Voltage
Typ
Max
9
V
5
10
mA
VDD a 0.5
V
0.8
7.5
V
mA
pF
0.5
50
V
V
mA
1.0
V
4.5
Supply Current
Logic One
Input High Level VIH
2.4
Logic Zero
Input Low Level VIL
Input Current
Input Capacitance
0
High or Low Level
g1
Units
OUTPUTS
Data Output Voltage
High Level VOH
Low Level VOL
Segment Off
(Logic Zero on Input)
IOUT e 0.1 mA
IOUT e b0.1 mA
VOUT e 12V
REXT e 400X
Output Current Segment On
(Logic One on Input)
Output Voltage
IOUT e 15 mA
VDD t 6V
VDD b 0.5
0.5
AC Electrical Characteristics
(See Figure 3 .) VDD e 4.5V to 9V, TA e b40§ C to a 85§ C unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Units
0.5
MHz
fC
Clock Frequency
th
High Time
0.95
ms
tl
Low Time
0.95
ms
tS1
Data Setup Time
0.5
ms
tH1
Data Hold Time
0.5
ms
tS2
Enable Setup Time
0.5
ms
tH2
Enable Hold Time
0.5
tpd
Data Out Delay
ms
0.5
Note 1: Under no condition should the power dissipated by the segment driver exceed 50 mW nor the entire chip power dissipation exceed 500 mW.
Note 2: AC input waveform specification for test purpose: tr s 20 ns, tf s 20 ns, f e 500 kHz, 50% g 10% duty cycle.
Note 3: Clock input rise and fall times must not exceed 500 ns.
2
ms
Functional Description
When the ENABLE signal goes to a low (logic zero state),
the contents of the shift register is latched and the display
will show the new data. While new data is being loaded into
the SR the display will continue to show the old data.
For the MM5484, data is output from the serial DATA OUT
pin on the falling edge of clock so cascading is made simple
with race hazards eliminated.
When the chip first powers on, an internal power on reset
signal is generated which resets the SR and latches to zero
so that the display will be off.
The MM5484 is designed to drive LED displays directly. Serial data transfer from the data source to the display driver is
accomplished with 3 signals, DATA IN, CLOCK and ENABLE. The signal ENABLE acts as an envelope and only
while this signal is at a logic ‘1’ do the circuits recognize the
clock signal.
While ENABLE is high, data on the serial data input is transferred and shifted in the internal shift register on the rising
clock edge, i.e. a logic ‘0’ to logic ‘1’ transition.
Timing Diagram
TL/F/6141 – 5
FIGURE 3
Physical Dimensions inches (millimeters)
Molded Dual-In-Line Package (N)
Order Number MM5484N
NS Package Number N22A
3
MM5484 16-Segment LED Display Driver
Physical Dimensions inches (millimeters) (Continued)
28-Pin Plastic Leaded Chip Carrier (V)
Order Number MM5484V
NS Package Number V28A
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