NSC MM5483 Mm5483 liquid crystal display driver Datasheet

MM5483 Liquid Crystal Display Driver
Y
General Description
Y
The MM5483 is a monolithic integrated circuit utilizing
CMOS metal-gate low-threshold enhancement mode devices. It is available in a 40-pin molded package. The chip can
drive up to 31 segments of LCD and can be cascaded to
increase this number. This chip is capable of driving a 4(/2digit 7-segment display with minimal interface between the
display and the data source.
The MM5483 stores the display data in latches after it is
latched in, and holds the data until another load pulse is
received
Y
Y
Y
Applications
Y
Y
Y
Y
Y
Features
Y
Y
Wide power supply operation
TTL compatibility
31 segment outputs
Alphanumeric and bar graph capability
Cascade capability
COPSTM or microprocessor displays
Industrial control indicator
Digital clock, thermometer, counter, voltmeter
Instrumentation readouts
Remote displays
Serial data input
Serial data output
Block and Connection Diagrams
Dual-In-Line Package
TL/F/6140 – 1
FIGURE 1
TL/F/6140 – 2
Top View
FIGURE 2
Order Number MM5483MS or MM5483N
See SSOP Package Number MS40A
See NS Package Number N40A
TL/F/6140 – 7
Order Number MM5483V
See NS Package Number V44A
COPSTM is a trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/6140
RRD-B30M105/Printed in U. S. A.
MM5483 Liquid Crystal Display Driver
February 1995
Absolute Maximum Ratings
Power Dissipation
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Pin
Junction Temperature
Lead Temperature
(Soldering, 10 seconds)
VSS to VSS a 10V
b 40§ C to a 85§ C
b 65§ C to a 150§ C
Operating Temperature
Storage Temperature
300 mW at a 85§ C
350 mW at a 25§ C
a 150§ C
300§ C
DC Electrical Characteristics
TA within operating range, VDD e 3.0V to 10V, VSS e 0V, unless otherwise specified
Parameter
Conditions
Min
Power Supply
Typ
Max
Units
10
V
9
17
35
15
25
45
mA
mA
mA
1.5
2.5
mA
0.9
3.0
Power Supply Current
R e 1M, C e 470 pF,
Outputs Open
VDD e 3.0V
VDD e 5.0V
VDD e 10.0V
OSC e 0V, Outputs Open,
BPIN e 32 Hz, VDD e 3.0V
Input Voltage Levels
Logic ‘‘0’’
Logic ‘‘1’’
Logic ‘‘0’’
Logic ‘‘1’’
Load, Clock, Data
VDD e 5.0V
VDD e 5.0V
VDD e 3.0V
VDD e 3.0V
2.4
2.0
V
V
V
V
Output Current Levels
Segments and Data Out
Sink
Source
VDD e 3.0V, VOUT e 0.3V
VDD e 3.0V, VOUT e 2.7V
20
20
mA
mA
BP OUT
Sink
Source
VDD e 3.0V, VOUT e 0.3V
VDD e 3.0V, VOUT e 2.7V
320
320
mA
mA
0.4
AC Electrical Characteristics VDD t 4.7V, VSS e 0V unless otherwise specified
Symbol
Parameter
fC
Clock Frequency, VDD e 3V
tCH
Clock Period High
tCL
Min
(Notes 1, 2)
Typ
Max
Units
500
kHz
500
ns
Clock Period Low
500
ns
tDS
Data Set-Up before Clock
300
ns
tDH
Data Hold Time after Clock
100
ns
tLW
Minimum Load Pulse Width
500
ns
tLTC
Load to Clock
400
ns
tCDO
Clock to Data Valid
400
750
ns
Note 1: AC input waveform specification for test purpose: tr s 20 ns, tf s 20 ns, f e 500 kHz, 50% g 10% duty cycle.
Note 2: Clock input rise and fall times must not exceed 300 ns.
Note 3: Output offset voltage is g 50 mV with CSEGMENT e 250 pF, CBP e 8750 pF.
Functional Description
A block diagram for the MM5483 is shown in Figure 1 and a
package pinout is shown in Figure 2 . Figure 3 shows a possible 3-wire connection system with a typical signal format
for Figure 3 . Shown in Figure 4 , the load input is an asynchronous input and lets data through from the shift register
to the output buffers any time it is high. The load input can
be connected to VDD for 2-wire control as shown in Figure
5 . In the 2-wire control mode, 31 bits (or less depending on
the number of segments used) of data are clocked into the
MM5483 in a short time frame (with less than 0.1 second
there probably will be no noticeable flicker) with no more
clocks until new information is to be displayed. If data was
slowly clocked in, it can be seen to ‘‘walk’’ across the display in the 2-wire mode. An AC timing diagram can be seen
in Figure 6 . It should be noted that data out is not a TTLcompatible output.
2
Functional Description (Continued)
TL/F/6140 – 3
FIGURE 3. Three-Wire Control Mode
TL/F/6140 – 4
FIGURE 4. Data Format Diagram
TL/F/6140 – 5
FIGURE 5. Two-Wire Control Mode
TL/F/6140 – 6
FIGURE 6. Timing Diagram
3
4
Physical Dimensions inches (millimeters)
40-Lead Molded Shrink Small Outline Package, JEDEC
Order Number MM5483MS
NS Package Number MS40A
Molded Dual-In-Line Package (N)
Order Number MM5483N
NS Package Number N40A
5
MM5483 Liquid Crystal Display Driver
Physical Dimensions inches (millimeters) (Continued)
Order Number MM5483V
NS Package Number V44A
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