SSF45N20B 200V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switching DC/DC converters, switch mode power supplies, DC-AC converters for uninterrupted power supply and motor control. • • • • • • 26.4A, 200V, RDS(on) = 0.065Ω @VGS = 10 V Low gate charge ( typical 133 nC) Low Crss ( typical 120 pF) Fast switching 100% avalanche tested Improved dv/dt capability D ! ● ◀ G! TO-3PF G D S ID ! SSF Series Absolute Maximum Ratings Symbol VDSS S TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) IDM Drain Current ▲ ● ● - Pulsed (Note 1) SSF45N20B 200 Units V 26.4 A 16.7 A 106 A VGSS Gate-Source Voltage ± 30 V EAS Single Pulsed Avalanche Energy (Note 2) 650 mJ IAR Avalanche Current (Note 1) 26.4 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) (Note 1) 10 5.5 100 0.8 -55 to +150 mJ V/ns W W/°C °C 300 °C dv/dt PD TJ, TSTG TL (Note 3) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case RθJA Thermal Resistance, Junction-to-Ambient ©2001 Fairchild Semiconductor Corporation Typ -- Max 1.25 Units °C/W -- 40 °C/W Rev. C, November 2001 SSF45N20B November 2001 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units 200 -- -- V -- 0.2 -- V/°C VDS = 200 V, VGS = 0 V -- -- 10 µA VDS = 160 V, TC = 125°C -- -- 100 µA Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C IDSS IGSSF IGSSR Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.0 -- 4.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 13.2 A -- 0.052 0.065 Ω gFS Forward Transconductance VDS = 40 V, ID = 13.2 A -- 30 -- S -- 3300 4300 pF -- 460 600 pF -- 120 155 pF -- 45 100 ns -- 340 690 ns -- 360 730 ns -- 270 550 ns -- 133 173 nC (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 100 V, ID = 45 A, RG = 25 Ω (Note 4, 5) VDS = 160 V, ID = 45 A, VGS = 10 V (Note 4, 5) -- 19 -- nC -- 67 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 26.4 A ISM -- -- 106 A -- -- 1.5 V VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 26.4 A Drain-Source Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 45 A, dIF / dt = 100 A/µs (Note 4) -- 245 -- ns -- 2.27 -- µC Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 1.4mH, IAS = 26.4A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 45A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2001 Fairchild Semiconductor Corporation Rev. C, November 2001 SSF45N20B Electrical Characteristics SSF45N20B Typical Characteristics 2 2 10 10 VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V Bottom : 5.0 V 1 ID, Drain Current [A] ID, Drain Current [A] Top : 1 10 10 o 150 C o 25 C 0 10 o -55 C ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ ※ Notes : 1. VDS = 40V 2. 250μ s Pulse Test -1 0 10 -1 10 0 10 1 10 2 10 4 6 8 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics 0.30 Figure 2. Transfer Characteristics 2 10 VGS = 10V IDR, Reverse Drain Current [A] RDS(ON) [Ω ], Drain-Source On-Resistance 0.25 0.20 VGS = 20V 0.15 1 10 0.10 0.05 150℃ 25℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test ※ Note : TJ = 25℃ 0.00 0 0 35 70 105 140 175 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature 10000 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 12 VDS = 40V Ciss 6000 Coss 4000 Crss ※ Notes : 1. VGS = 0 V 2. f = 1 MHz 2000 VGS , Gate-Source Voltage [V] 10 8000 Capacitance [pF] 10 ID, Drain Current [A] VDS = 100V VDS = 160V 8 6 4 2 ※ Note : ID = 45 A 0 0 -1 10 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2001 Fairchild Semiconductor Corporation 0 30 60 90 120 150 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. C, November 2001 SSF45N20B Typical Characteristics (Continued) 3.0 1.2 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μ A 0.9 0.8 -100 -50 0 50 100 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 22.5 A 0.5 150 0.0 -100 200 -50 0 50 100 150 200 o o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs Temperature Figure 8. On-Resistance Variation vs Temperature 30 Operation in This Area is Limited by R DS(on) 25 2 10 µs 100 µs 20 ID, Drain Current [A] ID, Drain Current [A] 10 1 ms 1 10 ms 10 15 DC 10 0 10 ※ Notes : o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse 5 0 25 -1 10 0 1 10 2 10 10 50 100 125 150 Figure 10. Maximum Drain Current vs Case Temperature 0 D = 0 .5 ※ N o te s : 1 . Z θ J C (t) = 1 .2 5 ℃ /W M a x . 2 . D u ty F a c to r, D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C (t) 0 .2 0 .1 10 -1 0 .0 5 PDM 0 .0 2 0 .0 1 Z θ JC (t), T h e r m a l R e s p o n s e Figure 9. Maximum Safe Operating Area 10 75 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] t1 t2 s in g le p u ls e 10 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] Figure 11. Transient Thermal Response Curve ©2001 Fairchild Semiconductor Corporation Rev. C, November 2001 SSF45N20B Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50KΩ Qg 200nF 12V 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL VDS 90% VDD VGS RG VGS DUT 10V 10% td(on) tr td(off) t on tf t off Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD DUT 10V tp ©2001 Fairchild Semiconductor Corporation ID (t) VDS (t) VDD tp Time Rev. C, November 2001 SSF45N20B Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2001 Fairchild Semiconductor Corporation Rev. C, November 2001 SSF45N20B Package Dimensions TO-3PF 4.50 ±0.20 5.50 ±0.20 15.50 ±0.20 ° 2.00 ±0.20 2.00 ±0.20 2.00 ±0.20 22.00 ±0.20 1.50 ±0.20 16.50 ±0.20 2.50 ±0.20 0.85 ±0.03 23.00 ±0.20 10 10.00 ±0.20 (1.50) 2.00 ±0.20 14.50 ±0.20 16.50 ±0.20 2.00 ±0.20 4.00 ±0.20 3.30 ±0.20 +0.20 0.75 –0.10 2.00 ±0.20 3.30 ±0.20 5.45TYP [5.45 ±0.30] 5.45TYP [5.45 ±0.30] +0.20 0.90 –0.10 5.50 ±0.20 26.50 ±0.20 14.80 ±0.20 3.00 ±0.20 ø3.60 ±0.20 Dimensions in Millimeters ©2001 Fairchild Semiconductor Corporation Rev. C, November 2001 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT™ FACT Quiet Series™ FAST® FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SLIENT SWITCHER® SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TruTranslation™ TinyLogic™ UHC™ UltraFET® VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2001 Fairchild Semiconductor Corporation Rev. H4