Order this document by MMFT2N25E/D SEMICONDUCTOR TECHNICAL DATA N–Channel Enhancement–Mode Silicon Gate This advanced high voltage TMOS E–FET is designed to withstand high energy in the avalanche mode and switch efficiently. This new high energy device also offers a drain–to–source diode with fast recovery time. Designed for high voltage, high speed switching applications such as power supplies, PWM motor controls and other inductive loads, the avalanche energy capability is specified to eliminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients. • Avalanche Energy Capability Specified at Elevated Temperature • Internal Source–to–Drain Diode Designed to Replace External Zener Transient Suppressor – Absorbs High Energy in the Avalanche Mode • Source–to–Drain Diode Recovery Time Comparable to Discrete Fast Recovery Diode TMOS POWER FET 2.0 AMPERES 250 VOLTS RDS(on) = 3.5 W 4 2,4 D 1 2 3 1 CASE 318E–04, STYLE 3 TO–261AA G S 3 MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Drain–to–Source Voltage Symbol Value Unit VDSS 250 Vdc Drain–to–Gate Voltage, RGS = 1.0 mW VDGR 250 Vdc Gate–to–Source Voltage — Continuous VGS ± 20 Vdc VGSM ± 40 Vdc Drain Current — Continuous @ TC = 25°C Drain Current — Continuous @ TC = 100°C Drain Current — Single Pulse (tp ≤ 10 mS) ID ID IDM 2.0 0.6 7.0 Adc Total Power Dissipation @ TC = 25°C Derate above 25°C Total PD @ TA = 25°C mounted on 1″ Sq. Drain Pad on FR–4 Bd. Material Total PD @ TA = 25°C mounted on 0.7″ Sq. Drain Pad on FR–4 Bd. Material Total PD @ TA = 25°C mounted on min. Drain Pad on FR–4 Bd. Material PD 0.77 6.2 1.0 1.2 0.8 Watts mW/°C Watts TJ, Tstg – 55 to 150 °C Gate–to–Source Voltage — Single Pulse (tp ≤ 50 mS) Operating and Storage Temperature Range Apk UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS (TJ < 150°C) Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C (VDD = 80 V, VGS = 10 V, Peak IL= 4.0 Apk, L = 3.0 mH, RG = 25 Ω) EAS mJ 26 THERMAL CHARACTERISTICS — Junction–to–Ambient on 1″ Sq. Drain Pad on FR–4 Bd. Material — Junction–to–Ambient on 0.7″ Sq. Drain Pad on FR–4 Bd. Material — Junction–to–Ambient on min. Drain Pad on FR–4 Bd. Material Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds RθJA 90 103 162 °C/W TL 260 °C This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. TMOS is a registered trademark of Motorola, Inc. E–FET is a trademark of Motorola, Inc. TMOS Motorola Motorola, Inc. 1997 Power MOSFET Transistor Device Data 1 MMFT2N25E ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max 250 — — 324 — — — — — — 10 100 — — 100 2.0 — 2.8 5.7 4.0 — — 2.1 3.5 — — — — 8.40 7.35 0.44 1.2 — Ciss — 137 190 Coss — 30 40 Crss — 7.0 10 td(on) — 9.2 20 tr — 6.6 10 td(off) — 13 30 Unit OFF CHARACTERISTICS Drain–to–Source Breakdown Voltage (VGS = 0, ID = 0.25 mA) Temperature Coefficient (Positive) BVDSS Zero Gate Voltage Drain Current (VDS = 250 V, VGS = 0) (VDS = 250 V, VGS = 0, TJ = 125°C) IDSS Gate–Body Leakage Current (VGS = ± 20 V, VDS = 0) IGSS Vdc V/°C µAdc nAdc ON CHARACTERISTICS (1) Gate Threshold Voltage (VDS = VGS, ID = 0.25 mA) Threshold Temperature Coefficient (Negative) VGS(th) Static Drain–to–Source On–Resistance (VGS = 10 V, ID = 1.0 Adc) RDS(on) Drain–to–Source On–Voltage (VGS = 10 V, ID = 2.0 A) (VGS = 10 V, ID = 1.0 A, TJ = 125°C) VDS(on) Forward Transconductance (VDS = 8.0 V, ID = 2.0 Adc) Vdc mV/°C Ohms Vdc gFS mhos DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 25 V, VGS = 0, f = 1.0 1 0 MHz) Output Capacitance Transfer Capacitance pF SWITCHING CHARACTERISTICS (1) Turn–On Delay Time (VDS = 125 V, V ID = 2.0 A,, RG = 9.1 Ohms, VGS = 10 V) Rise Time Turn–Off Delay Time Fall Time tf — 8.5 20 QT — 4.7 10 Q1 — 1.3 — Q2 — 3.2 — Q3 — 2.3 — IS = 2.0 A, VGS = 0 V VSD — 0.94 2.0 IS = 2.0 A, VGS = 0 V, TJ = 125°C VSD — 0.83 — trr — 104 — ta — 63 — tb — 41 — qrr — 0.365 — Gate Charge (VDS = 200 V, V ID = 2.0 2 0 A, A VGS = 10 V)) ns nC SOURCE–DRAIN DIODE CHARACTERISTICS Forward On–Voltage Reverse Recovery Time ((IS = 2 2.0 0A A,, dlS/dt = 100 A/µs) Reverse Recovery Stored Charge Vdc nS mC (1) Pulse Test: Pulse Width ≤ 300 µS, Duty Cycle ≤ 2%. 2 Motorola TMOS Power MOSFET Transistor Device Data MMFT2N25E 4.0 4.0 VGS = 10 V ID , DRAIN CURRENT (AMPS) 3.5 9.0 V 3.0 2.5 2.0 6.0 V 1.5 1.0 5.0 V 0.5 3.0 – 55°C 25°C 2.5 2.0 1.5 1.0 0 0 5.0 10 15 3.0 20 3.5 4.0 4.5 5.0 6.0 5.5 6.5 VGS, GATE–TO–SOURCE VOLTAGE (VOLTS) Figure 1. On–Region Characteristics Figure 2. Transfer Characteristics 7.0 VGS = 10 V 6.0 TJ = 100°C 5.0 25°C 4.0 3.0 – 55°C 2.0 1.0 0 1.0 0 2.0 3.0 4.0 R DS(on), DRAIN–TO–SOURCE RESISTANCE (OHMS) VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS) 7.0 TJ = 25°C 5.0 4.0 VGS = 10 V 15 V 3.0 2.0 1.0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 ID, DRAIN CURRENT (AMPS) Figure 3. On–Resistance versus Drain Current and Temperature Figure 4. On–Resistance versus Drain Current and Gate Voltage 100 2.5 7.5 6.0 ID, DRAIN CURRENT (AMPS) VGS = 0 V VGS = 10 V ID = 1.0 A 4.0 TJ = 125°C 2.0 IDSS , LEAKAGE (nA) R DS(on), DRAIN–TO–SOURCE RESISTANCE (OHMS) TJ = 100°C 0.5 0 R DS(on) , DRAIN–TO–SOURCE RESISTANCE (NORMALIZED) VDS ≥ 10 V 3.5 8.0 V 7.0 V ID , DRAIN CURRENT (AMPS) TJ = 25°C 1.5 1.0 100°C 10 0.5 0 –50 1.0 –25 0 25 50 75 100 125 150 0 50 100 150 200 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS) Figure 5. On–Resistance Variation versus Temperature Figure 6. Drain–to–Source Leakage Current versus Voltage Motorola TMOS Power MOSFET Transistor Device Data 250 3 VGS = 0 V TJ = 25°C Ciss 300 C, CAPACITANCE (pF) VDS = 0 V 250 200 Crss Ciss 150 100 50 Coss Crss 0 –10 –5.0 0 VGS 10 5.0 15 12 QT 10 8.0 Q1 100 4.0 50 2.0 Q3 2.0 0 8.0 6.0 0 10 QG, TOTAL GATE CHARGE (nC) Figure 8. Gate–to–Source and Drain–to–Source Voltage versus Total Charge 2.0 IS , SOURCE CURRENT (AMPS) TJ = 25°C ID = 2.0 A VDD = 125 V VGS = 10 V t, TIME (ns) 4.0 VDS 100 td(off) 10 tf tr td(on) 1.0 TJ = 25°C VGS = 0 V 1.5 1.0 0.5 0 1.0 10 100 0.3 0.4 0.5 0.6 0.7 0.8 0.9 RG, GATE RESISTANCE (OHMS) VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current 1.0 60 10 VGS = 20 V SINGLE PULSE TC = 25°C 100 ms EAS , SINGLE PULSE DRAIN–TO–SOURCE AVALANCHE ENERGY (mJ) ID, DRAIN CURRENT (AMPS) TJ = 25°C ID = 2.0 A 0 Figure 7. Capacitance Variation 1.0 ms 10 ms 0.1 dc 0.01 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT ID = 2.0 A 50 40 30 20 10 0 0.001 0.1 4 150 Q2 6.0 GATE–TO–SOURCE OR DRAIN–TO–SOURCE VOLTAGE (VOLTS) 1.0 200 VGS VDS 25 20 250 VDS , DRAIN–TO–SOURCE VOLTAGE (VOLTS) 350 VGS, GATE–TO–SOURCE VOLTAGE (VOLTS) MMFT2N25E 1.0 10 100 1000 25 50 75 100 125 150 VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS) TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy versus Starting Junction Temperature Motorola TMOS Power MOSFET Transistor Device Data MMFT2N25E r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1.0 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 SINGLE PULSE 0.001 1.0E–5 1.0E–4 1.0E–3 1.0E–2 1.0E–1 1.0E+0 1.0E+1 1.0E+2 1.0E+3 t, TIME (seconds) Figure 13. Thermal Response MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.15 3.8 0.079 2.0 0.091 2.3 0.248 6.3 0.091 2.3 0.079 2.0 0.059 1.5 0.059 1.5 0.059 1.5 inches mm SOT–223 Motorola TMOS Power MOSFET Transistor Device Data 5 MMFT2N25E PACKAGE DIMENSIONS A F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 4 S B 1 2 3 D L G J C 0.08 (0003) M H K INCHES DIM MIN MAX A 0.249 0.263 B 0.130 0.145 C 0.060 0.068 D 0.024 0.035 F 0.115 0.126 G 0.087 0.094 H 0.0008 0.0040 J 0.009 0.014 K 0.060 0.078 L 0.033 0.041 M 0_ 10 _ S 0.264 0.287 STYLE 3: PIN 1. 2. 3. 4. MILLIMETERS MIN MAX 6.30 6.70 3.30 3.70 1.50 1.75 0.60 0.89 2.90 3.20 2.20 2.40 0.020 0.100 0.24 0.35 1.50 2.00 0.85 1.05 0_ 10 _ 6.70 7.30 GATE DRAIN SOURCE DRAIN CASE 318E–04 ISSUE H Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. 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