NSC DM9602N Dual retriggerable, resettable one shot Datasheet

9602/DM9602 Dual Retriggerable,
Resettable One Shots
General Description
Features
These dual resettable, retriggerable one shots have two inputs per function; one which is active high, and one which is
active low. This allows the designer to employ either leading-edge or trailing-edge triggering, which is independent of
input transition times. When input conditions for triggering
are met, a new cycle starts and the external capacitor is
allowed to rapidly discharge and then charge again. The
retriggerable feature permits output pulse widths to be extended. In fact a continuous true output can be maintained
by having an input cycle time which is shorter than the output cycle time. The output pulse may then be terminated at
any time by applying a low logic level to the RESET pin.
Retriggering may be inhibited by either connecting the Q
output to an active high input, or the Q output to an active
low input.
Y
Y
Y
Y
Y
Y
Y
70 ns to % output width range
Resettable and retriggerableÐ0% to 100% duty cycle
TTL input gatingÐleading or trailing edge triggering
Complementary TTL outputs
Optional retrigger lock-out capability
Pulse width compensated for VCC and temperature
variations
Alternate Military/Aerospace device (54xxx) is available.
Contact a National Semiconductor Sales Office/Distributor for specifications.
Connection Diagram
Dual-In-Line Package
TL/F/6611 – 1
Order Number 9602DMQB, 9602FMQB or DM9602N
See NS Package Number J16A, N16E or W16A
Function Table
Pin No’s.
Operation
A
B
CLR
HxL
H
X
L
LxH
X
H
H
L
Trigger
Trigger
Reset
H e High Voltage Level
L e Low Voltage Level
X e Don’t Care
C1995 National Semiconductor Corporation
TL/F/6611
RRD-B30M105/Printed in U. S. A.
9602/DM9602 Dual Retriggerable, Resettable One Shots
June 1989
Absolute Maximum Ratings (Note)
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
7V
Input Voltage
5.5V
Operating Free Air Temperature Range
b 55§ C to a 125§ C
Military
Commercial
0§ C to a 70§ C
Storage Temperature Range
b 65§ C to a 150§ C
Recommended Operating Conditions
Symbol
Military
Parameter
VCC
Supply Voltage
VIH
High Level Input
Voltage
TA e b55§ C
Commercial
Nom
Max
Min
Nom
Max
4.5
5
5.5
4.75
5
5.25
TA e 0§ C
1.9
1.7
1.8
TA e 75§ C
V
1.65
TA e 125§ C
Low Level Input
Voltage
V
2
TA e 25§ C
VIL
Units
Min
1.5
TA e b55§ C
0.85
TA e 0§ C
0.85
TA e 25§ C
0.9
0.85
TA e 75§ C
V
0.85
TA e 125§ C
0.85
IOH
High Level Output Current
b 0.8
b 0.8
mA
IOL
Low Level Output Current
16
16
mA
TA
Free Air Operating Temperature
75
§C
Electrical Characteristics
Symbol
Input Clamp Voltage
VOH
High Level Output
Voltage
VOL
Low Level Output
Voltage
125
Conditions (Note 3)
VCC e Min, II e b12 mA
VCC e Min, IOH e Max
VIL e Max, VIH e Min
(Note 4)
VCC e Min, IOL e Max
VIL e Max, VIH e Min
(Note 4)
IIH
High Level Input Current
VCC e Max, VI e 4.5V
IIL
Low Level Input
Current
VCC e Max
ICC
Min
Typ
(Note 1)
Max
Units
b 1.5
V
2.4
V
MIL
0.4
COM
0.45
60
MIL VI e 0.40V
V
mA
b 1.6
COM VI e 0.45V
VCC e Min
IOS
0
over recommended operating free air temperature range (unless otherwise noted)
Parameter
VI
b 55
b 1.6
MIL VI e 0.40V
b 1.24
COM VI e 0.45V
b 1.41
Short Circuit
Output Current
VCC e Max, VOUT e 1V
MIL
b 25
(Notes 2 and 4)
COM
b 35
Supply Current
VCC e Max
MIL
39
45
COM
39
50
mA
mA
mA
Note 1: All typicals are at VCC e 5V, TA e 25§ C.
Note 2: Not more than one output should be shorted at a time.
Note 3: Unless otherwise noted, RX e 10k for all tests.
Note 4: Ground PIN 1(15) for VOL on PIN 7(9) or VOH and IOS on PIN 6(10) and apply momentary ground to PIN 4(12). Open PIN 1(15) for VOL on PIN 6(10) or VOH
and IOS on PIN 7(9).
2
Switching Characteristics VCC e 5V, TA e 25§ C (See Section 1 for Test Waveforms and Output Load)
Symbol
Parameter
Military
Conditions
Min
tPLH
Propagation Delay Time,
Low-to-High Level Output
Negative Trigger Input
to True Output
tPHL
Propagation Delay Time,
High-to-Low Level Output
Negative Trigger Input
To Complement Output
tPW(MIN)
Minimum True Output
Pulse Width
CL e 15 pF
CX e 0
RX e 5 kX
Max
Commercial
Min
Units
Max
35
40
ns
43
48
ns
90
100
100
110
ns
Minimum Complement
Pulse Width
tPW
Pulse Width
RX e 10 kX
CX e 1000 pF
CSTRAY
Maximum Allowable Wiring
Capacitance
Pins 2, 14 to
GND
RX
External Timing Resistor
3.08
3.76
3.08
50
5
25
5
3.76
ms
50
pF
50
kX
Logic Diagrams
TL/F/6611 – 2
TL/F/6611 – 3
1. An external resistor (RX) and external capacitor (CX) are
required as shown in the Logic Diagram.
2. The value of CX may vary from 0 to any necessary value
available. If, however, the capacitor has leakages approaching 3.0 mA or if stray capacitance from either terminal to ground is more than 50 pF, the timing equations
may not represent the pulse width obtained.
3. The output pulse with (t) is defined as follows:
4. If electrolytic type capacitors are to be used, the following
three configurations are recommended:
A. Use with low leakage capacitors:
The normal RC configuration can be used predictably
only if the forward capacitor leakage at 5.0V is less
than 3 mA, and the inverse capacitor leakage at 1.0V is
less than 5 mA over the operational temperature
range.
Operating Rules
Ð
where:
(
1
for CX l 103 pF
K & 0.34
RX
RX is in kX, CX is in pF
t is in ns
for CX k 103 pF, see Figure 1.
for K vs CX see Figure 6.
t e K RXCX 1 a
R k 0.6 RX (Max)
3
TL/F/6611 – 4
Operating Rules (Continued)
7. Input Trigger Pulse Rules (See Triggering Truth Table)
B. Use with high inverse leakage current electrolytic capacitors:
The diode in this configuration prevents high inverse
leakage currents through the capacitor by preventing
an inverse voltage across the capacitor. The use of
this configuration is not recommended with retriggerable operation.
t & 0.3 RCX
TL/F/6611 – 8
Input to Pin 5(11),
(Pin 3(13) e HIGH)
Pin 4(12) e LOW
t1, t3 e Min. Positive Input Pulse Width l 40 ns
t2, t4 e Min. Negative Input Pulse Width l 40 ns
TL/F/6611–5
C. Use to obtain extended pulse widths:
This configuration can be used to obtain extended
pulse widths, because of the larger timing resistor allowed by beta multiplication. Electrolytics with high inverse leakage currents can be used.
R k RX (0.7) (hFE Q1) or k 2.5 MX, whichever is the
lesser
RX (min) k RY k RX (max)
TL/F/6611 – 9
Input to Pin 4(12)
Pin 5(11) e HIGH
(Pin 3(13) e HIGH)
8. The retriggerable pulse width is calculated as shown below:
(5 kX s RY s 10 kX is recommended)
Q1: NPN silicon transistor with hFE requirements of
above equations, such as 2N5961 or 2N5962.
tW e t a tPLH e K RX CX
t & 0.3 RCX
#1
a
1
RX
J
a tPLH
TL/F/6611 – 10
The retrigger pulse width is equal to the pulse width (t) plus a delay time. For
pulse widths greater than 500 ns, tW can be approximated as t. Retriggering will
not occur if the retrigger pulse comes within & 0.3 CX (ns) after the initial trigger
pulse (i.e., during the discharge cycle).
9. Reset OperationÐAn overriding clear (active LOW level)
is provided on each one shot. By applying a LOW to the
reset, any timing cycle can be terminated or any new cycle inhibited until the LOW reset input is removed. Trigger
inputs will not produce spikes in the output when the reset is held LOW.
TL/F/6611–6
This configuration is not recommended with retriggerable operation.
5. To obtain variable pulse width by remote trimming, the
following circuit is recommended:
TL/F/6611–7
6. Under any operating condition, CX and RX (min) must be
kept as close to the circuit as possible to minimize stray
capacitance and reduce noise pickup.
TL/F/6611 – 11
10. VCC and Ground wiring should conform to good high
frequency standards so that switching transients on VCC
and Ground leads do not cause interaction between one
shots. Use of a 0.01 to 0.1 mF bypass capacitor between VCC and Ground located near the DM9602 is recommended.
*For further detailed device characteristics and output performance, please
refer to the NSC one-shot application note, AN-366.
4
Typical Performance Characteristics
TL/F/6611 – 13
TL/F/6611 – 12
FIGURE 2. Normalized Output Pulse Width
vs Ambient Temperature
FIGURE 1. Output Pulse Width vs Timing Resistance
and Capacitance for CX k 103 pF
TL/F/6611 – 14
TL/F/6611 – 15
FIGURE 3. Pulse Width vs Timing Resistor
FIGURE 4. Normalized Output Pulse Width
vs Supply Voltage
TL/F/6611 – 16
TL/F/6611 – 17
FIGURE 5. Minimum Output Pulse Width
vs Ambient Temperature
FIGURE 6. Typical ‘‘K’’ Coefficient Variation
vs Timing Capacitance
5
6
Physical Dimensions inches (millimeters)
16-Lead Ceramic Dual-In-Line Package (J)
Order Number 9602DMQB
NS Package Number J16A
16-Lead Molded Dual-In-Line Package (N)
Order Number DM9602N
NS Package Number N16E
7
9602/DM9602 Dual Retriggerable, Resettable One Shots
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flat Package (W)
Order Number 9602FMQB
NS Package Number W16A
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