ams AS1364-BTDT-33 1a, low-dropout linear voltage regulator Datasheet

Datasheet
AS1364
1 A , L o w - D r o p o u t L i n e a r Vo l ta g e R e g u l a t o r
1 General Description
2 Key Features
The AS1364 is a low-dropout linear regulator (LDO)
designed to operate from 2V to 5.5V input, that delivers
a wide range of highly accurate (±0.75%) factorytrimmed output voltages as well as adjustable output
voltages (using an external resistor-divider network).
The ultra-low dropout device requires only 140mV dropout voltage while delivering a guaranteed 1A load current and is therefore perfectly suited for battery-operated
portable applications.
Additionally the AS1364 offers extremly low 10µVRMS
(100Hz to 100kHz) or 45µVRMS (10Hz to 1MHz) output
voltage noise.
Table 1. Standard Products
Model
Output Type
BYP
SET
AS1364-AD
Adjustable
No
Yes
AS1364-_ _
Fixed
Yes
No
The device features an internal PMOS pass transistor
(for a low supply current of only 35µA), reset output, a
low-power shutdown mode, and protection from shortcircuit and thermal-overload conditions.
The AS1364 is available in an 8-pin TDFN 3x3mm package.
!
Guaranteed Output Current: 1A
!
Low Dropout: 140mV @ 1A
!
Output Voltage Accuracy: Up to ±0.75%
!
2.0V to 5.5V Input Voltage
!
Fixed VOUT: 1.2V to 5.0V
!
Adjustable VOUT: 1.2V to 5.3V
!
Low Ground Current: 35µA
!
Low Shutdown Current: 10nA
!
Low Output Noise: 45µVRMS (from 10Hz to 1MHz)
!
Thermal Overload Protection
!
Output Current Limit
!
8-pin TDFN 3x3mm Package
3 Applications
The device is ideal for laptops, PDAs, portable audio
devices, mobile phones, cordless phones, and any other
battery-operated portable device.
Figure 1. AS1364 - Typical Application Diagram
3
6
IN
VIN
CIN
4.7µF
On
Off
OUT
IN
2
AS1364
OUT
1
POK
EN
7
8
Reset Output
CBYP
10nF
SET/BYP
GND
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VOUT
COUT
4.7µF
5
4
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AS1364
Datasheet - P i n o u t
4 Pinout
Pin Assignments
Figure 2. Pin Assignments (Top View)
POK 1
8 GND
EN 2
7 SET/BYP
AS1364
IN 3
6 OUT
IN 4
5 OUT
Pin Descriptions
Table 2. Pin Descriptions
Pin Number
Pin Name
1
POK
2
EN
3, 4
IN
5, 6
OUT
7
SET/BYP
8
GND
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Description
Note: Open-Drain POK Output. POK remains low while VOUT is below the POK
threshold. Connect a 100kΩ pull-up resistor from this pin to OUT to obtain an output
voltage (see Figure 1 on page 1).
Active-Low Shutdown Input. A logic low disables the output and reduces the
supply current to 0.1µA. In shutdown, the POK output is low and OUT high
impedance.
VDD: Normal operation.
GND: Shutdown.
2.0V to 5.5V Supply Voltage. Bypass with a 4.7µF input capacitor to GND (see
Capacitor Selection and Regulator Stability on page 12). These inputs are internally
connected, but they also must be externally connected for proper operation.
Regulator Output. Bypass with a 4.7µF low-ESR output capacitor to GND. Connect
the OUT pins together externally.
Voltage-Setting Input. Connect to GND to select the factory-preset output voltage.
Connect this pin to an external resistor-divider for adjustable-output operation (see
Figure 1 on page 1). (AS1364-AD only)
Bypass Pin. Connect a 10nF capacitor from this pin to OUT to improve PSRR and
noise performance. (AS1364-AD does not offer this feature)
Ground
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AS1364
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 3 may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Table 3. Absolute Maximum Ratings
Parameter
Min
Max
Units
IN, EN, POK to GND
-0.3
+7
V
OUT, SET/BYP to GND
-0.3
VIN +
0.3
V
Output Short-Circuit Duration
Infinite
Thermal Resistance ΘJA
36.3
ESD
2
ºC/W
on PCB
kV
HBM MIL-Std. 883E 3015.7 methods
JEDEC 78
Latch-Up
-100
+100
mA
Operating Temperature Range
-40
+85
ºC
Storage Temperature Range
-65
+150
ºC
+150
ºC
Junction Temperature
Package Body Temperature
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+260
Comments
ºC
Revision 1.05
The reflow peak soldering temperature (body
temperature) specified is in accordance with
IPC/JEDEC J-STD-020D “Moisture/Reflow
Sensitivity Classification for Non-Hermetic Solid
State Surface Mount Devices”.
The lead finish for Pb-free leaded packages is
matte tin (100% Sn).
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AS1364
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
VIN = VOUT(NOM) + 500mV or VIN = +2.0V (whichever is greater),CIN = COUT = 4.7µF, EN = IN, TAMB = -40°C to +85ºC
(unless otherwise specified). Typical values are at TAMB = +25ºC.
Table 4. Electrical Characteristics
Symbol
Parameter
Condition
VIN
Input Voltage
VPOR
Power On Reset
Min
2.0
Output Voltage Accuracy
(Preset Mode)
-1.5
+1.5
-2
+2
1.2
5.3
V
1.23
V
IOUT
Guaranteed Output Current
(RMS)
ILIMIT
Short-Circuit Current Limit
VOUT = 0
In-Regulation Current Limit
VOUT > 96% of nominal value, VIN ≥ 2.0V
VIN = 2.5V, IOUT = 250mA,
VOUT set to 2.0V
VSET/BYP = 1.20V
1.5
2.3
1.5
100
-100
150
mV
+100
nA
IOUT = 1A
75
200
IOUT = 250mA, VOUT = 3.3V
35
85
IOUT = 1A, VOUT = 3.3V
140
320
VIN from (VOUT + 100mV) to 5.5V,
ILOAD = 5mA
ΔVLDR
Load Regulation
IOUT = 1mA to 1A
-0.125
f = 1kHz, IOUT = 10mA, CBYP = 10nF
78
f = 1kHz, IOUT = 10mA
72
f = 10kHz, IOUT = 10mA, CBYP = 10nF
75
f = 10kHz, IOUT = 10mA
65
f = 100kHz, IOUT = 10mA, CBYP = 10nF
54
f = 100kHz, IOUT = 10mA
46
100Hz to 100kHz, COUT = 3.3µF,
CBYP = 10nF;
10
100Hz to 100kHz, COUT = 3.3µF;
50
10Hz to 1MHz, COUT = 3.3µF,
CBYP = 10nF;
45
10Hz to 1MHz, COUT = 3.3µF;
70
Revision 1.05
A
A
150
Line Regulation
%
A
35
ΔVLNR
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1.20
IOUT = 100µA
Dropout Voltage
Output Voltage Noise
1.1
50
VIN VOUT
Ripple Rejection
1.17
1
SET/BYP Threshold
2
V
IOUT = 250mA
SET/BYP Voltage Threshold
(Adjustable Mode)
Ground-Pin Current
1.95
+0.75
VSET/BYP
IQ
V
-0.75
Adjustable Output Voltage
Range
SET/BYP Input Bias Current
5.5
IOUT = 250mA, TAMB = +25ºC
VOUT
ISET
Unit
1.79
IOUT = 1mA to 1A, VIN > (VOUT + 0.5V)
1.87
Max
Falling, 100mV hysteresis
1
PSRR
Typ
µA
mV
+0.125
%/V
0.001
%/mA
dB
µVRMS
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AS1364
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 4. Electrical Characteristics (Continued)
Symbol
Parameter
Condition
Min
Typ
Max
EN = GND, VIN = 5.5V, TAMB = 25°C
0.01
0.5
EN = GND, VIN = 5.5V
0.1
15
Unit
Shutdown
IOFF
Shutdown Supply Current
VIH
EN Input Threshold
VIL
2.0V < VIN < 5.5V
1.6
V
2.0V < VIN < 5.5V
0.6
EN = IN or GND, TAMB = +25ºC
1
TAMB = +85ºC
5
POK Output Low Voltage
POK sinking 1mA
0.05
Operating Voltage Range for
Valid POK Signal
POK sinking 100µA
POK Output High leakage
Current
POK = 5.5V, TAMB = +25ºC
1
TAMB = +85ºC
5
POK Threshold
Rising edge (referenced to VOUT(NOM))
ISHDNN
EN Input Bias Current
µA
V
nA
POK Output
VOL
1.1
90
94
0.25
V
5.5
V
nA
98
%
Thermal Protection
TSHDNN
Thermal Shutdown
Temperature
ΔTSHDNN Thermal Shutdown Hysteresis
170
ºC
20
ºC
1. Guaranteed by production test of load regulation and line regulation.
2. Dropout voltage is defined as VIN - VOUT, when VOUT is 100mV below the value of VOUT measured for VIN =
(VOUT(NOM) + 500mV). Since the minimum input voltage is 2.0V, this specification is only valid when VOUT(NOM)
> 2.0V.
Note: All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or
SQC (Statistical Quality Control) methods.
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AS1364
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
VIN = VOUT(NOM) + 0.5V, CIN = COUT = 4.7µF, TAMB = 25°C (unless otherwise specified).
Figure 3. VDROP vs. IOUT;
Figure 4. VOUT vs. IOUT; VOUT(NOM) = 3.3V
3.31
140
3.309
Output Voltage (V) .
Dropout Voltage (mV)
.
160
120
100
80
60
40
3.308
3.307
3.306
3.305
3.304
3.303
3.302
20
3.301
0
3.3
0
200
400
600
800
0
1000
200
Load Current (mA)
Figure 5. VOUT vs. Temperature; VOUT(NOM) = 3.3V
600
800
1000
Figure 6. VOUT vs. VIN; VOUT(NOM) = 3.3V
3.32
3.5
3.315
3
Output Voltage (V) .
Output Voltage (V) .
400
Output Current (mA)
3.31
3.305
3.3
3.295
3.29
2.5
2
1.5
1
no load
0.5
Iout = 1A
3.285
-45 -30 -15
0
0
15
30
45
60
75
90
0
1
Temperature (°C)
2
3
4
5
6
Input Voltage (V)
Figure 7. Quiescent Current vs. VIN;
Figure 8. Quiescent Current vs. IOUT;
180
90
no load
160
.
.
140
Quiescent Current (µA)
Quiescent Current (µA)
80
Iout = 1A
120
100
80
60
40
70
60
50
40
30
20
20
10
0
0
Vin = 3.8V
Vin = 5.5V
0
1
2
3
4
5
6
Input Voltage (V)
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0
200
400
600
800
1000
Output Current (mA)
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AS1364
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 9. Quiescent Current vs. Temperature;
Figure 10. Spectral Noise vs. Freq.; IOUT = 10mA,
90
10
COUT = 3.3µF
.
Quiescent Current (µA)
.
Output Noise Density (µV/ Hz)
80
70
60
50
40
30
20
no load
10
Iout = 250mA
0
-45 -30 -15
0
15
30
45
60
75
90
1
0.1
0.01
0.01
Temperature (°C)
0.1
1
10
100
1000
Frequency (kHz)
Figure 11. PSRR vs. Frequency; IOUT = 10mA
100
PSRR (dB) .
80
60
40
20
0
0.01
1
100
10000
Frequency (kHz)
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AS1364
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
5µs/Div
1V/Div
VIN
VOUT
1ms/Div
1V/Div
1V/Div
Figure 15. Startup; VIN = 3.8V, IOUT = 100mA
1V/Div
VIN
Figure 14. Startup; VIN = 3.8V, IOUT = 100mA
VOUT
200mA/Div
VOUT
IOUT
20mV/Div
VIN
VOUT
100µs/Div
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50mV/Div
Figure 13. Load Transient Response;
VIN = 3.8V, IOUT = 50mA to 500mA
200mV/Div
Figure 12. Line Transient Response;
VIN = 3.8V to 4.3V, IOUT = 100mA
20µs/Div
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AS1364
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
The AS1364 output voltage is factory-trimmed or is adjustable from +1.2 to +5V, and is guaranteed to supply 1A of output current. The device consists of a +1.20V internal reference, error amplifier, MOSFET driver, P-channel pass transistor, internal feedback voltage-divider and a comparator (see Figure 16).
Figure 16. AS1364 - Block Diagram
VIN
2.0V to 5.5V
4
IN
3
CIN
4.7µF
Thermal
Sensor
IN
MOSFET
Driver
w/ILIM
5
OUT
VOUT
1.2V to 5.0V
6
2
On
Off
EN
Shutdown
Logic
OUT
COUT
4.7µF
VOUT Logic
Supply Voltage
+
Error
Amplifier
RPOK
100kΩ
To Controller
1.20V
Reference
–
R1
1
7
POK
+
–
AS1364
94%VREF
SET/BYP
+
–
+
–
100mV
R2
+
–
8
GND
The +1.20V reference is connected to the inverting input of the error amplifier, which compares this reference with the
selected feedback voltage and amplifies the difference.
The MOSFET driver reads the error signal and applies the appropriate drive to the P-channel transistor. If the feedback
voltage is lower than the reference, the pass transistor gate is pulled lower, allowing more current to pass increasing
the output voltage. If the feedback voltage is too high, the pass transistor gate is pulled up, allowing less current to
pass to the output.
The low VOUT comparator senses when the feedback voltage has dropped 6% below its expected level, causing POK
to go low.
The output voltage is fed back through either an internal resistor-divider connected to OUT or an external resistor network connected to SET. The comparator examines VSET/BYP and selects the feedback path. If VSET/BYP is below
50mV, the internal feedback path is used and the output is regulated to the factory-preset voltage.
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AS1364
Datasheet - D e t a i l e d D e s c r i p t i o n
Output Voltage Selection
At the factory trimmed versions of the AS1364 offering the bypass pin (see Figure 1 on page 1), the output voltage is
then set to an internally trimmed voltage (see Ordering Information on page 14).
For the adjustable AS1364-AD, an output voltage between +1.2V and +5V can be set by using two external resistors
(see Figure 17). In this mode, VOUT is determined by:
R1
V OUT = V SETBYP × ⎛⎝ 1 + ------⎞⎠
R2
(EQ 1)
V OUT
R 1 = R 2 × ⎛ --------------------- – 1⎞
⎝ V SETBYP ⎠
(EQ 2)
Where:
VSET/BYP = +1.20V.
A simplification of R1 and R2 selection is:
Since the input bias current at SET is less than 100nA, large resistance values can be used for R1 and R2 to minimize
power consumption and therefore increasing efficiency.
Note: Up to 125kΩ is acceptable for R2. If the SET pin is connected to GND without a resistor, 3.3V will be set as output voltage.
In preset voltage mode, the impedance from SET to GND should be less than 10kΩ or spurious conditions may cause
the voltage at SET to exceed the 50mV threshold.
Figure 17. Adjustable Output Voltage Typical Application
3
5
IN
VIN
OUT
CIN
4.7µF
IN
2
On
Off
VOUT
6
4
AS1364
R1
OUT
COUT
4.7µF
7
SET/BYP
EN
8
1
GND
POK
Reset Output
R2
Shutdown
If pin EN is connected to GND the AS1364 is disabled. In shutdown mode all internal circuits are turned off, reducing
supply current to 10nA (typ). For normal device operation pin EN must be connected to IN. During shutdown, POK
goes low.
Power-OK
The AS1364 features a power-ok indicator that asserts when the output voltage falls out of regulation. The open-drain
POK output goes low when output voltage at OUT falls 6% below its nominal value. A 100kΩ pull-up resistor from POK
to a (typically OUT) provides a logic control signal.
POK can be used as a power-on-reset (POR) signal to a microcontroller or can drive an external LED to indicate a
power failure condition.
Note: POK is low during shutdown.
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AS1364
Datasheet - D e t a i l e d D e s c r i p t i o n
Current Limiter
The AS1364 features current limiting circuitry that monitors the pass transistor, limiting short-circuit output current to
1.5A (typ). The circuitry of the AS1364 allows that the output can be shorted to ground for an indefinite period of time
without damaging the device.
Internal P-Channel Pass Transistor
The AS1364 features a 1A P-channel MOSFET pass transistor and consumes only a maximum of 200µA of quiescent
current under heavy loads as well as in dropout.
Thermal Protection
Integrated thermal overload protection limits the total power dissipation in the AS1364. When the junction temperature
(TJ) exceeds +170ºC typically, the pass transistor is turned off. Normal operation is continued when TJ drops approximately 20ºC.
Note: Regardless of the hysteresis, continuous short-circuit condition will result in a pulsed output.
Operating Region and Power Dissipation
Maximum power dissipation of the AS1364 depends on the thermal resistance of the package and the PCB, the temperature difference between the die junction and ambient air, and the rate of air flow.
The power dissipated in the device is given as:
PD = I OUT × ( V IN – V OUT )
(EQ 3)
The maximum power dissipation is calculated:
T J ( MAX ) – T AMB
PDMAX = --------------------------------------θ JC + θ JA
(EQ 4)
Where:
TJ(MAX) - TAMB is the temperature difference between the device die junction and the surrounding air.
θJC is the thermal resistance of the junction to the case.
θJA is the thermal resistance from the case through the PCB, copper traces, and other materials to the surrounding air.
Connect the exposed thermal pad and GND to circuit ground by using a large pad, or multiple vias to the ground plane.
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AS1364
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9 Application Information
Capacitor Selection and Regulator Stability
Input and output capacitors are required for stable operation of the AS1364 over the full temperature range and with
load currents up to 1A. Connect CIN and COUT as close to the AS1364 as possible to minimize the impact of PC board
trace inductance.
Input Capacitor
For CIN, a 4.7µF capacitor between IN and ground is sufficient. CIN reduces the source impedance of the input supply
and may be smaller than 4.7µF if powered from regulated power supplies or low-impedance batteries. Larger input
capacitor values and lower ESR provide better noise rejection and line-transient response.
Output Capacitor
A 4.7µF low-ESR capacitor between OUT and ground is sufficient for COUT. The output capacitor’s ESR affects stability and output noise. An output capacitors with an ESR of 0.5Ω or less is recommended to ensure stability and optimum transient response. Reduced output noise and improve load-transient response, stability, and power-supply
rejection by using large output capacitors with low ESR.
Noise, PSRR, and Transient Response
AS1364 output noise is typically 10µVRMS (100Hz to 100kHz) or 45µVRMS (10Hz to 1MHz) during normal operation.
This is suitably low for most applications (see Figure 10 on page 7).
The AS1364 is designed to achieve extremly low dropout voltage and low quiescent current in battery-powered systems while still maintaining excellent noise performance, transient response, and PSRR. See the Figure 11 on page 7
for a plot of power-supply rejection ratio (PSRR) versus frequency.
When operating from very noisy sources, the factory preset variants a recommanded since they offer improved noise
performance over the adjustable variants.
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AS1364
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
10 Package Drawings and Markings
The device is available in an 8-pin TDFN 3x3mm package.
Figure 18. 8-pin TDFN 3x3mm Package
D2
D
A
SEE
DE TAIL B
D 2/2
B
2x
E
E2
E2/2
NX L
aaa C
PIN 1 INDEX AREA
(D/2 xE/2)
4
NX K
PIN 1 INDEX AREA
(D/2 xE/2)
4
aaa C
NX b
5
e
TOP VIEW
e
N N -1
7
2x
(ND -1) X e
6
C A B
C
BTM VIEW
Term inal Tip
e/2
bbb
ddd
5
A3
ccc C
A
C
SEATING
PLANE
7
NX
0.08 C
A1
S IDE V IEW
D atum A or B
E VE N T E RMINAL S IDE
Symbol
A
A1
A3
L1
L2
aaa
bbb
ccc
ddd
eee
ggg
Min
0.70
0.00
Typ
0.75
0.02
0.20 REF
Max
0.80
0.05
0.15
0.13
0.15
0.10
0.10
0.05
0.08
0.10
Notes
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
Symbol
D BSC
E BSC
D2
E2
L
θ
K
b
e
N
ND
Min
1.60
1.35
0.30
0º
0.20
0.25
Typ
3.00
3.00
0.40
0.30
0.65
8
4
Max
2.50
1.75
0.50
14º
0.35
Notes
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2, 5
1, 2
1, 2, 5
Notes:
1. Figure 18 is shown for illustration only.
2. All dimensions are in millimeters; angles in degrees.
3. Dimensioning and tolerancing conform to ASME Y14.5 M-1994.
4. N is the total number of terminals.
5. The terminal #1 identifier and terminal numbering convention shall conform to JEDEC 95-1, SPP-012. Details of terminal #1 identifier are optional, but must be located within the zone indicated. The terminal #1 identifier may be either
a mold or marked feature.
6. Dimension b applies to metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip.
7. ND refers to the maximum number of terminals on side D.
8. Unilateral coplanarity zone applies to the exposed heat sink slug as well as the terminals
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AS1364
Datasheet - O r d e r i n g I n f o r m a t i o n
11 Ordering Information
The device is available as the standard products shown in Table 5.
Table 5. Ordering Information
Ordering Code
Marking
Output
SET/BYP
Delivery Form
Package
AS1364-BTDT-AD
ASRF
adjustable
(preset to 3.3V)
SET
Tape and Reel
8-pin TDFN 3x3mm
AS1364-BTDT-12*
ASRN
1.2V
BYP
Tape and Reel
8-pin TDFN 3x3mm
AS1364-BTDT-15
ASRG
1.5V
BYP
Tape and Reel
8-pin TDFN 3x3mm
AS1364-BTDT-18
ASRH
1.8V
BYP
Tape and Reel
8-pin TDFN 3x3mm
AS1364-BTDT-30
ASRJ
3.0V
BYP
Tape and Reel
8-pin TDFN 3x3mm
AS1364-BTDT-33
ASRI
3.3V
BYP
Tape and Reel
8-pin TDFN 3x3mm
AS1364-BTDT-45
ASRK
4.5V
BYP
Tape and Reel
8-pin TDFN 3x3mm
*Future product.
Non-standard devices are available between 1.4V and 4.6V in 50mV steps and between 4.6V and 5.0V in 100mV
steps. For more information and inquiries contact http://www.austriamicrosystems.com/contact
Note: All products are RoHS compliant and Pb-free.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect
For further information and requests, please contact us mailto:[email protected]
or find your local distributor at http://www.austriamicrosystems.com/distributor
www.austriamicrosystems.com
Revision 1.05
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AS1364
Datasheet
Copyrights
Copyright © 1997-2009, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe.
Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged,
translated, stored, or used without the prior written consent of the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing
in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding
the information set forth herein or regarding the freedom of the described devices from patent infringement.
austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice.
Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for
current information. This product is intended for use in normal commercial applications. Applications requiring
extended temperature range, unusual environmental requirements, or high reliability applications, such as military,
medical life-support or life-sustaining equipment are specifically not recommended without additional processing by
austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show
deviations from the standard production flow, such as test flow or test location.
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However,
austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to
personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or
consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
Contact Information
Headquarters
austriamicrosystems AG
Tobelbaderstrasse 30
A-8141 Unterpremstaetten, Austria
Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com/contact
www.austriamicrosystems.com
Revision 1.05
15 - 15
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