Order this document by MTD1P50E/D SEMICONDUCTOR TECHNICAL DATA Motorola Preferred Device P–Channel Enhancement–Mode Silicon Gate TMOS POWER FET 1.0 AMPERES 500 VOLTS 15 Ω This advanced high voltage TMOS E–FET is designed to withstand high energy in the avalanche mode and switch efficiently. This new high energy device also offers a drain–to–source diode with fast recovery time. Designed for high voltage, high speed switching applications such as power supplies, PWM motor controls and other inductive loads, the avalanche energy capability is specified to eliminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients. • Avalanche Energy Capability Specified at Elevated Temperature • Low Stored Gate Charge for Efficient Switching • Internal Source–to–Drain Diode Designed to Replace External Zener Transient Suppressor–Absorbs High Energy in the Avalanche Mode • Source–to–Drain Diode Recovery Time Comparable to Discrete Fast Recovery Diode D G MAXIMUM RATINGS (TC = 25°C unless otherwise noted) CASE 369A–13, Style 2 DPAK Surface Mount S Symbol Value Unit Drain–to–Source Voltage VDSS 500 Vdc Drain–to–Gate Voltage (RGS = 1.0 MΩ) VDGR 500 Vdc Gate–to–Source Voltage — Continuous Gate–to–Source Voltage — Single Pulse (tp ≤ 50 µs) VGS VGSM ± 20 ± 40 Vdc Drain Current — Continuous @ TC = 25°C Drain Current — Continuous @ TC = 100°C Drain Current — Single Pulse (tp ≤ 10 µs) ID ID IDM 1.0 0.8 4.0 Adc Total Power Dissipation @ TC = 25°C Derate above 25°C Total Power Dissipation @ TC = 25°C, when mounted to minimum recommended pad size PD 50 0.4 1.75 Watts W/°C Watts TJ, Tstg – 55 to 150 °C EAS 45 mJ RθJC RθJA RθJA 2.5 100 71.4 °C/W TL 260 °C Rating Operating and Storage Temperature Range Apk UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS (TJ < 150°C) Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C (VDD = 100 Vdc, VGS = 10 Vdc, Peak IL = 3.0 Apk, L = 10 mH, RG = 25 Ω) THERMAL CHARACTERISTICS Thermal Resistance — Junction to Case Thermal Resistance — Junction to Ambient Thermal Resistance — Junction to Ambient (1) Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 5 seconds (1) When surface mounted to an FR4 board using the minimum recommended pad size. This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Thermal Clad is a trademark of the Bergquist Company. Preferred devices are Motorola recommended choices for future use and best overall value. TMOS Motorola Motorola, Inc. 1996 Power MOSFET Transistor Device Data 1 MTD1P50E ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Symbol Characteristic Min Typ Max Unit 500 — — TBD — — Vdc V/°C — — — — 10 100 — — 100 nAdc 2.0 — 3.1 TBD 4.0 — Vdc mV/°C — 12 15 Ohms — — — — 18 15.8 gFS 0.4 0.6 — mhos Ciss — TBD TBD pF Coss — TBD TBD Crss — TBD TBD td(on) — TBD TBD tr — TBD TBD td(off) — TBD TBD tf — TBD TBD QT — TBD TBD Q1 — TBD — Q2 — TBD — Q3 — TBD — — — 2.0 TBD 3.5 — trr — TBD — ta — TBD — tb — TBD — QRR — TBD — OFF CHARACTERISTICS Drain–to–Source Breakdown Voltage (VGS = 0 Vdc, ID = 0.25 mAdc) Temperature Coefficient (Positive) V(BR)DSS Zero Gate Voltage Drain Current (VDS = 500 Vdc, VGS = 0 Vdc) (VDS = 500 Vdc, VGS = 0 Vdc, TJ = 125°C) IDSS Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0) IGSS µAdc ON CHARACTERISTICS* Gate Threshold Voltage (VDS = VGS, ID = 0.25 mAdc) Threshold Temperature Coefficient (Negative) VGS(th) Static Drain–to–Source On–Resistance (VGS = 10 Vdc, ID = 0.5 Adc) RDS(on) Drain–to–Source On–Voltage (VGS = 10 Vdc) (ID = 1.0 Adc) (ID = 0.5 Adc, TJ = 125°C) VDS(on) Forward Transconductance (VDS = 15 Vdc, ID = 0.5 Adc) Vdc DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Transfer Capacitance SWITCHING CHARACTERISTICS* Turn–On Delay Time Rise Time Turn–Off Delay Time (VDS = 250 Vdc, ID = 1.0 Adc, VGS = 10 Vdc, RG = 9.1 Ω) Fall Time Gate Charge (VDS = 400 Vdc, ID = 1.0 Adc, VGS = 10 Vdc) ns nC SOURCE–DRAIN DIODE CHARACTERISTICS Forward On–Voltage (IS = 1.0 Adc, VGS = 0 Vdc) (IS = 1.0 Adc, VGS = 0 Vdc, TJ = 125°C) Reverse Recovery Time (IS = 1.0 Adc, dIS/dt = 100 A/µs) Reverse Recovery Stored Charge VSD Vdc ns µC * Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%. 2 Motorola TMOS Power MOSFET Transistor Device Data MTD1P50E PACKAGE DIMENSIONS –T– C B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. SEATING PLANE E R Z A S U K F J L H D G STYLE 2: PIN 1. 2. 3. 4. 2 PL 0.13 (0.005) M T GATE DRAIN SOURCE DRAIN DIM A B C D E F G H J K L R S U V Z INCHES MIN MAX 0.235 0.250 0.250 0.265 0.086 0.094 0.027 0.035 0.033 0.040 0.037 0.047 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.090 BSC 0.175 0.215 0.020 0.050 0.020 ––– 0.030 0.050 0.138 ––– MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.84 1.01 0.94 1.19 4.58 BSC 0.87 1.01 0.46 0.58 2.60 2.89 2.29 BSC 4.45 5.46 0.51 1.27 0.51 ––– 0.77 1.27 3.51 ––– CASE 369A–13 ISSUE W Motorola TMOS Power MOSFET Transistor Device Data 3 MTD1P50E Motorola reserves the right to make changes without further notice to any products herein. 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