GENESYS GL3310 Usb 3.0 to sata 3gb/s bridge controller product overview Datasheet

Genesys Logic, Inc.
GL3310
USB 3.0 to SATA 3Gb/s
Bridge Controller
Product Overview
GL3310 Product Overview
Copyright
Copyright © 2012 Genesys Logic, Inc. All rights reserved. No part of the materials shall be reproduced in any
form or by any means without prior written consent of Genesys Logic, Inc.
Ownership and Title
Genesys Logic, Inc. owns and retains of its right, title and interest in and to all materials provided herein.
Genesys Logic, Inc. reserves all rights, including, but not limited to, all patent rights, trademarks, copyrights
and any other propriety rights. No license is granted hereunder.
Disclaimer
All Materials are provided “as is”. Genesys Logic, Inc. makes no warranties, express, implied or otherwise,
regarding their accuracy, merchantability, fitness for any particular purpose, and non-infringement of
intellectual property. In no event shall Genesys Logic, Inc. be liable for any damages, including, without
limitation, any direct, indirect, consequential, or incidental damages. The materials may contain errors or
omissions. Genesys Logic, Inc. may make changes to the materials or to the products described herein at
anytime without notice.
Genesys Logic, Inc.
12F., No. 205, Sec. 3, Beixin Rd., Xindian Dist. 231,
New Taipei City, Taiwan
Tel : (886-2) 8913-1888
Fax : (886-2) 6629-6168
http://www.genesyslogic.com
©2012 Genesys Logic, Inc. - All rights reserved.
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GL3310 Product Overview
GENERAL DESCRIPTION
The GL3310 is a highly integrated USB 3.0 to SATA 3Gb/s bridge controller, which includes self-developed
USB 3.0 SuperSpeed transmitter/receiver physical layer (PHY), USB 2.0 HighSpeed PHY, and Serial ATA
(SATA) PHY. It also backwards supports USB 2.0 and SATA 1.5Gb/s. This single chip solution complies with
Universal Serial Bus Specification revision 2.0, Universal Serial Bus 3.0 Specification revision 1.0, and Serial
ATA Revision 3.0 Specification Gold Revision.
Genesys Logic, Inc. has been developing, manufacturing, and distributing USB applications and products for
more than ten years. With the experienced skills, the self-developed USB 3.0 SuperSpeed transceiver exhibits
surprising achievement as shown in Figure 1.1. The signal quality not only fits in the specification limitation,
but also provides wide tolerance for unexpected conditions. As a result, GL3310 can perform fast transmission
rate and high compatibility with various USB hosts and commercial SATA devices.
Genesys SuperSpeed TX Eye Diagram and RX Jitter Tolerance
GL3310 is especially designed for cost-efficient solution. The 8051 microcontroller, embedded power
regulators, and single 25 MHz clock source all are the features help customers easily design their own
products with few efforts. This highly integrated solution helps to reduce system cost as well.
Moreover, GL3310 inherits customer feedbacks from its predecessor products and provides two SPI interfaces,
PWM controls, watchdog timers, UART monitoring interface, and various general purpose I/Os (GPIO).
These flexible add-on features help the customer to design specific products for applications.
©2012 Genesys Logic, Inc. - All rights reserved.
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GL3310 Product Overview
FEATURES
● USB specification compliance
Comply with Universal Serial Bus 3.0 Specification rev. 1.0 (USB 3.0)
Comply with Universal Serial Bus Specification rev. 2.0 (USB 2.0)
Comply with USB Mass Storage Class Specification rev. 1.0
Support USB Mass Storage Class Bulk-Only Transport (BOT)
Support 1 device address and up to 6 endpoints: Control (0) / Bulk Data Write Out (1) / Bulk Data
Read In (2) / Interrupt In (3) / CMD Out (4) / Status In (5)
− Support 5 Gbps SuperSpeed, 480 Mbps high-speed, and 12 Mbps full-speed transfer rates
SATA specification features
− Comply with Serial ATA Revision 3.0 Specification Gold Revision
− Support SATA power saving, including partial and slumber modes
− Support SATA Hot Plug
− Support Native Command Queuing up to 32 commands
− Support SATA host/device initiated power management
− Support SATA BIST host/device initiated eye pattern test
− Support 3.0 Gbps and 1.5 Gbps transfer rates
Embedded 8051 micro-controller
− Embedded 16 Kbytes mask ROM and internal 48 Kbytes SRAM
Embedded 5V-to-3.3V and 3.3V-to-1.2V regulators
− No external regulators required
− 5 V / 3.3 V power sources
Single 25 MHz clock source
Available in 48-pin QFN (7 x 7 mm2) and 64-pin LQFP (7 x 7 mm2) packages
Other Features
− Spread Spectrum Clocking (SSC) for EMI reduction
− On-chip watchdog timer for automatic error recovery
− Primary SPI interface for firmware update
− Secondary SPI interface for display controller
− PWM interfaces for fan control and LED control (2 GPIOs)
− UART interface for debugging
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©2012 Genesys Logic, Inc. - All rights reserved.
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GL3310 Product Overview
BLOCK DIAGRAM
©2012 Genesys Logic, Inc. - All rights reserved.
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