MOTOROLA SN54LS259

SN54/74LS259
8-BIT ADDRESSABLE LATCH
The SN54/ 74LS259 is a high-speed 8-Bit Addressable Latch designed for
general purpose storage applications in digital systems. It is a multifunctional
device capable of storing single line data in eight addressable latches, and
also a 1-of-8 decoder and demultiplexer with active HIGH outputs. The device
also incorporates an active LOW common Clear for resetting all latches, as
well as, an active LOW Enable.
•
•
•
•
•
•
8-BIT ADDRESSABLE LATCH
LOW POWER SCHOTTKY
Serial-to-Parallel Conversion
Eight Bits of Storage With Output of Each Bit Available
Random (Addressable) Data Entry
Active High Demultiplexing or Decoding Capability
Easily Expandable
Common Clear
J SUFFIX
CERAMIC
CASE 620-09
CONNECTION DIAGRAM DIP (TOP VIEW)
16
VCC
C
E
D
Q7
Q6
Q5
Q4
16
15
14
13
12
11
10
9
1
N SUFFIX
PLASTIC
CASE 648-08
16
1
1
2
3
4
5
6
7
8
Ao
A1
A2
Q0
Q1
Q2
Q3
GND
16
1
PIN NAMES
LOADING (Note a)
HIGH
A0, A1, A2
D
E
C
Q0 to Q7
D SUFFIX
SOIC
CASE 751B-03
Address lnputs
Data Input
Enable (Active LOW) Input
Clear (Active LOW) input
Parallel Latch Outputs (Note b)
0.5 U.L.
0.5 U.L.
1.0 U.L.
0.5 U.L.
10 U.L.
LOW
0.25 U.L.
0.25 U.L.
0.5 U.L.
0.25 U.L.
5 (2.5) U.L.
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial
(74) Temperature Ranges.
GUARANTEED OPERATING RANGES
Min
Typ
Max
Unit
VCC
Symbol
Supply Voltage
Parameter
54
74
4.5
4.75
5.0
5.0
5.5
5.25
V
TA
Operating Ambient Temperature Range
54
74
– 55
0
25
25
125
70
°C
IOH
Output Current — High
54, 74
– 0.4
mA
IOL
Output Current — Low
54
74
4.0
8.0
mA
FAST AND LS TTL DATA
5-433
SN54/74LS259
LOGIC DIAGRAM
C
MODE
H
H
L
H
L
Addressable Latch
Memory
Active HIGH Eight-Channel
Demultiplexer
Clear
X = Don’t Care Condition
L = LOW Voltage Level
H = HIGH Voltage Level
QN–1 = Previous Output State
addressed output will follow the state of the D input with all
other inputs in the LOW state. In the clear mode all outputs are
LOW and unaffected by the address and data inputs.
When operating the SN54 / 74LS259 as an addressable
latch, changing more then one bit of the address could impose
a transient wrong address. Therefore, this should only be
done while in the memory mode.
The truth table below summarizes the operations.
TRUTH TABLE
PRESENT OUTPUT STATES
MODE SELECTION
L
H
L
FUNCTIONAL DESCRIPTION
The SN54 / 74LS259 has four modes of operation as shown
in the mode selection table. In the addressable latch mode,
data on the Data line (D) is written into the addressed
latch.The addressed latch will follow the data input with all
non-addressed latches remaining in their previous states. In
the memory mode, all latches remain in their previous state
and are unaffected by the Data or Address inputs.
In the one-of-eight decoding or demultiplexing mode, the
E
C E D A0
L H X X
L L L L
L L H L
L L L H
L L H H
• • •
• • •
• • •
• • •
• • •
L L H H
A1
A2
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
MODE
X
L
L
L
L
•
•
•
•
•
H
X
L
L
L
L
L
L
H
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Clear
Demultiplex
H
L
L
L
L
L
L
L
L
•
•
•
•
•
L
L
L
L
H
QN–1
QN–1
L
H
QN–1
QN–1
QN–1
QN–1
H H X
X
X
X
QN–1
H
H
H
H
•
•
•
•
•
H
H
L
L
H
H
L
L
L
L
•
•
•
•
•
H
H
L
L
L
L
L
H
I
L
L
L
•
•
•
•
•
L
L
I
H
L
H
•
•
•
•
•
L
H
H
H
H
H
QN–1
QN–1
Memory
QN–1
QN–1
FAST AND LS TTL DATA
5-434
QN–1
Addressable
Latch
•
•
•
•
•
QN–1
QN–1
L
H
SN54/74LS259
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Min
Parameter
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VIK
Input Clamp Diode Voltage
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
IIH
Input HIGH Current
IIL
Input LOW Current
IOS
Short Circuit Current (Note 1)
ICC
Power Supply Current
Typ
Max
Unit
2.0
54
0.7
74
0.8
– 0.65
– 1.5
Test Conditions
V
Guaranteed Input HIGH Voltage for
All Inputs
V
Guaranteed Input LOW Voltage for
All Inputs
V
VCC = MIN, IIN = – 18 mA
54
2.5
3.5
V
74
2.7
3.5
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
54, 74
0.25
0.4
V
IOL = 4.0 mA
74
0.35
0.5
V
IOL = 8.0 mA
20
µA
VCC = MAX, VIN = 2.7 V
–20
0.1
mA
VCC = MAX, VIN = 7.0 V
– 0.4
mA
VCC = MAX, VIN = 0.4 V
– 100
mA
VCC = MAX
36
mA
VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)
Limits
Symbol
Parameter
Min
Typ
Max
Unit
tPLH
tPHL
Turn-Off Delay, Enable to Output
Turn-On Delay, Enable to Output
22
15
35
24
ns
ns
tPLH
tPHL
Turn-Off Delay, Data to Output
Turn-On Delay, Data to Output
20
13
32
21
ns
ns
tPLH
tPHL
Turn-Off Delay, Address to Output
Turn-On Delay, Address to Output
24
18
38
29
ns
ns
tPHL
Turn-On Delay, Clear to Output
17
27
ns
Test Conditions
CL = 15 pF
AC SET-UP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)
Limits
Symbol
Parameter
ts
Input Setup Time
tW
th
th
Min
Typ
Max
Unit
20
ns
Pulse Width, Clear or Enable
15
ns
Hold Time, Data
5.0
ns
Hold Time, Address
20
ns
FAST AND LS TTL DATA
5-435
SN54/74LS259
AC WAVEFORMS
Figure 2. Turn-on and Turn-off Delays,
Data to Output
Figure 1. Turn-on and Turn-off Delays, Enable To
Output and Enable Pulse Width
Figure 4. Setup and Hold Time, Data to Enable
Figure 3. Turn-on and Turn-off Delays,
Address to Output
Figure 5. Turn-on Delay, Clear to Output
Figure 6. Setup Time, Address to Enable
(See Notes 1 and 2)
NOTES:
1. The Address to Enable Setup Time is the time before the HIGH-to-LOW Enable transition that the Address must be stable so that the correct latch is
addressed and the other latches are not affected.
2. The shaded areas indicate when the inputs are permitted to change for predictable output performance.
FAST AND LS TTL DATA
5-436
Case 751B-03 D Suffix
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FAST AND LS TTL DATA
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FAST AND LS TTL DATA
5-438